mirror of https://gitee.com/openkylin/linux.git
cxgb3: Allocate multiqueues at init time
Allocate a queue set per core, up to the maximum of available qsets. Share the queue sets on multi port adapters. Rename MSI-X interrupt vectors ethX-N, N being the queue set number. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Divy Le Ray
David S. Miller
parent
20d3fc1150
commit
8c26376112
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@ -358,6 +358,7 @@ struct qset_params { /* SGE queue set parameters */
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unsigned int jumbo_size; /* # of entries in jumbo free list */
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unsigned int txq_size[SGE_TXQ_PER_SET]; /* Tx queue sizes */
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unsigned int cong_thres; /* FL congestion threshold */
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unsigned int vector; /* Interrupt (line or vector) number */
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};
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struct sge_params {
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@ -92,6 +92,8 @@ struct ch_qset_params {
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int32_t polling;
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int32_t lro;
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int32_t cong_thres;
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int32_t vector;
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int32_t qnum;
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};
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struct ch_pktsched_params {
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@ -274,10 +274,10 @@ static void name_msix_vecs(struct adapter *adap)
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for (i = 0; i < pi->nqsets; i++, msi_idx++) {
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snprintf(adap->msix_info[msi_idx].desc, n,
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"%s (queue %d)", d->name, i);
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"%s-%d", d->name, pi->first_qset + i);
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adap->msix_info[msi_idx].desc[n] = 0;
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}
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}
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}
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}
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static int request_msix_data_irqs(struct adapter *adap)
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@ -306,6 +306,22 @@ static int request_msix_data_irqs(struct adapter *adap)
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return 0;
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}
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static void free_irq_resources(struct adapter *adapter)
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{
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if (adapter->flags & USING_MSIX) {
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int i, n = 0;
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free_irq(adapter->msix_info[0].vec, adapter);
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for_each_port(adapter, i)
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n += adap2pinfo(adapter, i)->nqsets;
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for (i = 0; i < n; ++i)
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free_irq(adapter->msix_info[i + 1].vec,
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&adapter->sge.qs[i]);
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} else
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free_irq(adapter->pdev->irq, adapter);
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}
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static int await_mgmt_replies(struct adapter *adap, unsigned long init_cnt,
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unsigned long n)
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{
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@ -473,7 +489,10 @@ static int setup_sge_qsets(struct adapter *adap)
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struct port_info *pi = netdev_priv(dev);
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pi->qs = &adap->sge.qs[pi->first_qset];
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for (j = 0; j < pi->nqsets; ++j, ++qset_idx) {
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for (j = pi->first_qset; j < pi->first_qset + pi->nqsets;
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++j, ++qset_idx) {
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if (!pi->rx_csum_offload)
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adap->params.sge.qset[qset_idx].lro = 0;
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err = t3_sge_alloc_qset(adap, qset_idx, 1,
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(adap->flags & USING_MSIX) ? qset_idx + 1 :
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irq_idx,
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@ -740,11 +759,12 @@ static void init_port_mtus(struct adapter *adapter)
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t3_write_reg(adapter, A_TP_MTU_PORT_TABLE, mtus);
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}
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static void send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
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static int send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
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int hi, int port)
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{
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struct sk_buff *skb;
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struct mngt_pktsched_wr *req;
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int ret;
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skb = alloc_skb(sizeof(*req), GFP_KERNEL | __GFP_NOFAIL);
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req = (struct mngt_pktsched_wr *)skb_put(skb, sizeof(*req));
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@ -755,20 +775,28 @@ static void send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
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req->min = lo;
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req->max = hi;
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req->binding = port;
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t3_mgmt_tx(adap, skb);
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ret = t3_mgmt_tx(adap, skb);
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return ret;
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}
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static void bind_qsets(struct adapter *adap)
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static int bind_qsets(struct adapter *adap)
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{
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int i, j;
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int i, j, err = 0;
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for_each_port(adap, i) {
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const struct port_info *pi = adap2pinfo(adap, i);
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for (j = 0; j < pi->nqsets; ++j)
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send_pktsched_cmd(adap, 1, pi->first_qset + j, -1,
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-1, i);
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for (j = 0; j < pi->nqsets; ++j) {
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int ret = send_pktsched_cmd(adap, 1,
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pi->first_qset + j, -1,
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-1, i);
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if (ret)
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err = ret;
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}
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}
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return err;
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}
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#define FW_FNAME "t3fw-%d.%d.%d.bin"
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@ -954,9 +982,16 @@ static int cxgb_up(struct adapter *adap)
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t3_write_reg(adap, A_TP_INT_ENABLE, 0x7fbfffff);
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}
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if ((adap->flags & (USING_MSIX | QUEUES_BOUND)) == USING_MSIX)
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bind_qsets(adap);
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adap->flags |= QUEUES_BOUND;
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if (!(adap->flags & QUEUES_BOUND)) {
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err = bind_qsets(adap);
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if (err) {
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CH_ERR(adap, "failed to bind qsets, err %d\n", err);
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t3_intr_disable(adap);
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free_irq_resources(adap);
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goto out;
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}
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adap->flags |= QUEUES_BOUND;
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}
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out:
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return err;
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@ -975,19 +1010,7 @@ static void cxgb_down(struct adapter *adapter)
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t3_intr_disable(adapter);
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spin_unlock_irq(&adapter->work_lock);
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if (adapter->flags & USING_MSIX) {
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int i, n = 0;
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free_irq(adapter->msix_info[0].vec, adapter);
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for_each_port(adapter, i)
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n += adap2pinfo(adapter, i)->nqsets;
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for (i = 0; i < n; ++i)
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free_irq(adapter->msix_info[i + 1].vec,
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&adapter->sge.qs[i]);
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} else
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free_irq(adapter->pdev->irq, adapter);
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free_irq_resources(adapter);
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flush_workqueue(cxgb3_wq); /* wait for external IRQ handler */
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quiesce_rx(adapter);
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}
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@ -1292,8 +1315,8 @@ static unsigned long collect_sge_port_stats(struct adapter *adapter,
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int i;
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unsigned long tot = 0;
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for (i = 0; i < p->nqsets; ++i)
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tot += adapter->sge.qs[i + p->first_qset].port_stats[idx];
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for (i = p->first_qset; i < p->first_qset + p->nqsets; ++i)
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tot += adapter->sge.qs[i].port_stats[idx];
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return tot;
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}
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@ -1497,7 +1520,7 @@ static int set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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struct link_config *lc = &p->link_config;
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if (!(lc->supported & SUPPORTED_Autoneg))
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return -EOPNOTSUPP; /* can't change speed/duplex */
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return -EOPNOTSUPP; /* can't change speed/duplex */
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if (cmd->autoneg == AUTONEG_DISABLE) {
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int cap = speed_duplex_to_caps(cmd->speed, cmd->duplex);
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@ -1576,8 +1599,10 @@ static int set_rx_csum(struct net_device *dev, u32 data)
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struct adapter *adap = p->adapter;
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int i;
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for (i = p->first_qset; i < p->first_qset + p->nqsets; i++)
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for (i = p->first_qset; i < p->first_qset + p->nqsets; i++) {
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adap->params.sge.qset[i].lro = 0;
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adap->sge.qs[i].lro_enabled = 0;
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}
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}
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return 0;
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}
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@ -1783,6 +1808,8 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
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int i;
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struct qset_params *q;
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struct ch_qset_params t;
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int q1 = pi->first_qset;
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int nqsets = pi->nqsets;
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if (!capable(CAP_NET_ADMIN))
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return -EPERM;
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@ -1805,6 +1832,16 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
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|| !in_range(t.rspq_size, MIN_RSPQ_ENTRIES,
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MAX_RSPQ_ENTRIES))
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return -EINVAL;
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if ((adapter->flags & FULL_INIT_DONE) && t.lro > 0)
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for_each_port(adapter, i) {
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pi = adap2pinfo(adapter, i);
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if (t.qset_idx >= pi->first_qset &&
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t.qset_idx < pi->first_qset + pi->nqsets &&
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!pi->rx_csum_offload)
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return -EINVAL;
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}
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if ((adapter->flags & FULL_INIT_DONE) &&
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(t.rspq_size >= 0 || t.fl_size[0] >= 0 ||
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t.fl_size[1] >= 0 || t.txq_size[0] >= 0 ||
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@ -1812,6 +1849,20 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
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t.polling >= 0 || t.cong_thres >= 0))
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return -EBUSY;
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/* Allow setting of any available qset when offload enabled */
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if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
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q1 = 0;
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for_each_port(adapter, i) {
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pi = adap2pinfo(adapter, i);
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nqsets += pi->first_qset + pi->nqsets;
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}
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}
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if (t.qset_idx < q1)
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return -EINVAL;
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if (t.qset_idx > q1 + nqsets - 1)
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return -EINVAL;
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q = &adapter->params.sge.qset[t.qset_idx];
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if (t.rspq_size >= 0)
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@ -1861,13 +1912,26 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
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case CHELSIO_GET_QSET_PARAMS:{
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struct qset_params *q;
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struct ch_qset_params t;
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int q1 = pi->first_qset;
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int nqsets = pi->nqsets;
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int i;
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if (copy_from_user(&t, useraddr, sizeof(t)))
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return -EFAULT;
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if (t.qset_idx >= SGE_QSETS)
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/* Display qsets for all ports when offload enabled */
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if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
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q1 = 0;
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for_each_port(adapter, i) {
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pi = adap2pinfo(adapter, i);
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nqsets = pi->first_qset + pi->nqsets;
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}
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}
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if (t.qset_idx >= nqsets)
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return -EINVAL;
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q = &adapter->params.sge.qset[t.qset_idx];
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q = &adapter->params.sge.qset[q1 + t.qset_idx];
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t.rspq_size = q->rspq_size;
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t.txq_size[0] = q->txq_size[0];
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t.txq_size[1] = q->txq_size[1];
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@ -1878,6 +1942,12 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
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t.lro = q->lro;
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t.intr_lat = q->coalesce_usecs;
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t.cong_thres = q->cong_thres;
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t.qnum = q1;
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if (adapter->flags & USING_MSIX)
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t.vector = adapter->msix_info[q1 + t.qset_idx + 1].vec;
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else
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t.vector = adapter->pdev->irq;
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if (copy_to_user(useraddr, &t, sizeof(t)))
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return -EFAULT;
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@ -2223,8 +2293,8 @@ static void t3_synchronize_rx(struct adapter *adap, const struct port_info *p)
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{
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int i;
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for (i = 0; i < p->nqsets; i++) {
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struct sge_rspq *q = &adap->sge.qs[i + p->first_qset].rspq;
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for (i = p->first_qset; i < p->first_qset + p->nqsets; i++) {
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struct sge_rspq *q = &adap->sge.qs[i].rspq;
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spin_lock_irq(&q->lock);
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spin_unlock_irq(&q->lock);
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@ -2581,6 +2651,42 @@ static struct pci_error_handlers t3_err_handler = {
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.resume = t3_io_resume,
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};
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/*
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* Set the number of qsets based on the number of CPUs and the number of ports,
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* not to exceed the number of available qsets, assuming there are enough qsets
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* per port in HW.
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*/
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static void set_nqsets(struct adapter *adap)
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{
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int i, j = 0;
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int num_cpus = num_online_cpus();
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int hwports = adap->params.nports;
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int nqsets = SGE_QSETS;
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if (adap->params.rev > 0) {
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if (hwports == 2 &&
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(hwports * nqsets > SGE_QSETS ||
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num_cpus >= nqsets / hwports))
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nqsets /= hwports;
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if (nqsets > num_cpus)
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nqsets = num_cpus;
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if (nqsets < 1 || hwports == 4)
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nqsets = 1;
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} else
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nqsets = 1;
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for_each_port(adap, i) {
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struct port_info *pi = adap2pinfo(adap, i);
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pi->first_qset = j;
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pi->nqsets = nqsets;
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j = pi->first_qset + nqsets;
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dev_info(&adap->pdev->dev,
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"Port %d using %d queue sets.\n", i, nqsets);
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}
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}
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static int __devinit cxgb_enable_msix(struct adapter *adap)
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{
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struct msix_entry entries[SGE_QSETS + 1];
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@ -2739,9 +2845,6 @@ static int __devinit init_one(struct pci_dev *pdev,
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pi = netdev_priv(netdev);
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pi->adapter = adapter;
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pi->rx_csum_offload = 1;
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pi->nqsets = 1;
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pi->first_qset = i;
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pi->activity = 0;
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pi->port_id = i;
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netif_carrier_off(netdev);
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netdev->irq = pdev->irq;
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@ -2818,6 +2921,8 @@ static int __devinit init_one(struct pci_dev *pdev,
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else if (msi > 0 && pci_enable_msi(pdev) == 0)
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adapter->flags |= USING_MSI;
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set_nqsets(adapter);
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err = sysfs_create_group(&adapter->port[0]->dev.kobj,
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&cxgb3_attr_group);
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