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drm/amd/display: store timing sync info in dc_stream_status 

in program_timing_sync, after all the pipes are
grouped, store timing sync info in dc_stream_status

Signed-off-by: Su Sung Chung <Su.Chung@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Su Sung Chung 2019-01-21 12:01:53 -05:00 committed by Alex Deucher
parent 4f69bc8c16
commit 8dac4e7d89
2 changed files with 21 additions and 1 deletions
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16
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@ -869,8 +869,9 @@ static void program_timing_sync(
struct dc *dc,
struct dc_state *ctx)
{
int i, j;
int i, j, k;
int group_index = 0;
int num_group = 0;
int pipe_count = dc->res_pool->pipe_count;
struct pipe_ctx *unsynced_pipes[MAX_PIPES] = { NULL };
@ -922,6 +923,18 @@ static void program_timing_sync(
}
}
for (k = 0; k < group_size; k++) {
struct dc_stream_status *status = dc_stream_get_status_from_state(ctx, pipe_set[k]->stream);
status->timing_sync_info.group_id = num_group;
status->timing_sync_info.group_size = group_size;
if (k == 0)
status->timing_sync_info.master = true;
else
status->timing_sync_info.master = false;
}
/* remove any other pipes with plane as they have already been synced */
for (j = j + 1; j < group_size; j++) {
if (pipe_set[j]->plane_state) {
@ -936,6 +949,7 @@ static void program_timing_sync(
dc, group_index, group_size, pipe_set);
group_index++;
}
num_group++;
}
}

6
drivers/gpu/drm/amd/display/dc/dc_stream.h
View File

@ -32,11 +32,17 @@
/*******************************************************************************
* Stream Interfaces
******************************************************************************/
struct timing_sync_info {
int group_id;
int group_size;
bool master;
};
struct dc_stream_status {
int primary_otg_inst;
int stream_enc_inst;
int plane_count;
struct timing_sync_info timing_sync_info;
struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
};