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ARM: dts: imx6ul: add interrupt of virt-capable GIC
The Cortex-A7 and its GIC support virtualization extensions. To make use of them the CPU private interrupt needs to be specified. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -97,8 +97,10 @@ cpu0: cpu@0 {
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intc: interrupt-controller@a01000 {
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compatible = "arm,gic-400", "arm,cortex-a7-gic";
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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#interrupt-cells = <3>;
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interrupt-controller;
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interrupt-parent = <&intc>;
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reg = <0x00a01000 0x1000>,
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<0x00a02000 0x2000>,
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<0x00a04000 0x2000>,
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