ARM: shmobile: r8a7794: Add SDHI clocks to device tree

Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[horms: omitted device nodes; only add clock]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Shinobu Uehara 2014-05-23 11:37:45 +09:00 committed by Simon Horman
parent c5d82c9996
commit 8e181633e6
2 changed files with 22 additions and 1 deletions

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@ -293,6 +293,21 @@ cpg_clocks: cpg_clocks@e6150000 {
clock-output-names = "main", "pll0", "pll1", "pll3", clock-output-names = "main", "pll0", "pll1", "pll3",
"lb", "qspi", "sdh", "sd0", "z"; "lb", "qspi", "sdh", "sd0", "z";
}; };
/* Variable factor clocks */
sd1_clk: sd2_clk@e6150078 {
compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150078 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-output-names = "sd1";
};
sd2_clk: sd3_clk@e615007c {
compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615007c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-output-names = "sd2";
};
/* Fixed factor clocks */ /* Fixed factor clocks */
pll1_div2_clk: pll1_div2_clk { pll1_div2_clk: pll1_div2_clk {
@ -496,13 +511,16 @@ R8A7794_CLK_SYS_DMAC1 R8A7794_CLK_SYS_DMAC0
mstp3_clks: mstp3_clks@e615013c { mstp3_clks: mstp3_clks@e615013c {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
clocks = <&rclk_clk>, <&hp_clk>, <&hp_clk>; clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>,
<&rclk_clk>, <&hp_clk>, <&hp_clk>;
#clock-cells = <1>; #clock-cells = <1>;
clock-indices = < clock-indices = <
R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0
R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0 R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0
R8A7794_CLK_USBDMAC1 R8A7794_CLK_USBDMAC1
>; >;
clock-output-names = clock-output-names =
"sdhi2", "sdhi1", "sdhi0",
"cmt1", "usbdmac0", "usbdmac1"; "cmt1", "usbdmac0", "usbdmac1";
}; };
mstp7_clks: mstp7_clks@e615014c { mstp7_clks: mstp7_clks@e615014c {

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@ -52,6 +52,9 @@
#define R8A7794_CLK_SYS_DMAC0 19 #define R8A7794_CLK_SYS_DMAC0 19
/* MSTP3 */ /* MSTP3 */
#define R8A7794_CLK_SDHI2 11
#define R8A7794_CLK_SDHI1 12
#define R8A7794_CLK_SDHI0 14
#define R8A7794_CLK_CMT1 29 #define R8A7794_CLK_CMT1 29
#define R8A7794_CLK_USBDMAC0 30 #define R8A7794_CLK_USBDMAC0 30
#define R8A7794_CLK_USBDMAC1 31 #define R8A7794_CLK_USBDMAC1 31