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This branch contains changes needed to make omap2+ 

work properly with sparse IRQ. It also removes
 dependencies to mach/hardware.h. These help moving
 things towards ARM single zImage support.
 
 This branch is based on a commit in tty-next
 branch with omap-devel-gpmc-fixed-for-v3.7 and
 cleanup-omap-tags-for-v3.7 merged in to keep things
 compiling and sort out some merge conflicts.
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Merge tag 'omap-cleanup-sparseirq-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup

From Tony Lindgren:

This branch contains changes needed to make omap2+
work properly with sparse IRQ. It also removes
dependencies to mach/hardware.h. These help moving
things towards ARM single zImage support.

This branch is based on a commit in tty-next
branch with omap-devel-gpmc-fixed-for-v3.7 and
cleanup-omap-tags-for-v3.7 merged in to keep things
compiling and sort out some merge conflicts.

* tag 'omap-cleanup-sparseirq-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP1: Move SoC specific headers from plat to mach for omap1
  ARM: OMAP2+ Move SoC specific headers to be local to mach-omap2
  ARM: OMAP: Split plat/hardware.h, use local soc.h for omap2+
  ARM: OMAP: Remove unused old gpio-switch.h
  ARM: OMAP1: Move plat/irqs.h to mach/irqs.h
  ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQ
  ARM: OMAP2+: Prepare for irqs.h removal
  W1: OMAP HDQ1W: Remove dependencies to mach/hardware.h
  Input: omap-keypad: Remove dependencies to mach includes
  ARM: OMAP: Move gpio.h to include/linux/platform_data
  ARM: OMAP2+: Remove hardcoded twl4030 gpio_base, irq_base and irq_end
  ARM: OMAP2+: Remove unused nand_irq for GPMC
  ARM: OMAP2+: Make INTCPS_NR_IRQS local for mach-omap2/irq.c
  ARM: OMAP1: Define OMAP1_INT_I2C locally
  ARM: OMAP1: Move define of OMAP_LCD_DMA to dma.h
This commit is contained in:
Olof Johansson 2012-09-16 20:05:06 -07:00
parent a73403d85a 68cb700c59
commit 8e51036d34
176 changed files with 1015 additions and 1639 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/mach-omap1/ams-delta-fiq-handler.S
View File

@ -18,6 +18,7 @@
#include <plat/board-ams-delta.h>
#include <mach/irqs.h>
#include <mach/ams-delta-fiq.h>
#include "iomap.h"

1
arch/arm/mach-omap1/board-ams-delta.c
View File

@ -26,6 +26,7 @@
#include <linux/export.h>
#include <linux/omapfb.h>
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <media/soc_camera.h>

2
arch/arm/mach-omap1/board-htcherald.c
View File

@ -41,7 +41,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <plat/omap7xx.h>
#include <mach/omap7xx.h>
#include <plat/keypad.h>
#include <plat/mmc.h>

1
arch/arm/mach-omap1/board-osk.c
View File

@ -39,6 +39,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c/tps65010.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/omap1_bl.h>
#include <asm/mach-types.h>

2
arch/arm/mach-omap1/devices.c
View File

@ -23,8 +23,8 @@
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/mmc.h>
#include <plat/omap7xx.h>
#include <mach/omap7xx.h>
#include <mach/camera.h>
#include <mach/hardware.h>

3
arch/arm/mach-omap1/dma.c
View File

@ -27,7 +27,8 @@
#include <plat/dma.h>
#include <plat/tc.h>
#include <plat/irqs.h>
#include <mach/irqs.h>
#define OMAP1_DMA_BASE (0xfffed800)
#define OMAP1_LOGICAL_DMA_CH_COUNT 17

1
arch/arm/mach-omap1/gpio15xx.c
View File

@ -17,6 +17,7 @@
*/
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
#define OMAP1510_GPIO_BASE 0xFFFCE000

1
arch/arm/mach-omap1/gpio16xx.c
View File

@ -17,6 +17,7 @@
*/
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#define OMAP1610_GPIO1_BASE 0xfffbe400
#define OMAP1610_GPIO2_BASE 0xfffbec00

1
arch/arm/mach-omap1/gpio7xx.c
View File

@ -17,6 +17,7 @@
*/
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#define OMAP7XX_GPIO1_BASE 0xfffbc000
#define OMAP7XX_GPIO2_BASE 0xfffbc800

2
arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
View File

@ -14,8 +14,6 @@
#ifndef __AMS_DELTA_FIQ_H
#define __AMS_DELTA_FIQ_H
#include <plat/irqs.h>
/*
* Interrupt number used for passing control from FIQ to IRQ.
* IRQ12, described as reserved, has been selected.

2
arch/arm/mach-omap1/include/mach/gpio.h
View File

@ -1,5 +1,3 @@
/*
* arch/arm/mach-omap1/include/mach/gpio.h
*/
#include <plat/gpio.h>

285
arch/arm/mach-omap1/include/mach/hardware.h
View File

@ -1,11 +1,46 @@
/*
* arch/arm/mach-omap1/include/mach/hardware.h
*
* Hardware definitions for TI OMAP processors and boards
*
* NOTE: Please put device driver specific defines into a separate header
* file for each driver.
*
* Copyright (C) 2001 RidgeRun, Inc.
* Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
*
* Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
* and Dirk Behme <dirk.behme@de.bosch.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __MACH_HARDWARE_H
#define __MACH_HARDWARE_H
#ifndef __ASM_ARCH_OMAP_HARDWARE_H
#define __ASM_ARCH_OMAP_HARDWARE_H
#include <asm/sizes.h>
#ifndef __ASSEMBLER__
#include <asm/types.h>
#include <plat/cpu.h>
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
@ -35,7 +70,249 @@ static inline u32 omap_cs3_phys(void)
? 0 : OMAP_CS3_PHYS;
}
#endif
#endif /* ifndef __ASSEMBLER__ */
#include <plat/serial.h>
/*
* ---------------------------------------------------------------------------
* Common definitions for all OMAP processors
* NOTE: Put all processor or board specific parts to the special header
* files.
* ---------------------------------------------------------------------------
*/
/*
* ----------------------------------------------------------------------------
* Timers
* ----------------------------------------------------------------------------
*/
#define OMAP_MPU_TIMER1_BASE (0xfffec500)
#define OMAP_MPU_TIMER2_BASE (0xfffec600)
#define OMAP_MPU_TIMER3_BASE (0xfffec700)
#define MPU_TIMER_FREE (1 << 6)
#define MPU_TIMER_CLOCK_ENABLE (1 << 5)
#define MPU_TIMER_AR (1 << 1)
#define MPU_TIMER_ST (1 << 0)
/*
* ----------------------------------------------------------------------------
* Clocks
* ----------------------------------------------------------------------------
*/
#define CLKGEN_REG_BASE (0xfffece00)
#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
#define CK_RATEF 1
#define CK_IDLEF 2
#define CK_ENABLEF 4
#define CK_SELECTF 8
#define SETARM_IDLE_SHIFT
/* DPLL control registers */
#define DPLL_CTL (0xfffecf00)
/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000)
#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14)
/*
* ---------------------------------------------------------------------------
* UPLD
* ---------------------------------------------------------------------------
*/
#define ULPD_REG_BASE (0xfffe0800)
#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24)
#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */
# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */
#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34)
# define SOFT_UDC_REQ (1 << 4)
# define SOFT_USB_CLK_REQ (1 << 3)
# define SOFT_DPLL_REQ (1 << 0)
#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c)
#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40)
#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c)
#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50)
#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68)
# define DIS_MMC2_DPLL_REQ (1 << 11)
# define DIS_MMC1_DPLL_REQ (1 << 10)
# define DIS_UART3_DPLL_REQ (1 << 9)
# define DIS_UART2_DPLL_REQ (1 << 8)
# define DIS_UART1_DPLL_REQ (1 << 7)
# define DIS_USB_HOST_DPLL_REQ (1 << 6)
#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74)
#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c)
/*
* ---------------------------------------------------------------------------
* Watchdog timer
* ---------------------------------------------------------------------------
*/
/* Watchdog timer within the OMAP3.2 gigacell */
#define OMAP_MPU_WATCHDOG_BASE (0xfffec800)
#define OMAP_WDT_TIMER (OMAP_MPU_WATCHDOG_BASE + 0x0)
#define OMAP_WDT_LOAD_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
#define OMAP_WDT_READ_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4)
#define OMAP_WDT_TIMER_MODE (OMAP_MPU_WATCHDOG_BASE + 0x8)
/*
* ---------------------------------------------------------------------------
* Interrupts
* ---------------------------------------------------------------------------
*/
#ifdef CONFIG_ARCH_OMAP1
/*
* XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c
* or something similar.. -- PFM.
*/
#define OMAP_IH1_BASE 0xfffecb00
#define OMAP_IH2_BASE 0xfffe0000
#define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00)
#define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04)
#define OMAP_IH1_SIR_IRQ (OMAP_IH1_BASE + 0x10)
#define OMAP_IH1_SIR_FIQ (OMAP_IH1_BASE + 0x14)
#define OMAP_IH1_CONTROL (OMAP_IH1_BASE + 0x18)
#define OMAP_IH1_ILR0 (OMAP_IH1_BASE + 0x1c)
#define OMAP_IH1_ISR (OMAP_IH1_BASE + 0x9c)
#define OMAP_IH2_ITR (OMAP_IH2_BASE + 0x00)
#define OMAP_IH2_MIR (OMAP_IH2_BASE + 0x04)
#define OMAP_IH2_SIR_IRQ (OMAP_IH2_BASE + 0x10)
#define OMAP_IH2_SIR_FIQ (OMAP_IH2_BASE + 0x14)
#define OMAP_IH2_CONTROL (OMAP_IH2_BASE + 0x18)
#define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c)
#define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c)
#define IRQ_ITR_REG_OFFSET 0x00
#define IRQ_MIR_REG_OFFSET 0x04
#define IRQ_SIR_IRQ_REG_OFFSET 0x10
#define IRQ_SIR_FIQ_REG_OFFSET 0x14
#define IRQ_CONTROL_REG_OFFSET 0x18
#define IRQ_ISR_REG_OFFSET 0x9c
#define IRQ_ILR0_REG_OFFSET 0x1c
#define IRQ_GMR_REG_OFFSET 0xa0
#endif
#include <plat/hardware.h>
/*
* ----------------------------------------------------------------------------
* System control registers
* ----------------------------------------------------------------------------
*/
#define MOD_CONF_CTRL_0 0xfffe1080
#define MOD_CONF_CTRL_1 0xfffe1110
/*
* ----------------------------------------------------------------------------
* Pin multiplexing registers
* ----------------------------------------------------------------------------
*/
#define FUNC_MUX_CTRL_0 0xfffe1000
#define FUNC_MUX_CTRL_1 0xfffe1004
#define FUNC_MUX_CTRL_2 0xfffe1008
#define COMP_MODE_CTRL_0 0xfffe100c
#define FUNC_MUX_CTRL_3 0xfffe1010
#define FUNC_MUX_CTRL_4 0xfffe1014
#define FUNC_MUX_CTRL_5 0xfffe1018
#define FUNC_MUX_CTRL_6 0xfffe101C
#define FUNC_MUX_CTRL_7 0xfffe1020
#define FUNC_MUX_CTRL_8 0xfffe1024
#define FUNC_MUX_CTRL_9 0xfffe1028
#define FUNC_MUX_CTRL_A 0xfffe102C
#define FUNC_MUX_CTRL_B 0xfffe1030
#define FUNC_MUX_CTRL_C 0xfffe1034
#define FUNC_MUX_CTRL_D 0xfffe1038
#define PULL_DWN_CTRL_0 0xfffe1040
#define PULL_DWN_CTRL_1 0xfffe1044
#define PULL_DWN_CTRL_2 0xfffe1048
#define PULL_DWN_CTRL_3 0xfffe104c
#define PULL_DWN_CTRL_4 0xfffe10ac
/* OMAP-1610 specific multiplexing registers */
#define FUNC_MUX_CTRL_E 0xfffe1090
#define FUNC_MUX_CTRL_F 0xfffe1094
#define FUNC_MUX_CTRL_10 0xfffe1098
#define FUNC_MUX_CTRL_11 0xfffe109c
#define FUNC_MUX_CTRL_12 0xfffe10a0
#define PU_PD_SEL_0 0xfffe10b4
#define PU_PD_SEL_1 0xfffe10b8
#define PU_PD_SEL_2 0xfffe10bc
#define PU_PD_SEL_3 0xfffe10c0
#define PU_PD_SEL_4 0xfffe10c4
/* Timer32K for 1610 and 1710*/
#define OMAP_TIMER32K_BASE 0xFFFBC400
/*
* ---------------------------------------------------------------------------
* TIPB bus interface
* ---------------------------------------------------------------------------
*/
#define TIPB_PUBLIC_CNTL_BASE 0xfffed300
#define MPU_PUBLIC_TIPB_CNTL (TIPB_PUBLIC_CNTL_BASE + 0x8)
#define TIPB_PRIVATE_CNTL_BASE 0xfffeca00
#define MPU_PRIVATE_TIPB_CNTL (TIPB_PRIVATE_CNTL_BASE + 0x8)
/*
* ----------------------------------------------------------------------------
* MPUI interface
* ----------------------------------------------------------------------------
*/
#define MPUI_BASE (0xfffec900)
#define MPUI_CTRL (MPUI_BASE + 0x0)
#define MPUI_DEBUG_ADDR (MPUI_BASE + 0x4)
#define MPUI_DEBUG_DATA (MPUI_BASE + 0x8)
#define MPUI_DEBUG_FLAG (MPUI_BASE + 0xc)
#define MPUI_STATUS_REG (MPUI_BASE + 0x10)
#define MPUI_DSP_STATUS (MPUI_BASE + 0x14)
#define MPUI_DSP_BOOT_CONFIG (MPUI_BASE + 0x18)
#define MPUI_DSP_API_CONFIG (MPUI_BASE + 0x1c)
/*
* ----------------------------------------------------------------------------
* LED Pulse Generator
* ----------------------------------------------------------------------------
*/
#define OMAP_LPG1_BASE 0xfffbd000
#define OMAP_LPG2_BASE 0xfffbd800
#define OMAP_LPG1_LCR (OMAP_LPG1_BASE + 0x00)
#define OMAP_LPG1_PMR (OMAP_LPG1_BASE + 0x04)
#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
/*
* ----------------------------------------------------------------------------
* Pulse-Width Light
* ----------------------------------------------------------------------------
*/
#define OMAP_PWL_BASE 0xfffb5800
#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00)
#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04)
/*
* ---------------------------------------------------------------------------
* Processor specific defines
* ---------------------------------------------------------------------------
*/
#include "omap7xx.h"
#include "omap1510.h"
#include "omap16xx.h"
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */

267
arch/arm/mach-omap1/include/mach/irqs.h
View File

@ -1,5 +1,268 @@
/*
* arch/arm/mach-omap1/include/mach/irqs.h
* arch/arm/plat-omap/include/mach/irqs.h
*
* Copyright (C) Greg Lonnon 2001
* Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com>
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* NOTE: The interrupt vectors for the OMAP-1509, OMAP-1510, and OMAP-1610
* are different.
*/
#include <plat/irqs.h>
#ifndef __ASM_ARCH_OMAP15XX_IRQS_H
#define __ASM_ARCH_OMAP15XX_IRQS_H
/*
* IRQ numbers for interrupt handler 1
*
* NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
*
*/
#define INT_CAMERA 1
#define INT_FIQ 3
#define INT_RTDX 6
#define INT_DSP_MMU_ABORT 7
#define INT_HOST 8
#define INT_ABORT 9
#define INT_BRIDGE_PRIV 13
#define INT_GPIO_BANK1 14
#define INT_UART3 15
#define INT_TIMER3 16
#define INT_DMA_CH0_6 19
#define INT_DMA_CH1_7 20
#define INT_DMA_CH2_8 21
#define INT_DMA_CH3 22
#define INT_DMA_CH4 23
#define INT_DMA_CH5 24
#define INT_TIMER1 26
#define INT_WD_TIMER 27
#define INT_BRIDGE_PUB 28
#define INT_TIMER2 30
#define INT_LCD_CTRL 31
/*
* OMAP-1510 specific IRQ numbers for interrupt handler 1
*/
#define INT_1510_IH2_IRQ 0
#define INT_1510_RES2 2
#define INT_1510_SPI_TX 4
#define INT_1510_SPI_RX 5
#define INT_1510_DSP_MAILBOX1 10
#define INT_1510_DSP_MAILBOX2 11
#define INT_1510_RES12 12
#define INT_1510_LB_MMU 17
#define INT_1510_RES18 18
#define INT_1510_LOCAL_BUS 29
/*
* OMAP-1610 specific IRQ numbers for interrupt handler 1
*/
#define INT_1610_IH2_IRQ INT_1510_IH2_IRQ
#define INT_1610_IH2_FIQ 2
#define INT_1610_McBSP2_TX 4
#define INT_1610_McBSP2_RX 5
#define INT_1610_DSP_MAILBOX1 10
#define INT_1610_DSP_MAILBOX2 11
#define INT_1610_LCD_LINE 12
#define INT_1610_GPTIMER1 17
#define INT_1610_GPTIMER2 18
#define INT_1610_SSR_FIFO_0 29
/*
* OMAP-7xx specific IRQ numbers for interrupt handler 1
*/
#define INT_7XX_IH2_FIQ 0
#define INT_7XX_IH2_IRQ 1
#define INT_7XX_USB_NON_ISO 2
#define INT_7XX_USB_ISO 3
#define INT_7XX_ICR 4
#define INT_7XX_EAC 5
#define INT_7XX_GPIO_BANK1 6
#define INT_7XX_GPIO_BANK2 7
#define INT_7XX_GPIO_BANK3 8
#define INT_7XX_McBSP2TX 10
#define INT_7XX_McBSP2RX 11
#define INT_7XX_McBSP2RX_OVF 12
#define INT_7XX_LCD_LINE 14
#define INT_7XX_GSM_PROTECT 15
#define INT_7XX_TIMER3 16
#define INT_7XX_GPIO_BANK5 17
#define INT_7XX_GPIO_BANK6 18
#define INT_7XX_SPGIO_WR 29
/*
* IRQ numbers for interrupt handler 2
*
* NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
*/
#define IH2_BASE 32
#define INT_KEYBOARD (1 + IH2_BASE)
#define INT_uWireTX (2 + IH2_BASE)
#define INT_uWireRX (3 + IH2_BASE)
#define INT_I2C (4 + IH2_BASE)
#define INT_MPUIO (5 + IH2_BASE)
#define INT_USB_HHC_1 (6 + IH2_BASE)
#define INT_McBSP3TX (10 + IH2_BASE)
#define INT_McBSP3RX (11 + IH2_BASE)
#define INT_McBSP1TX (12 + IH2_BASE)
#define INT_McBSP1RX (13 + IH2_BASE)
#define INT_UART1 (14 + IH2_BASE)
#define INT_UART2 (15 + IH2_BASE)
#define INT_BT_MCSI1TX (16 + IH2_BASE)
#define INT_BT_MCSI1RX (17 + IH2_BASE)
#define INT_SOSSI_MATCH (19 + IH2_BASE)
#define INT_USB_W2FC (20 + IH2_BASE)
#define INT_1WIRE (21 + IH2_BASE)
#define INT_OS_TIMER (22 + IH2_BASE)
#define INT_MMC (23 + IH2_BASE)
#define INT_GAUGE_32K (24 + IH2_BASE)
#define INT_RTC_TIMER (25 + IH2_BASE)
#define INT_RTC_ALARM (26 + IH2_BASE)
#define INT_MEM_STICK (27 + IH2_BASE)
/*
* OMAP-1510 specific IRQ numbers for interrupt handler 2
*/
#define INT_1510_DSP_MMU (28 + IH2_BASE)
#define INT_1510_COM_SPI_RO (31 + IH2_BASE)
/*
* OMAP-1610 specific IRQ numbers for interrupt handler 2
*/
#define INT_1610_FAC (0 + IH2_BASE)
#define INT_1610_USB_HHC_2 (7 + IH2_BASE)
#define INT_1610_USB_OTG (8 + IH2_BASE)
#define INT_1610_SoSSI (9 + IH2_BASE)
#define INT_1610_SoSSI_MATCH (19 + IH2_BASE)
#define INT_1610_DSP_MMU (28 + IH2_BASE)
#define INT_1610_McBSP2RX_OF (31 + IH2_BASE)
#define INT_1610_STI (32 + IH2_BASE)
#define INT_1610_STI_WAKEUP (33 + IH2_BASE)
#define INT_1610_GPTIMER3 (34 + IH2_BASE)
#define INT_1610_GPTIMER4 (35 + IH2_BASE)
#define INT_1610_GPTIMER5 (36 + IH2_BASE)
#define INT_1610_GPTIMER6 (37 + IH2_BASE)
#define INT_1610_GPTIMER7 (38 + IH2_BASE)
#define INT_1610_GPTIMER8 (39 + IH2_BASE)
#define INT_1610_GPIO_BANK2 (40 + IH2_BASE)
#define INT_1610_GPIO_BANK3 (41 + IH2_BASE)
#define INT_1610_MMC2 (42 + IH2_BASE)
#define INT_1610_CF (43 + IH2_BASE)
#define INT_1610_WAKE_UP_REQ (46 + IH2_BASE)
#define INT_1610_GPIO_BANK4 (48 + IH2_BASE)
#define INT_1610_SPI (49 + IH2_BASE)
#define INT_1610_DMA_CH6 (53 + IH2_BASE)
#define INT_1610_DMA_CH7 (54 + IH2_BASE)
#define INT_1610_DMA_CH8 (55 + IH2_BASE)
#define INT_1610_DMA_CH9 (56 + IH2_BASE)
#define INT_1610_DMA_CH10 (57 + IH2_BASE)
#define INT_1610_DMA_CH11 (58 + IH2_BASE)
#define INT_1610_DMA_CH12 (59 + IH2_BASE)
#define INT_1610_DMA_CH13 (60 + IH2_BASE)
#define INT_1610_DMA_CH14 (61 + IH2_BASE)
#define INT_1610_DMA_CH15 (62 + IH2_BASE)
#define INT_1610_NAND (63 + IH2_BASE)
#define INT_1610_SHA1MD5 (91 + IH2_BASE)
/*
* OMAP-7xx specific IRQ numbers for interrupt handler 2
*/
#define INT_7XX_HW_ERRORS (0 + IH2_BASE)
#define INT_7XX_NFIQ_PWR_FAIL (1 + IH2_BASE)
#define INT_7XX_CFCD (2 + IH2_BASE)
#define INT_7XX_CFIREQ (3 + IH2_BASE)
#define INT_7XX_I2C (4 + IH2_BASE)
#define INT_7XX_PCC (5 + IH2_BASE)
#define INT_7XX_MPU_EXT_NIRQ (6 + IH2_BASE)
#define INT_7XX_SPI_100K_1 (7 + IH2_BASE)
#define INT_7XX_SYREN_SPI (8 + IH2_BASE)
#define INT_7XX_VLYNQ (9 + IH2_BASE)
#define INT_7XX_GPIO_BANK4 (10 + IH2_BASE)
#define INT_7XX_McBSP1TX (11 + IH2_BASE)
#define INT_7XX_McBSP1RX (12 + IH2_BASE)
#define INT_7XX_McBSP1RX_OF (13 + IH2_BASE)
#define INT_7XX_UART_MODEM_IRDA_2 (14 + IH2_BASE)
#define INT_7XX_UART_MODEM_1 (15 + IH2_BASE)
#define INT_7XX_MCSI (16 + IH2_BASE)
#define INT_7XX_uWireTX (17 + IH2_BASE)
#define INT_7XX_uWireRX (18 + IH2_BASE)
#define INT_7XX_SMC_CD (19 + IH2_BASE)
#define INT_7XX_SMC_IREQ (20 + IH2_BASE)
#define INT_7XX_HDQ_1WIRE (21 + IH2_BASE)
#define INT_7XX_TIMER32K (22 + IH2_BASE)
#define INT_7XX_MMC_SDIO (23 + IH2_BASE)
#define INT_7XX_UPLD (24 + IH2_BASE)
#define INT_7XX_USB_HHC_1 (27 + IH2_BASE)
#define INT_7XX_USB_HHC_2 (28 + IH2_BASE)
#define INT_7XX_USB_GENI (29 + IH2_BASE)
#define INT_7XX_USB_OTG (30 + IH2_BASE)
#define INT_7XX_CAMERA_IF (31 + IH2_BASE)
#define INT_7XX_RNG (32 + IH2_BASE)
#define INT_7XX_DUAL_MODE_TIMER (33 + IH2_BASE)
#define INT_7XX_DBB_RF_EN (34 + IH2_BASE)
#define INT_7XX_MPUIO_KEYPAD (35 + IH2_BASE)
#define INT_7XX_SHA1_MD5 (36 + IH2_BASE)
#define INT_7XX_SPI_100K_2 (37 + IH2_BASE)
#define INT_7XX_RNG_IDLE (38 + IH2_BASE)
#define INT_7XX_MPUIO (39 + IH2_BASE)
#define INT_7XX_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE)
#define INT_7XX_LLPC_OE_FALLING (41 + IH2_BASE)
#define INT_7XX_LLPC_OE_RISING (42 + IH2_BASE)
#define INT_7XX_LLPC_VSYNC (43 + IH2_BASE)
#define INT_7XX_WAKE_UP_REQ (46 + IH2_BASE)
#define INT_7XX_DMA_CH6 (53 + IH2_BASE)
#define INT_7XX_DMA_CH7 (54 + IH2_BASE)
#define INT_7XX_DMA_CH8 (55 + IH2_BASE)
#define INT_7XX_DMA_CH9 (56 + IH2_BASE)
#define INT_7XX_DMA_CH10 (57 + IH2_BASE)
#define INT_7XX_DMA_CH11 (58 + IH2_BASE)
#define INT_7XX_DMA_CH12 (59 + IH2_BASE)
#define INT_7XX_DMA_CH13 (60 + IH2_BASE)
#define INT_7XX_DMA_CH14 (61 + IH2_BASE)
#define INT_7XX_DMA_CH15 (62 + IH2_BASE)
#define INT_7XX_NAND (63 + IH2_BASE)
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
* 16 MPUIO lines */
#define OMAP_MAX_GPIO_LINES 192
#define IH_GPIO_BASE (128 + IH2_BASE)
#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE)
#define OMAP_IRQ_END (IH_MPUIO_BASE + 16)
/* External FPGA handles interrupts on Innovator boards */
#define OMAP_FPGA_IRQ_BASE (OMAP_IRQ_END)
#ifdef CONFIG_MACH_OMAP_INNOVATOR
#define OMAP_FPGA_NR_IRQS 24
#else
#define OMAP_FPGA_NR_IRQS 0
#endif
#define OMAP_FPGA_IRQ_END (OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS)
#define NR_IRQS OMAP_FPGA_IRQ_END
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
#include <mach/hardware.h>
#ifdef CONFIG_FIQ
#define FIQ_START 1024
#endif
#endif

3
arch/arm/plat-omap/include/plat/omap1510.h → arch/arm/mach-omap1/include/mach/omap1510.h
View File

@ -1,5 +1,4 @@
/* arch/arm/plat-omap/include/mach/omap1510.h
*
/*
* Hardware definitions for TI OMAP1510 processor.
*
* Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>

3
arch/arm/plat-omap/include/plat/omap16xx.h → arch/arm/mach-omap1/include/mach/omap16xx.h
View File

@ -1,5 +1,4 @@
/* arch/arm/plat-omap/include/mach/omap16xx.h
*
/*
* Hardware definitions for TI OMAP1610/5912/1710 processors.
*
* Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>

3
arch/arm/plat-omap/include/plat/omap7xx.h → arch/arm/mach-omap1/include/mach/omap7xx.h
View File

@ -1,5 +1,4 @@
/* arch/arm/plat-omap/include/mach/omap7xx.h
*
/*
* Hardware definitions for TI OMAP7XX processor.
*
* Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>

1
arch/arm/mach-omap1/leds-h2p2-debug.c
View File

@ -14,6 +14,7 @@
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <mach/hardware.h>
#include <asm/leds.h>

1
arch/arm/mach-omap1/leds.c
View File

@ -6,6 +6,7 @@
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_data/gpio-omap.h>
#include <asm/leds.h>
#include <asm/mach-types.h>

0
arch/arm/plat-omap/include/plat/am33xx.h → arch/arm/mach-omap2/am33xx.h
View File

5
arch/arm/mach-omap2/board-2430sdp.c
View File

@ -211,9 +211,6 @@ static struct regulator_init_data sdp2430_vmmc1 = {
};
static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
};
static struct twl4030_platform_data sdp2430_twldata = {
@ -234,7 +231,7 @@ static int __init omap2430_i2c_init(void)
sdp2430_i2c1_boardinfo[0].irq = gpio_to_irq(78);
omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo,
ARRAY_SIZE(sdp2430_i2c1_boardinfo));
omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ,
omap_pmic_init(2, 100, "twl4030", 7 + OMAP_INTC_START,
&sdp2430_twldata);
return 0;
}

4
arch/arm/mach-omap2/board-3430sdp.c
View File

@ -25,7 +25,6 @@
#include <linux/gpio.h>
#include <linux/mmc/host.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -229,9 +228,6 @@ static int sdp3430_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
| BIT(16) | BIT(17),
.setup = sdp3430_twl_gpio_setup,

5
arch/arm/mach-omap2/board-4430sdp.c
View File

@ -28,7 +28,6 @@
#include <linux/leds_pwm.h>
#include <linux/platform_data/omap4-keypad.h>
#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -44,6 +43,7 @@
#include <linux/wl12xx.h>
#include <linux/platform_data/omap-abe-twl6040.h>
#include "soc.h"
#include "mux.h"
#include "hsmmc.h"
#include "control.h"
@ -543,7 +543,6 @@ static struct twl6040_platform_data twl6040_data = {
.codec = &twl6040_codec,
.vibra = &twl6040_vibra,
.audpwron_gpio = 127,
.irq_base = TWL6040_CODEC_IRQ_BASE,
};
static struct twl4030_platform_data sdp4430_twldata = {
@ -580,7 +579,7 @@ static int __init omap4_i2c_init(void)
TWL_COMMON_REGULATOR_V1V8 |
TWL_COMMON_REGULATOR_V2V1);
omap4_pmic_init("twl6030", &sdp4430_twldata,
&twl6040_data, OMAP44XX_IRQ_SYS_2N);
&twl6040_data, 119 + OMAP44XX_IRQ_GIC_START);
omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
ARRAY_SIZE(sdp4430_i2c_3_boardinfo));

1
arch/arm/mach-omap2/board-am3517crane.c
View File

@ -21,7 +21,6 @@
#include <linux/init.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

5
arch/arm/mach-omap2/board-am3517evm.c
View File

@ -25,8 +25,8 @@
#include <linux/can/platform/ti_hecc.h>
#include <linux/davinci_emac.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/gpio-omap.h>
#include <mach/hardware.h>
#include <mach/am35xx.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -295,8 +295,7 @@ static struct resource am3517_hecc_resources[] = {
.flags = IORESOURCE_MEM,
},
{
.start = INT_35XX_HECC0_IRQ,
.end = INT_35XX_HECC0_IRQ,
.start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
},
};

1
arch/arm/mach-omap2/board-apollon.c
View File

@ -29,7 +29,6 @@
#include <linux/smc91x.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>

4
arch/arm/mach-omap2/board-cm-t35.c
View File

@ -23,6 +23,7 @@
#include <linux/input/matrix_keypad.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/twl.h>
@ -469,9 +470,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
}
static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.setup = cm_t35_twl_gpio_setup,
};

3
arch/arm/mach-omap2/board-cm-t3517.c
View File

@ -89,8 +89,7 @@ static struct resource cm_t3517_hecc_resources[] = {
.flags = IORESOURCE_MEM,
},
{
.start = INT_35XX_HECC0_IRQ,
.end = INT_35XX_HECC0_IRQ,
.start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
},
};

6
arch/arm/mach-omap2/board-devkit8000.c
View File

@ -32,8 +32,6 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <mach/hardware.h>
#include <mach/id.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -55,7 +53,6 @@
#include <linux/interrupt.h>
#include "sdram-micron-mt46h32m32lf-6.h"
#include "mux.h"
#include "hsmmc.h"
#include "common-board-devices.h"
@ -235,9 +232,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
| BIT(15) | BIT(16) | BIT(17),

4
arch/arm/mach-omap2/board-flash.c
View File

@ -16,13 +16,14 @@
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/io.h>
#include <plat/irqs.h>
#include <plat/cpu.h>
#include <plat/gpmc.h>
#include <plat/nand.h>
#include <plat/onenand.h>
#include <plat/tc.h>
#include "common.h"
#include "board-flash.h"
#define REG_FPGA_REV 0x10
@ -140,7 +141,6 @@ __init board_nand_init(struct mtd_partition *nand_parts,
board_nand_data.devsize = nand_type;
board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
gpmc_nand_init(&board_nand_data);
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */

1
arch/arm/mach-omap2/board-generic.c
View File

@ -16,7 +16,6 @@
#include <linux/of_platform.h>
#include <linux/irqdomain.h>
#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>

3
arch/arm/mach-omap2/board-h4.c
View File

@ -27,12 +27,10 @@
#include <linux/io.h>
#include <linux/input/matrix_keypad.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "common.h"
#include <plat/menelaus.h>
#include <plat/dma.h>
#include <plat/gpmc.h>
@ -41,6 +39,7 @@
#include <video/omapdss.h>
#include <video/omap-panel-generic-dpi.h>
#include "common.h"
#include "mux.h"
#include "control.h"

4
arch/arm/mach-omap2/board-igep0020.c
View File

@ -32,6 +32,7 @@
#include "common.h"
#include <plat/gpmc.h>
#include <plat/usb.h>
#include <video/omapdss.h>
#include <video/omap-panel-tfp410.h>
#include <plat/onenand.h>
@ -424,9 +425,6 @@ static int igep_twl_gpio_setup(struct device *dev,
};
static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = igep_twl_gpio_setup,
};

6
arch/arm/mach-omap2/board-ldp.c
View File

@ -29,7 +29,6 @@
#include <linux/smsc911x.h>
#include <linux/mmc/host.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -38,8 +37,6 @@
#include "common.h"
#include <plat/gpmc.h>
#include <mach/board-zoom.h>
#include <asm/delay.h>
#include <plat/usb.h>
#include <plat/gpmc-smsc911x.h>
@ -274,9 +271,6 @@ static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio)
}
static struct twl4030_gpio_platform_data ldp_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.setup = ldp_twl_gpio_setup,
};

4
arch/arm/mach-omap2/board-n8x0.c
View File

@ -27,11 +27,9 @@
#include "common.h"
#include <plat/menelaus.h>
#include <mach/irqs.h>
#include <plat/mcspi.h>
#include <plat/onenand.h>
#include <plat/mmc.h>
#include <plat/serial.h>
#include "mux.h"
@ -599,7 +597,7 @@ static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = {
{
I2C_BOARD_INFO("menelaus", 0x72),
.irq = INT_24XX_SYS_NIRQ,
.irq = 7 + OMAP_INTC_START,
.platform_data = &n8x0_menelaus_platform_data,
},
};

4
arch/arm/mach-omap2/board-omap3beagle.c
View File

@ -33,7 +33,6 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -296,9 +295,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data beagle_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pullups = BIT(1),
.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)

4
arch/arm/mach-omap2/board-omap3evm.c
View File

@ -40,7 +40,6 @@
#include <linux/mmc/host.h>
#include <linux/export.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -388,9 +387,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = omap3evm_twl_gpio_setup,
};

17
arch/arm/mach-omap2/board-omap3logic.c
View File

@ -30,23 +30,21 @@
#include <linux/i2c/twl.h>
#include <linux/mmc/host.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "mux.h"
#include "hsmmc.h"
#include "control.h"
#include "common-board-devices.h"
#include <plat/mux.h>
#include "common.h"
#include <plat/gpmc-smsc911x.h>
#include <plat/gpmc.h>
#include <plat/sdrc.h>
#include <plat/usb.h>
#include "common.h"
#include "mux.h"
#include "hsmmc.h"
#include "control.h"
#include "common-board-devices.h"
#define OMAP3LOGIC_SMSC911X_CS 1
#define OMAP3530_LV_SOM_MMC_GPIO_CD 110
@ -77,9 +75,6 @@ static struct regulator_init_data omap3logic_vmmc1 = {
};
static struct twl4030_gpio_platform_data omap3logic_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pullups = BIT(1),
.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8)

4
arch/arm/mach-omap2/board-omap3pandora.c
View File

@ -41,7 +41,6 @@
#include <asm/mach/map.h>
#include "common.h"
#include <mach/hardware.h>
#include <plat/mcspi.h>
#include <plat/usb.h>
#include <video/omapdss.h>
@ -320,9 +319,6 @@ static int omap3pandora_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.setup = omap3pandora_twl_gpio_setup,
};

9
arch/arm/mach-omap2/board-omap3stalker.c
View File

@ -28,8 +28,12 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <linux/mmc/host.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/interrupt.h>
#include <linux/smsc911x.h>
#include <linux/i2c/at24.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -278,9 +282,6 @@ omap3stalker_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data omap3stalker_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = omap3stalker_twl_gpio_setup,
};

4
arch/arm/mach-omap2/board-omap3touchbook.c
View File

@ -37,7 +37,6 @@
#include <linux/regulator/machine.h>
#include <linux/i2c/twl.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -138,9 +137,6 @@ static int touchbook_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data touchbook_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.pullups = BIT(1),
.pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13)

5
arch/arm/mach-omap2/board-omap4panda.c
View File

@ -32,7 +32,6 @@
#include <linux/wl12xx.h>
#include <linux/platform_data/omap-abe-twl6040.h>
#include <mach/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -44,6 +43,7 @@
#include <plat/mmc.h>
#include <video/omap-panel-tfp410.h>
#include "soc.h"
#include "hsmmc.h"
#include "control.h"
#include "mux.h"
@ -262,7 +262,6 @@ static struct twl6040_codec_data twl6040_codec = {
static struct twl6040_platform_data twl6040_data = {
.codec = &twl6040_codec,
.audpwron_gpio = 127,
.irq_base = TWL6040_CODEC_IRQ_BASE,
};
/* Panda board uses the common PMIC configuration */
@ -293,7 +292,7 @@ static int __init omap4_panda_i2c_init(void)
TWL_COMMON_REGULATOR_V1V8 |
TWL_COMMON_REGULATOR_V2V1);
omap4_pmic_init("twl6030", &omap4_panda_twldata,
&twl6040_data, OMAP44XX_IRQ_SYS_2N);
&twl6040_data, 119 + OMAP44XX_IRQ_GIC_START);
omap_register_i2c_bus(2, 400, NULL, 0);
/*
* Bus 3 is attached to the DVI port where devices like the pico DLP

5
arch/arm/mach-omap2/board-overo.c
View File

@ -47,10 +47,8 @@
#include <video/omap-panel-generic-dpi.h>
#include <video/omap-panel-tfp410.h>
#include <plat/gpmc.h>
#include <mach/hardware.h>
#include <plat/nand.h>
#include <plat/mcspi.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include "mux.h"
@ -398,9 +396,6 @@ static int overo_twl_gpio_setup(struct device *dev,
}
static struct twl4030_gpio_platform_data overo_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.use_leds = true,
.setup = overo_twl_gpio_setup,
};

6
arch/arm/mach-omap2/board-rm680.c
View File

@ -27,6 +27,7 @@
#include <plat/gpmc.h>
#include "common.h"
#include <plat/onenand.h>
#include <plat/serial.h>
#include "mux.h"
#include "hsmmc.h"
@ -72,9 +73,6 @@ static struct platform_device *rm680_peripherals_devices[] __initdata = {
/* TWL */
static struct twl4030_gpio_platform_data rm680_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.pullups = BIT(0),
.pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15),
};
@ -87,7 +85,7 @@ static struct twl4030_platform_data rm680_twl_data = {
static void __init rm680_i2c_init(void)
{
omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0);
omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data);
omap_pmic_init(1, 2900, "twl5031", 7 + OMAP_INTC_START, &rm680_twl_data);
omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0);
}

5
arch/arm/mach-omap2/board-rx51-peripherals.c
View File

@ -773,9 +773,6 @@ static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
}
static struct twl4030_gpio_platform_data rx51_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
| BIT(4) | BIT(5)
| BIT(8) | BIT(9) | BIT(10) | BIT(11)
@ -1050,7 +1047,7 @@ static int __init rx51_i2c_init(void)
rx51_twldata.vdac->constraints.apply_uV = true;
rx51_twldata.vdac->constraints.name = "VDAC";
omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)

1
arch/arm/mach-omap2/board-rx51.c
View File

@ -18,7 +18,6 @@
#include <linux/gpio.h>
#include <linux/leds.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

2
arch/arm/mach-omap2/board-ti8168evm.c
View File

@ -15,12 +15,10 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/irqs.h>
#include "common.h"
#include <plat/usb.h>

3
arch/arm/mach-omap2/board-zoom-debugboard.c
View File

@ -22,6 +22,9 @@
#include <mach/board-zoom.h>
#include "soc.h"
#include "common.h"
#define ZOOM_SMSC911X_CS 7
#define ZOOM_SMSC911X_GPIO 158
#define ZOOM_QUADUART_CS 3

2
arch/arm/mach-omap2/board-zoom-display.c
View File

@ -18,6 +18,8 @@
#include <video/omapdss.h>
#include <mach/board-zoom.h>
#include "common.h"
#define LCD_PANEL_RESET_GPIO_PROD 96
#define LCD_PANEL_RESET_GPIO_PILOT 55
#define LCD_PANEL_QVGA_GPIO 56

6
arch/arm/mach-omap2/board-zoom-peripherals.c
View File

@ -19,6 +19,7 @@
#include <linux/regulator/fixed.h>
#include <linux/wl12xx.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/gpio-omap.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -251,9 +252,6 @@ static void zoom2_set_hs_extmute(int mute)
}
static struct twl4030_gpio_platform_data zoom_gpio_data = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end = TWL4030_GPIO_IRQ_END,
.setup = zoom_twl_gpio_setup,
};
@ -281,7 +279,7 @@ static int __init omap_i2c_init(void)
codec_data->hs_extmute = 1;
codec_data->set_hs_extmute = zoom2_set_hs_extmute;
}
omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata);
omap_pmic_init(1, 2400, "twl5030", 7 + OMAP_INTC_START, &zoom_twldata);
omap_register_i2c_bus(2, 400, NULL, 0);
omap_register_i2c_bus(3, 400, NULL, 0);
return 0;

2
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
View File

@ -33,11 +33,11 @@
#include <linux/cpufreq.h>
#include <linux/slab.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
#include "soc.h"
#include "clock.h"
#include "clock2xxx.h"
#include "opp2xxx.h"

2
arch/arm/mach-omap2/clkt_dpll.c
View File

@ -22,8 +22,8 @@
#include <asm/div64.h>
#include <plat/clock.h>
#include <plat/cpu.h>
#include "soc.h"
#include "clock.h"
#include "cm-regbits-24xx.h"
#include "cm-regbits-34xx.h"

8
arch/arm/mach-omap2/clock.c
View File

@ -22,14 +22,16 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <trace/events/power.h>
#include <asm/cpu.h>
#include <plat/clock.h>
#include "clockdomain.h"
#include <plat/cpu.h>
#include <plat/prcm.h>
#include <trace/events/power.h>
#include "soc.h"
#include "clockdomain.h"
#include "clock.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"

2
arch/arm/mach-omap2/clock2420_data.c
View File

@ -18,9 +18,9 @@
#include <linux/clk.h>
#include <linux/list.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock2xxx.h"

2
arch/arm/mach-omap2/clock2430.c
View File

@ -21,9 +21,9 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/clock.h>
#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock2xxx.h"

2
arch/arm/mach-omap2/clock2430_data.c
View File

@ -17,9 +17,9 @@
#include <linux/clk.h>
#include <linux/list.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock2xxx.h"

2
arch/arm/mach-omap2/clock2xxx.c
View File

@ -22,9 +22,9 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include "soc.h"
#include "clock.h"
#include "clock2xxx.h"
#include "cm.h"

2
arch/arm/mach-omap2/clock33xx_data.c
View File

@ -18,8 +18,8 @@
#include <linux/list.h>
#include <linux/clk.h>
#include <plat/clkdev_omap.h>
#include <plat/am33xx.h>
#include "am33xx.h"
#include "iomap.h"
#include "control.h"
#include "clock.h"

2
arch/arm/mach-omap2/clock3xxx.c
View File

@ -21,9 +21,9 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/clock.h>
#include "soc.h"
#include "clock.h"
#include "clock3xxx.h"
#include "prm2xxx_3xxx.h"

2
arch/arm/mach-omap2/clock3xxx_data.c
View File

@ -21,9 +21,9 @@
#include <linux/list.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock3xxx.h"

2
arch/arm/mach-omap2/clock44xx_data.c
View File

@ -28,9 +28,9 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "soc.h"
#include "iomap.h"
#include "clock.h"
#include "clock44xx.h"

3
arch/arm/mach-omap2/cm2xxx_3xxx.c
View File

@ -18,8 +18,7 @@
#include <linux/err.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "cm.h"

1
arch/arm/mach-omap2/common-board-devices.c
View File

@ -27,6 +27,7 @@
#include <plat/mcspi.h>
#include <plat/nand.h>
#include "common.h"
#include "common-board-devices.h"
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \

2
arch/arm/mach-omap2/common.c
View File

@ -17,10 +17,10 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/mux.h>
#include <plat/clock.h>
#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "sdrc.h"

9
arch/arm/mach-omap2/common.h
View File

@ -26,11 +26,18 @@
#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#ifndef __ASSEMBLER__
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/i2c/twl.h>
#include <plat/common.h>
#include <asm/proc-fns.h>
#include <plat/cpu.h>
#include <plat/serial.h>
#include <plat/common.h>
#define OMAP_INTC_START NR_IRQS
#ifdef CONFIG_SOC_OMAP2420
extern void omap242x_map_common_io(void);
#else

2
arch/arm/mach-omap2/control.c
View File

@ -15,9 +15,9 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/sdrc.h>
#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "cm-regbits-34xx.h"

2
arch/arm/mach-omap2/control.h
View File

@ -21,7 +21,7 @@
#include <mach/ctrl_module_pad_core_44xx.h>
#include <mach/ctrl_module_pad_wkup_44xx.h>
#include <plat/am33xx.h>
#include "am33xx.h"
#ifndef __ASSEMBLY__
#define OMAP242X_CTRL_REGADDR(reg) \

1
arch/arm/mach-omap2/cpuidle34xx.c
View File

@ -28,7 +28,6 @@
#include <linux/cpu_pm.h>
#include <plat/prcm.h>
#include <plat/irqs.h>
#include "powerdomain.h"
#include "clockdomain.h"

18
arch/arm/mach-omap2/devices.c
View File

@ -19,8 +19,6 @@
#include <linux/of.h>
#include <linux/platform_data/omap4-keypad.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
@ -30,6 +28,8 @@
#include <plat/omap_device.h>
#include <plat/omap4-keypad.h>
#include "soc.h"
#include "common.h"
#include "mux.h"
#include "control.h"
#include "devices.h"
@ -110,7 +110,7 @@ static struct resource omap2cam_resources[] = {
.flags = IORESOURCE_MEM,
},
{
.start = INT_24XX_CAM_IRQ,
.start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
}
};
@ -199,7 +199,7 @@ static struct resource omap3isp_resources[] = {
.flags = IORESOURCE_MEM,
},
{
.start = INT_34XX_CAM_IRQ,
.start = 24 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
}
};
@ -433,14 +433,12 @@ static inline void omap_init_mcspi(void) {}
#endif
static struct resource omap2_pmu_resource = {
.start = 3,
.end = 3,
.start = 3 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
};
static struct resource omap3_pmu_resource = {
.start = INT_34XX_BENCH_MPU_EMUL,
.end = INT_34XX_BENCH_MPU_EMUL,
.start = 3 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
};
@ -473,7 +471,7 @@ static struct resource omap2_sham_resources[] = {
.flags = IORESOURCE_MEM,
},
{
.start = INT_24XX_SHA1MD5,
.start = 51 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
}
};
@ -491,7 +489,7 @@ static struct resource omap3_sham_resources[] = {
.flags = IORESOURCE_MEM,
},
{
.start = INT_34XX_SHA1MD52_IRQ,
.start = 49 + OMAP_INTC_START,
.flags = IORESOURCE_IRQ,
},
{

2
arch/arm/mach-omap2/dpll3xxx.c
View File

@ -28,9 +28,9 @@
#include <linux/bitops.h>
#include <linux/clkdev.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include "soc.h"
#include "clock.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-34xx.h"

2
arch/arm/mach-omap2/dpll44xx.c
View File

@ -15,9 +15,9 @@
#include <linux/io.h>
#include <linux/bitops.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include "soc.h"
#include "clock.h"
#include "clock44xx.h"
#include "cm-regbits-44xx.h"

3
arch/arm/mach-omap2/emu.c
View File

@ -21,8 +21,7 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <mach/hardware.h>
#include "soc.h"
#include "iomap.h"
MODULE_LICENSE("GPL");

1
arch/arm/mach-omap2/gpio.c
View File

@ -21,6 +21,7 @@
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/of.h>
#include <linux/platform_data/gpio-omap.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>

3
arch/arm/mach-omap2/gpmc-nand.c
View File

@ -16,10 +16,11 @@
#include <asm/mach/flash.h>
#include <plat/cpu.h>
#include <plat/nand.h>
#include <plat/gpmc.h>
#include "soc.h"
static struct resource gpmc_nand_resource[] = {
{
.flags = IORESOURCE_MEM,

3
arch/arm/mach-omap2/gpmc-onenand.c
View File

@ -18,10 +18,11 @@
#include <asm/mach/flash.h>
#include <plat/cpu.h>
#include <plat/onenand.h>
#include <plat/gpmc.h>
#include "soc.h"
#define ONENAND_IO_SIZE SZ_128K
static struct omap_onenand_platform_data *gpmc_onenand_data;

2
arch/arm/mach-omap2/gpmc-smc91x.c
View File

@ -20,6 +20,8 @@
#include <plat/gpmc.h>
#include <plat/gpmc-smc91x.h>
#include "soc.h"
static struct omap_smc91x_platform_data *gpmc_cfg;
static struct resource gpmc_smc91x_resources[] = {

11
arch/arm/mach-omap2/gpmc.c
View File

@ -28,8 +28,13 @@
#include <asm/mach-types.h>
#include <plat/gpmc.h>
#include <plat/cpu.h>
#include <plat/gpmc.h>
#include <plat/sdrc.h>
#include "soc.h"
#include "common.h"
/* GPMC register offsets */
#define GPMC_REVISION 0x00
#define GPMC_SYSCONFIG 0x10
@ -846,16 +851,16 @@ static int __init gpmc_init(void)
l = OMAP2420_GPMC_BASE;
else
l = OMAP34XX_GPMC_BASE;
gpmc_irq = INT_34XX_GPMC_IRQ;
gpmc_irq = 20 + OMAP_INTC_START;
} else if (cpu_is_omap34xx()) {
ck = "gpmc_fck";
l = OMAP34XX_GPMC_BASE;
gpmc_irq = INT_34XX_GPMC_IRQ;
gpmc_irq = 20 + OMAP_INTC_START;
} else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
/* Base address and irq number are same for OMAP4/5 */
ck = "gpmc_ck";
l = OMAP44XX_GPMC_BASE;
gpmc_irq = OMAP44XX_IRQ_GPMC;
gpmc_irq = 20 + OMAP44XX_IRQ_GIC_START;
}
if (WARN_ON(!ck))

2
arch/arm/mach-omap2/hsmmc.c
View File

@ -15,6 +15,8 @@
#include <linux/delay.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <linux/platform_data/gpio-omap.h>
#include <plat/mmc.h>
#include <plat/omap-pm.h>
#include <plat/mux.h>

1
arch/arm/mach-omap2/i2c.c
View File

@ -19,7 +19,6 @@
*
*/
#include <plat/cpu.h>
#include <plat/i2c.h>
#include "common.h"
#include <plat/omap_hwmod.h>

2
arch/arm/mach-omap2/id.c
View File

@ -22,10 +22,10 @@
#include <asm/cputype.h>
#include "common.h"
#include <plat/cpu.h>
#include <mach/id.h>
#include "soc.h"
#include "control.h"
static unsigned int omap_revision;

2
arch/arm/mach-omap2/include/mach/gpio.h
View File

@ -1,5 +1,3 @@
/*
* arch/arm/mach-omap2/include/mach/gpio.h
*/
#include <plat/gpio.h>

2
arch/arm/mach-omap2/include/mach/hardware.h
View File

@ -1,5 +1,3 @@
/*
* arch/arm/mach-omap2/include/mach/hardware.h
*/
#include <plat/hardware.h>

2
arch/arm/mach-omap2/include/mach/irqs.h
View File

@ -1,5 +1,3 @@
/*
* arch/arm/mach-omap2/include/mach/irqs.h
*/
#include <plat/irqs.h>

1
arch/arm/mach-omap2/io.c
View File

@ -33,6 +33,7 @@
#include <plat/multi.h>
#include <plat/dma.h>
#include "soc.h"
#include "iomap.h"
#include "voltage.h"
#include "powerdomain.h"

5
arch/arm/mach-omap2/irq.c
View File

@ -23,8 +23,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <mach/hardware.h>
#include "soc.h"
#include "iomap.h"
#include "common.h"
@ -49,6 +48,8 @@
#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
#define INTCPS_NR_MIR_REGS 3
#define INTCPS_NR_IRQS 96
/*
* OMAP2 has a number of different interrupt controllers, each interrupt

4
arch/arm/mach-omap2/mailbox.c
View File

@ -16,8 +16,10 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/pm_runtime.h>
#include <plat/mailbox.h>
#include <mach/irqs.h>
#include "soc.h"
#define MAILBOX_REVISION 0x000
#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))

2
arch/arm/mach-omap2/mcbsp.c
View File

@ -18,9 +18,7 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <mach/irqs.h>
#include <plat/dma.h>
#include <plat/cpu.h>
#include <plat/mcbsp.h>
#include <plat/omap_device.h>
#include <linux/pm_runtime.h>

1
arch/arm/mach-omap2/msdi.c
View File

@ -23,6 +23,7 @@
#include <linux/kernel.h>
#include <linux/err.h>
#include <linux/platform_data/gpio-omap.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>

12
arch/arm/mach-omap2/omap-iommu.c
View File

@ -14,7 +14,9 @@
#include <linux/platform_device.h>
#include <plat/iommu.h>
#include <plat/irqs.h>
#include "soc.h"
#include "common.h"
struct iommu_device {
resource_size_t base;
@ -29,7 +31,7 @@ static int num_iommu_devices;
static struct iommu_device omap3_devices[] = {
{
.base = 0x480bd400,
.irq = 24,
.irq = 24 + OMAP_INTC_START,
.pdata = {
.name = "isp",
.nr_tlb_entries = 8,
@ -41,7 +43,7 @@ static struct iommu_device omap3_devices[] = {
#if defined(CONFIG_OMAP_IOMMU_IVA2)
{
.base = 0x5d000000,
.irq = 28,
.irq = 28 + OMAP_INTC_START,
.pdata = {
.name = "iva2",
.nr_tlb_entries = 32,
@ -64,7 +66,7 @@ static struct platform_device *omap3_iommu_pdev[NR_OMAP3_IOMMU_DEVICES];
static struct iommu_device omap4_devices[] = {
{
.base = OMAP4_MMU1_BASE,
.irq = OMAP44XX_IRQ_DUCATI_MMU,
.irq = 100 + OMAP44XX_IRQ_GIC_START,
.pdata = {
.name = "ducati",
.nr_tlb_entries = 32,
@ -75,7 +77,7 @@ static struct iommu_device omap4_devices[] = {
},
{
.base = OMAP4_MMU2_BASE,
.irq = OMAP44XX_IRQ_TESLA_MMU,
.irq = 28 + OMAP44XX_IRQ_GIC_START,
.pdata = {
.name = "tesla",
.nr_tlb_entries = 32,

3
arch/arm/mach-omap2/omap-mpuss-lowpower.c
View File

@ -50,9 +50,8 @@
#include <asm/suspend.h>
#include <asm/hardware/cache-l2x0.h>
#include <plat/omap44xx.h>
#include "common.h"
#include "omap44xx.h"
#include "omap4-sar-layout.h"
#include "pm.h"
#include "prcm_mpu44xx.h"

2
arch/arm/mach-omap2/omap-smp.c
View File

@ -24,11 +24,11 @@
#include <asm/hardware/gic.h>
#include <asm/smp_scu.h>
#include <mach/hardware.h>
#include <mach/omap-secure.h>
#include <mach/omap-wakeupgen.h>
#include <asm/cputype.h>
#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "clockdomain.h"

1
arch/arm/mach-omap2/omap-wakeupgen.c
View File

@ -30,6 +30,7 @@
#include <mach/omap-wakeupgen.h>
#include <mach/omap-secure.h>
#include "soc.h"
#include "omap4-sar-layout.h"
#include "common.h"

2
arch/arm/plat-omap/include/plat/omap24xx.h → arch/arm/mach-omap2/omap24xx.h
View File

@ -1,6 +1,4 @@
/*
* arch/arm/plat-omap/include/mach/omap24xx.h
*
* This file contains the processor specific definitions
* of the TI OMAP24XX.
*

2
arch/arm/plat-omap/include/plat/omap34xx.h → arch/arm/mach-omap2/omap34xx.h
View File

@ -1,6 +1,4 @@
/*
* arch/arm/plat-omap/include/mach/omap34xx.h
*
* This file contains the processor specific definitions of the TI OMAP34XX.
*
* Copyright (C) 2007 Texas Instruments.

9
arch/arm/mach-omap2/omap4-common.c
View File

@ -16,26 +16,25 @@
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/memblock.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/export.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/map.h>
#include <asm/memblock.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <plat/irqs.h>
#include <plat/sram.h>
#include <plat/omap-secure.h>
#include <plat/mmc.h>
#include <mach/hardware.h>
#include <mach/omap-wakeupgen.h>
#include "soc.h"
#include "common.h"
#include "hsmmc.h"
#include "omap4-sar-layout.h"
#include <linux/export.h>
#ifdef CONFIG_CACHE_L2X0
static void __iomem *l2cache_base;

2
arch/arm/plat-omap/include/plat/omap44xx.h → arch/arm/mach-omap2/omap44xx.h
View File

@ -39,12 +39,12 @@
#define IRQ_SIR_IRQ 0x0040
#define OMAP44XX_GIC_DIST_BASE 0x48241000
#define OMAP44XX_GIC_CPU_BASE 0x48240100
#define OMAP44XX_IRQ_GIC_START 32
#define OMAP44XX_SCU_BASE 0x48240000
#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
#define OMAP44XX_L2CACHE_BASE 0x48242000
#define OMAP44XX_WKUPGEN_BASE 0x48281000
#define OMAP44XX_MCPDM_BASE 0x40132000
#define OMAP44XX_MCPDM_L3_BASE 0x49032000
#define OMAP44XX_SAR_RAM_BASE 0x4a326000
#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)

0
arch/arm/plat-omap/include/plat/omap54xx.h → arch/arm/mach-omap2/omap54xx.h
View File

8
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -139,14 +139,14 @@
#include <linux/slab.h>
#include <linux/bootmem.h>
#include "common.h"
#include <plat/cpu.h>
#include "clockdomain.h"
#include "powerdomain.h"
#include <plat/clock.h>
#include <plat/omap_hwmod.h>
#include <plat/prcm.h>
#include "soc.h"
#include "common.h"
#include "clockdomain.h"
#include "powerdomain.h"
#include "cm2xxx_3xxx.h"
#include "cminst44xx.h"
#include "prm2xxx_3xxx.h"

25
arch/arm/mach-omap2/omap_hwmod_2420_data.c
View File

@ -13,12 +13,9 @@
* XXX these should be marked initdata for multi-OMAP kernels
*/
#include <plat/omap_hwmod.h>
#include <mach/irqs.h>
#include <plat/cpu.h>
#include <plat/dma.h>
#include <plat/serial.h>
#include <plat/i2c.h>
#include <plat/gpio.h>
#include <plat/mcspi.h>
#include <plat/dmtimer.h>
#include <plat/l3_2xxx.h>
@ -162,9 +159,9 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
/* mailbox */
static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
{ .name = "dsp", .irq = 26 },
{ .name = "iva", .irq = 34 },
{ .irq = -1 }
{ .name = "dsp", .irq = 26 + OMAP_INTC_START, },
{ .name = "iva", .irq = 34 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod omap2420_mailbox_hwmod = {
@ -199,9 +196,9 @@ static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
/* mcbsp1 */
static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
{ .name = "tx", .irq = 59 },
{ .name = "rx", .irq = 60 },
{ .irq = -1 }
{ .name = "tx", .irq = 59 + OMAP_INTC_START, },
{ .name = "rx", .irq = 60 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod omap2420_mcbsp1_hwmod = {
@ -225,9 +222,9 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
/* mcbsp2 */
static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
{ .name = "tx", .irq = 62 },
{ .name = "rx", .irq = 63 },
{ .irq = -1 }
{ .name = "tx", .irq = 62 + OMAP_INTC_START, },
{ .name = "rx", .irq = 63 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod omap2420_mcbsp2_hwmod = {
@ -265,8 +262,8 @@ static struct omap_hwmod_class omap2420_msdi_hwmod_class = {
/* msdi1 */
static struct omap_hwmod_irq_info omap2420_msdi1_irqs[] = {
{ .irq = 83 },
{ .irq = -1 }
{ .irq = 83 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod_dma_info omap2420_msdi1_sdma_reqs[] = {

73
arch/arm/mach-omap2/omap_hwmod_2430_data.c
View File

@ -13,20 +13,17 @@
* XXX these should be marked initdata for multi-OMAP kernels
*/
#include <plat/omap_hwmod.h>
#include <mach/irqs.h>
#include <plat/cpu.h>
#include <plat/dma.h>
#include <plat/serial.h>
#include <plat/i2c.h>
#include <plat/gpio.h>
#include <plat/mcbsp.h>
#include <plat/mcspi.h>
#include <plat/dmtimer.h>
#include <plat/mmc.h>
#include <plat/l3_2xxx.h>
#include "soc.h"
#include "omap_hwmod_common_data.h"
#include "prm-regbits-24xx.h"
#include "cm-regbits-24xx.h"
#include "wd_timer.h"
@ -133,8 +130,8 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
/* gpio5 */
static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
{ .irq = 33 }, /* INT_24XX_GPIO_BANK5 */
{ .irq = -1 }
{ .irq = 33 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK5 */
{ .irq = -1 },
};
static struct omap_hwmod omap2430_gpio5_hwmod = {
@ -173,8 +170,8 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
/* mailbox */
static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
{ .irq = 26 },
{ .irq = -1 }
{ .irq = 26 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod omap2430_mailbox_hwmod = {
@ -195,8 +192,8 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
/* mcspi3 */
static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = {
{ .irq = 91 },
{ .irq = -1 }
{ .irq = 91 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
@ -250,9 +247,9 @@ static struct omap_hwmod_class usbotg_class = {
/* usb_otg_hs */
static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = {
{ .name = "mc", .irq = 92 },
{ .name = "dma", .irq = 93 },
{ .irq = -1 }
{ .name = "mc", .irq = 92 + OMAP_INTC_START, },
{ .name = "dma", .irq = 93 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod omap2430_usbhsotg_hwmod = {
@ -303,11 +300,11 @@ static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
/* mcbsp1 */
static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
{ .name = "tx", .irq = 59 },
{ .name = "rx", .irq = 60 },
{ .name = "ovr", .irq = 61 },
{ .name = "common", .irq = 64 },
{ .irq = -1 }
{ .name = "tx", .irq = 59 + OMAP_INTC_START, },
{ .name = "rx", .irq = 60 + OMAP_INTC_START, },
{ .name = "ovr", .irq = 61 + OMAP_INTC_START, },
{ .name = "common", .irq = 64 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod omap2430_mcbsp1_hwmod = {
@ -331,10 +328,10 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
/* mcbsp2 */
static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
{ .name = "tx", .irq = 62 },
{ .name = "rx", .irq = 63 },
{ .name = "common", .irq = 16 },
{ .irq = -1 }
{ .name = "tx", .irq = 62 + OMAP_INTC_START, },
{ .name = "rx", .irq = 63 + OMAP_INTC_START, },
{ .name = "common", .irq = 16 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod omap2430_mcbsp2_hwmod = {
@ -358,10 +355,10 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
/* mcbsp3 */
static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
{ .name = "tx", .irq = 89 },
{ .name = "rx", .irq = 90 },
{ .name = "common", .irq = 17 },
{ .irq = -1 }
{ .name = "tx", .irq = 89 + OMAP_INTC_START, },
{ .name = "rx", .irq = 90 + OMAP_INTC_START, },
{ .name = "common", .irq = 17 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod omap2430_mcbsp3_hwmod = {
@ -385,10 +382,10 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
/* mcbsp4 */
static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
{ .name = "tx", .irq = 54 },
{ .name = "rx", .irq = 55 },
{ .name = "common", .irq = 18 },
{ .irq = -1 }
{ .name = "tx", .irq = 54 + OMAP_INTC_START, },
{ .name = "rx", .irq = 55 + OMAP_INTC_START, },
{ .name = "common", .irq = 18 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
@ -418,10 +415,10 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
/* mcbsp5 */
static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
{ .name = "tx", .irq = 81 },
{ .name = "rx", .irq = 82 },
{ .name = "common", .irq = 19 },
{ .irq = -1 }
{ .name = "tx", .irq = 81 + OMAP_INTC_START, },
{ .name = "rx", .irq = 82 + OMAP_INTC_START, },
{ .name = "common", .irq = 19 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
@ -468,8 +465,8 @@ static struct omap_hwmod_class omap2430_mmc_class = {
/* MMC/SD/SDIO1 */
static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {
{ .irq = 83 },
{ .irq = -1 }
{ .irq = 83 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = {
@ -509,8 +506,8 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
/* MMC/SD/SDIO2 */
static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {
{ .irq = 86 },
{ .irq = -1 }
{ .irq = 86 + OMAP_INTC_START, },
{ .irq = -1 },
};
static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = {

108
arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
View File

@ -15,8 +15,6 @@
#include <plat/common.h>
#include <plat/hdq1w.h>
#include <mach/irqs.h>
#include "omap_hwmod_common_data.h"
/* UART */
@ -182,126 +180,126 @@ struct omap_hwmod_class iva_hwmod_class = {
/* Common MPU IRQ line data */
struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = {
{ .irq = 37, },
{ .irq = -1 }
{ .irq = 37 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = {
{ .irq = 38, },
{ .irq = -1 }
{ .irq = 38 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = {
{ .irq = 39, },
{ .irq = -1 }
{ .irq = 39 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = {
{ .irq = 40, },
{ .irq = -1 }
{ .irq = 40 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = {
{ .irq = 41, },
{ .irq = -1 }
{ .irq = 41 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = {
{ .irq = 42, },
{ .irq = -1 }
{ .irq = 42 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = {
{ .irq = 43, },
{ .irq = -1 }
{ .irq = 43 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = {
{ .irq = 44, },
{ .irq = -1 }
{ .irq = 44 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = {
{ .irq = 45, },
{ .irq = -1 }
{ .irq = 45 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = {
{ .irq = 46, },
{ .irq = -1 }
{ .irq = 46 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = {
{ .irq = 47, },
{ .irq = -1 }
{ .irq = 47 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = {
{ .irq = INT_24XX_UART1_IRQ, },
{ .irq = -1 }
{ .irq = 72 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = {
{ .irq = INT_24XX_UART2_IRQ, },
{ .irq = -1 }
{ .irq = 73 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = {
{ .irq = INT_24XX_UART3_IRQ, },
{ .irq = -1 }
{ .irq = 74 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_dispc_irqs[] = {
{ .irq = 25 },
{ .irq = -1 }
{ .irq = 25 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = {
{ .irq = INT_24XX_I2C1_IRQ, },
{ .irq = -1 }
{ .irq = 56 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = {
{ .irq = INT_24XX_I2C2_IRQ, },
{ .irq = -1 }
{ .irq = 57 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_gpio1_irqs[] = {
{ .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
{ .irq = -1 }
{ .irq = 29 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK1 */
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_gpio2_irqs[] = {
{ .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
{ .irq = -1 }
{ .irq = 30 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK2 */
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_gpio3_irqs[] = {
{ .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
{ .irq = -1 }
{ .irq = 31 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK3 */
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_gpio4_irqs[] = {
{ .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
{ .irq = -1 }
{ .irq = 32 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK4 */
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_dma_system_irqs[] = {
{ .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */
{ .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
{ .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
{ .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
{ .irq = -1 }
{ .name = "0", .irq = 12 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ0 */
{ .name = "1", .irq = 13 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ1 */
{ .name = "2", .irq = 14 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ2 */
{ .name = "3", .irq = 15 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ3 */
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = {
{ .irq = 65 },
{ .irq = -1 }
{ .irq = 65 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = {
{ .irq = 66 },
{ .irq = -1 }
{ .irq = 66 + OMAP_INTC_START, },
{ .irq = -1 },
};
struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = {
@ -320,7 +318,7 @@ struct omap_hwmod_class omap2_hdq1w_class = {
};
struct omap_hwmod_irq_info omap2_hdq1w_mpu_irqs[] = {
{ .irq = 58, },
{ .irq = -1 }
{ .irq = 58 + OMAP_INTC_START, },
{ .irq = -1 },
};

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