mirror of https://gitee.com/openkylin/linux.git
IOMMU Fixes for Linux v5.4-rc3:
Including: - Fixes for page-table issues on Mali GPUs - Missing free in an error path for ARM-SMMU - PASID decoding in the AMD IOMMU Event log code - Another update for the locking fixes in the AMD IOMMU driver - Reduce the calls to platform_get_irq() in the IPMMU-VMSA and Rockchip IOMMUs to get rid of the warning message added to this function recently -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAl2p08MACgkQK/BELZcB GuMlzA/7Bs9TTOr6Cn0idE3FY9T998ZezYi1vLInlyfe+5dD0NZThn1QCDUguTjA KLaWkNkQUPsPr36EWEgrh85mCeUMjf/WB/ua7zUHKdox4om5bQwtb4o8dnDfsrzr V2geah7mwuzTtksTsNhC8oHqHHT2bMw/Uw0ykMOHyOOrwFQ/fwe2Aj+LTqlOASex eUbqeDbE8XkHcflKGjA8r+2fpyaZPUIGj6fSEkxLcgj5S2uDFQJ1Og82TogkQb57 ox4pex+ZcdJbMJd4kP4iv/AQosuYX83S+nOrICZkdfbXN/YQOqDfhesy3uhHw/du +MoFn/lxUA6DX0/hNewuXXH/+uO6JwMOPOZqa+rkxDEDSUQ1NsNALoqUIW3l+CJe GWkjObEllWEDb1ddSa6C/x3qKKzleN5XOkZuKFHRuN0gtkgZnceqtHKU3ZGXIBWg RP+UjCE6DBujoiWIi2ywE88ccEz0lh/3Aad4TiBlE4zkfphXyF2wfzW9oQntqThQ tRPZlJqdc5d1Vx2D743t3Ueq/vvLspbREa8kIDW9MTJESKenK4O+PVca6Q/zy1lI d8dJ7uFqO+PyUW19IXoRqFHh2MRDGugcWPkzgagWuyeWqFeCuOMhRQDiwImBCpJo BepX1ksmhjACASIq6M7yjV7K/6InXvkakNXTo77hugQIrClvAs8= =Pawk -----END PGP SIGNATURE----- Merge tag 'iommu-fixes-v5.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu fixes from Joerg Roedel: - Fixes for page-table issues on Mali GPUs - Missing free in an error path for ARM-SMMU - PASID decoding in the AMD IOMMU Event log code - Another update for the locking fixes in the AMD IOMMU driver - Reduce the calls to platform_get_irq() in the IPMMU-VMSA and Rockchip IOMMUs to get rid of the warning message added to this function recently * tag 'iommu-fixes-v5.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/amd: Check PM_LEVEL_SIZE() condition in locked section iommu/amd: Fix incorrect PASID decoding from event log iommu/ipmmu-vmsa: Only call platform_get_irq() when interrupt is mandatory iommu/rockchip: Don't use platform_get_irq to implicitly count irqs iommu/io-pgtable-arm: Support all Mali configurations iommu/io-pgtable-arm: Correct Mali attributes iommu/arm-smmu: Free context bitmap in the err path of arm_smmu_init_domain_context
This commit is contained in:
Linus Torvalds
commit
90105ae1ee
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@ -583,7 +583,8 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt)
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retry:
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type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK;
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devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK;
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pasid = PPR_PASID(*(u64 *)&event[0]);
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pasid = (event[0] & EVENT_DOMID_MASK_HI) |
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(event[1] & EVENT_DOMID_MASK_LO);
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flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK;
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address = (u64)(((u64)event[3]) << 32) | event[2];
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@ -616,7 +617,7 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt)
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address, flags);
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break;
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case EVENT_TYPE_PAGE_TAB_ERR:
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dev_err(dev, "Event logged [PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x domain=0x%04x address=0x%llx flags=0x%04x]\n",
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dev_err(dev, "Event logged [PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x pasid=0x%04x address=0x%llx flags=0x%04x]\n",
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PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid),
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pasid, address, flags);
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break;
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@ -1463,6 +1464,7 @@ static void free_pagetable(struct protection_domain *domain)
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* to 64 bits.
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*/
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static bool increase_address_space(struct protection_domain *domain,
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unsigned long address,
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gfp_t gfp)
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{
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unsigned long flags;
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@ -1471,8 +1473,8 @@ static bool increase_address_space(struct protection_domain *domain,
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spin_lock_irqsave(&domain->lock, flags);
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if (WARN_ON_ONCE(domain->mode == PAGE_MODE_6_LEVEL))
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/* address space already 64 bit large */
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if (address <= PM_LEVEL_SIZE(domain->mode) ||
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WARN_ON_ONCE(domain->mode == PAGE_MODE_6_LEVEL))
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goto out;
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pte = (void *)get_zeroed_page(gfp);
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@ -1505,7 +1507,7 @@ static u64 *alloc_pte(struct protection_domain *domain,
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BUG_ON(!is_power_of_2(page_size));
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while (address > PM_LEVEL_SIZE(domain->mode))
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*updated = increase_address_space(domain, gfp) || *updated;
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*updated = increase_address_space(domain, address, gfp) || *updated;
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level = domain->mode - 1;
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pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
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@ -130,8 +130,8 @@
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#define EVENT_TYPE_INV_PPR_REQ 0x9
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#define EVENT_DEVID_MASK 0xffff
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#define EVENT_DEVID_SHIFT 0
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#define EVENT_DOMID_MASK 0xffff
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#define EVENT_DOMID_SHIFT 0
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#define EVENT_DOMID_MASK_LO 0xffff
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#define EVENT_DOMID_MASK_HI 0xf0000
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#define EVENT_FLAGS_MASK 0xfff
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#define EVENT_FLAGS_SHIFT 0x10
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@ -812,6 +812,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
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return 0;
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out_clear_smmu:
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__arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx);
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smmu_domain->smmu = NULL;
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out_unlock:
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mutex_unlock(&smmu_domain->init_mutex);
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@ -166,6 +166,9 @@
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#define ARM_MALI_LPAE_TTBR_READ_INNER BIT(2)
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#define ARM_MALI_LPAE_TTBR_SHARE_OUTER BIT(4)
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#define ARM_MALI_LPAE_MEMATTR_IMP_DEF 0x88ULL
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#define ARM_MALI_LPAE_MEMATTR_WRITE_ALLOC 0x8DULL
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/* IOPTE accessors */
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#define iopte_deref(pte,d) __va(iopte_to_paddr(pte, d))
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@ -1015,27 +1018,56 @@ arm_32_lpae_alloc_pgtable_s2(struct io_pgtable_cfg *cfg, void *cookie)
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static struct io_pgtable *
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arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
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{
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struct io_pgtable *iop;
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struct arm_lpae_io_pgtable *data;
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if (cfg->ias != 48 || cfg->oas > 40)
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/* No quirks for Mali (hopefully) */
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if (cfg->quirks)
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return NULL;
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if (cfg->ias > 48 || cfg->oas > 40)
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return NULL;
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cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G);
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iop = arm_64_lpae_alloc_pgtable_s1(cfg, cookie);
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if (iop) {
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u64 mair, ttbr;
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/* Copy values as union fields overlap */
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mair = cfg->arm_lpae_s1_cfg.mair[0];
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ttbr = cfg->arm_lpae_s1_cfg.ttbr[0];
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data = arm_lpae_alloc_pgtable(cfg);
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if (!data)
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return NULL;
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cfg->arm_mali_lpae_cfg.memattr = mair;
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cfg->arm_mali_lpae_cfg.transtab = ttbr |
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ARM_MALI_LPAE_TTBR_READ_INNER |
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ARM_MALI_LPAE_TTBR_ADRMODE_TABLE;
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/* Mali seems to need a full 4-level table regardless of IAS */
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if (data->levels < ARM_LPAE_MAX_LEVELS) {
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data->levels = ARM_LPAE_MAX_LEVELS;
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data->pgd_size = sizeof(arm_lpae_iopte);
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}
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/*
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* MEMATTR: Mali has no actual notion of a non-cacheable type, so the
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* best we can do is mimic the out-of-tree driver and hope that the
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* "implementation-defined caching policy" is good enough. Similarly,
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* we'll use it for the sake of a valid attribute for our 'device'
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* index, although callers should never request that in practice.
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*/
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cfg->arm_mali_lpae_cfg.memattr =
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(ARM_MALI_LPAE_MEMATTR_IMP_DEF
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<< ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_NC)) |
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(ARM_MALI_LPAE_MEMATTR_WRITE_ALLOC
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<< ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_CACHE)) |
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(ARM_MALI_LPAE_MEMATTR_IMP_DEF
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<< ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_DEV));
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return iop;
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data->pgd = __arm_lpae_alloc_pages(data->pgd_size, GFP_KERNEL, cfg);
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if (!data->pgd)
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goto out_free_data;
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/* Ensure the empty pgd is visible before TRANSTAB can be written */
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wmb();
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cfg->arm_mali_lpae_cfg.transtab = virt_to_phys(data->pgd) |
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ARM_MALI_LPAE_TTBR_READ_INNER |
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ARM_MALI_LPAE_TTBR_ADRMODE_TABLE;
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return &data->iop;
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out_free_data:
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kfree(data);
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return NULL;
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}
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struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns = {
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@ -1086,8 +1086,6 @@ static int ipmmu_probe(struct platform_device *pdev)
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mmu->num_ctx = min(IPMMU_CTX_MAX, mmu->features->number_of_contexts);
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irq = platform_get_irq(pdev, 0);
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/*
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* Determine if this IPMMU instance is a root device by checking for
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* the lack of has_cache_leaf_nodes flag or renesas,ipmmu-main property.
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@ -1106,6 +1104,7 @@ static int ipmmu_probe(struct platform_device *pdev)
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/* Root devices have mandatory IRQs */
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if (ipmmu_is_root(mmu)) {
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(&pdev->dev, "no IRQ found\n");
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return irq;
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@ -100,6 +100,7 @@ struct rk_iommu {
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struct device *dev;
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void __iomem **bases;
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int num_mmu;
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int num_irq;
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struct clk_bulk_data *clocks;
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int num_clocks;
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bool reset_disabled;
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@ -1136,7 +1137,7 @@ static int rk_iommu_probe(struct platform_device *pdev)
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struct rk_iommu *iommu;
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struct resource *res;
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int num_res = pdev->num_resources;
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int err, i, irq;
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int err, i;
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iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL);
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if (!iommu)
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@ -1163,6 +1164,10 @@ static int rk_iommu_probe(struct platform_device *pdev)
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if (iommu->num_mmu == 0)
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return PTR_ERR(iommu->bases[0]);
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iommu->num_irq = platform_irq_count(pdev);
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if (iommu->num_irq < 0)
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return iommu->num_irq;
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iommu->reset_disabled = device_property_read_bool(dev,
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"rockchip,disable-mmu-reset");
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@ -1219,8 +1224,9 @@ static int rk_iommu_probe(struct platform_device *pdev)
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pm_runtime_enable(dev);
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i = 0;
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while ((irq = platform_get_irq(pdev, i++)) != -ENXIO) {
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for (i = 0; i < iommu->num_irq; i++) {
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int irq = platform_get_irq(pdev, i);
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if (irq < 0)
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return irq;
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@ -1245,10 +1251,13 @@ static int rk_iommu_probe(struct platform_device *pdev)
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static void rk_iommu_shutdown(struct platform_device *pdev)
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{
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struct rk_iommu *iommu = platform_get_drvdata(pdev);
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int i = 0, irq;
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int i;
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for (i = 0; i < iommu->num_irq; i++) {
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int irq = platform_get_irq(pdev, i);
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while ((irq = platform_get_irq(pdev, i++)) != -ENXIO)
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devm_free_irq(iommu->dev, irq, iommu);
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}
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pm_runtime_force_suspend(&pdev->dev);
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}
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