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cxgb4: fix endian to test F_FW_PORT_CMD_DCBXDIS32 

For FW_PORT_ACTION_GET_PORT_INFO32 messages, the
u.info32.lstatus32_to_cbllen32 is 32-bit Big Endian.
We need to translate that to CPU Endian in order to
test F_FW_PORT_CMD_DCBXDIS32.

Signed-off-by: Casey Leedom <leedom@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ganesh Goudar 2018-08-01 18:15:32 +05:30 committed by David S. Miller
parent cef238d71d
commit 90d4c5bb98
1 changed files with 3 additions and 4 deletions
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7
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
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@ -554,10 +554,9 @@ static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp,
dev = q->adap->port[q->adap->chan_map[port]];
dcbxdis = (action == FW_PORT_ACTION_GET_PORT_INFO
? !!(pcmd->u.info.dcbxdis_pkd &
FW_PORT_CMD_DCBXDIS_F)
: !!(pcmd->u.info32.lstatus32_to_cbllen32 &
FW_PORT_CMD_DCBXDIS32_F));
? !!(pcmd->u.info.dcbxdis_pkd & FW_PORT_CMD_DCBXDIS_F)
: !!(be32_to_cpu(pcmd->u.info32.lstatus32_to_cbllen32)
& FW_PORT_CMD_DCBXDIS32_F));
state_input = (dcbxdis
? CXGB4_DCB_INPUT_FW_DISABLED
: CXGB4_DCB_INPUT_FW_ENABLED);