mirror of https://gitee.com/openkylin/linux.git
interconnect fixes for v5.15
This contains a few fixes for the sdm660 driver: - sdm660: Fix id of slv_cnoc_mnoc_cfg - sdm660: Correct NOC_QOS_PRIORITY shift and mask - sdm660: Add missing a2noc qos clocks Signed-off-by: Georgi Djakov <djakov@kernel.org> -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJhTcs5AAoJEIDQzArG2BZjpTMP/0ClamNkZXRENdhaPf2r16ho 6VN1jEZTD7gVYk8CDFk38sBbpHWU0NtvhwYaQdn+xmjaAqc4yjxWxOVTuVYs6pjn uwf75d5gpwsyML8VjqKhcsf/NYB04ZWnLo6F7+5vyjYkFqESuiSeQPxnkFv7Oi55 bsAef68JpJIgiGjyZFFTH8LqyJamreNAhFVyZo1gk8cN7+ai6Rg3yLNNVKxT5tnz a4C1vpCTW5QJbCDM8VsulDk/uyOpKb7hyva8Ind9UY0QAbxCA7ZXln/CnIDwP9aI CtCR73ZuEfasMmYaUvza2jCVZzUfgC6L4I+Df2hrgh2CxWP1ozjIUTAbb7NrRm4k +latOXP55y0Ok2vl87hQuPHXg7paw6R0T8tRtwS+PEhvE0k8Z3307uSHD9njYC5N /DeRyzFr3G2TJw7OgA65TVSVrUo+L9g1CAk+jXf/tg+EgPscV3aSRFWE4abkVu3X +l4dhncKC/QcSzPsZa50H3ydFFWICit7FiGTIp8U8DXS8onwMZ1AC7sZnn4lACwm jGpIJo/3Hz7+QIw4tXJjAtpO4mJiBFzsTnCTyaMqC7Ti2u2zlECFz0EBd6N81iwp 7HXphqrhOU8bms6hBOsruUD7fMppS7JB+MwYHa0IPxB6OZSDu2cMkwDVEgpoRqdz 3PoMLTjbWOIh5OMuh38e =IBFP -----END PGP SIGNATURE----- Merge tag 'icc-5.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-linus Georgi writes: interconnect fixes for v5.15 This contains a few fixes for the sdm660 driver: - sdm660: Fix id of slv_cnoc_mnoc_cfg - sdm660: Correct NOC_QOS_PRIORITY shift and mask - sdm660: Add missing a2noc qos clocks Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-5.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: interconnect: qcom: sdm660: Add missing a2noc qos clocks dt-bindings: interconnect: sdm660: Add missing a2noc qos clocks interconnect: qcom: sdm660: Correct NOC_QOS_PRIORITY shift and mask interconnect: qcom: sdm660: Fix id of slv_cnoc_mnoc_cfg
This commit is contained in:
Greg Kroah-Hartman
commit
913581b8ae
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@ -31,11 +31,11 @@ properties:
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clocks:
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minItems: 1
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maxItems: 3
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maxItems: 7
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clock-names:
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minItems: 1
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maxItems: 3
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maxItems: 7
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required:
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- compatible
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@ -72,6 +72,32 @@ allOf:
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contains:
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enum:
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- qcom,sdm660-a2noc
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then:
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properties:
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clocks:
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items:
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- description: Bus Clock.
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- description: Bus A Clock.
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- description: IPA Clock.
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- description: UFS AXI Clock.
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- description: Aggregate2 UFS AXI Clock.
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- description: Aggregate2 USB3 AXI Clock.
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- description: Config NoC USB2 AXI Clock.
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clock-names:
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items:
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- const: bus
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- const: bus_a
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- const: ipa
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- const: ufs_axi
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- const: aggre2_ufs_axi
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- const: aggre2_usb3_axi
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- const: cfg_noc_usb2_axi
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,sdm660-bimc
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- qcom,sdm660-cnoc
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- qcom,sdm660-gnoc
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@ -91,6 +117,7 @@ examples:
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- |
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#include <dt-bindings/clock/qcom,rpmcc.h>
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#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
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#include <dt-bindings/clock/qcom,gcc-sdm660.h>
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bimc: interconnect@1008000 {
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compatible = "qcom,sdm660-bimc";
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@ -123,9 +150,20 @@ examples:
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compatible = "qcom,sdm660-a2noc";
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reg = <0x01704000 0xc100>;
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clock-names = "bus",
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"bus_a",
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"ipa",
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"ufs_axi",
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"aggre2_ufs_axi",
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"aggre2_usb3_axi",
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"cfg_noc_usb2_axi";
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clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
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<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;
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<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
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<&rpmcc RPM_SMD_IPA_CLK>,
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<&gcc GCC_UFS_AXI_CLK>,
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<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
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<&gcc GCC_AGGRE2_USB3_AXI_CLK>,
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<&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
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};
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mnoc: interconnect@1745000 {
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@ -44,9 +44,9 @@
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#define NOC_PERM_MODE_BYPASS (1 << NOC_QOS_MODE_BYPASS)
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#define NOC_QOS_PRIORITYn_ADDR(n) (0x8 + (n * 0x1000))
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#define NOC_QOS_PRIORITY_MASK 0xf
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#define NOC_QOS_PRIORITY_P1_MASK 0xc
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#define NOC_QOS_PRIORITY_P0_MASK 0x3
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#define NOC_QOS_PRIORITY_P1_SHIFT 0x2
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#define NOC_QOS_PRIORITY_P0_SHIFT 0x3
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#define NOC_QOS_MODEn_ADDR(n) (0xc + (n * 0x1000))
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#define NOC_QOS_MODEn_MASK 0x3
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@ -173,6 +173,16 @@ static const struct clk_bulk_data bus_mm_clocks[] = {
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{ .id = "iface" },
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};
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static const struct clk_bulk_data bus_a2noc_clocks[] = {
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{ .id = "bus" },
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{ .id = "bus_a" },
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{ .id = "ipa" },
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{ .id = "ufs_axi" },
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{ .id = "aggre2_ufs_axi" },
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{ .id = "aggre2_usb3_axi" },
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{ .id = "cfg_noc_usb2_axi" },
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};
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/**
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* struct qcom_icc_provider - Qualcomm specific interconnect provider
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* @provider: generic interconnect provider
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@ -307,7 +317,7 @@ DEFINE_QNODE(slv_bimc_cfg, SDM660_SLAVE_BIMC_CFG, 4, -1, 56, true, -1, 0, -1, 0)
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DEFINE_QNODE(slv_prng, SDM660_SLAVE_PRNG, 4, -1, 44, true, -1, 0, -1, 0);
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DEFINE_QNODE(slv_spdm, SDM660_SLAVE_SPDM, 4, -1, 60, true, -1, 0, -1, 0);
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DEFINE_QNODE(slv_qdss_cfg, SDM660_SLAVE_QDSS_CFG, 4, -1, 63, true, -1, 0, -1, 0);
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DEFINE_QNODE(slv_cnoc_mnoc_cfg, SDM660_SLAVE_BLSP_1, 4, -1, 66, true, -1, 0, -1, SDM660_MASTER_CNOC_MNOC_CFG);
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DEFINE_QNODE(slv_cnoc_mnoc_cfg, SDM660_SLAVE_CNOC_MNOC_CFG, 4, -1, 66, true, -1, 0, -1, SDM660_MASTER_CNOC_MNOC_CFG);
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DEFINE_QNODE(slv_snoc_cfg, SDM660_SLAVE_SNOC_CFG, 4, -1, 70, true, -1, 0, -1, 0);
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DEFINE_QNODE(slv_qm_cfg, SDM660_SLAVE_QM_CFG, 4, -1, 212, true, -1, 0, -1, 0);
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DEFINE_QNODE(slv_clk_ctl, SDM660_SLAVE_CLK_CTL, 4, -1, 47, true, -1, 0, -1, 0);
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@ -624,13 +634,12 @@ static int qcom_icc_noc_set_qos_priority(struct regmap *rmap,
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/* Must be updated one at a time, P1 first, P0 last */
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val = qos->areq_prio << NOC_QOS_PRIORITY_P1_SHIFT;
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rc = regmap_update_bits(rmap, NOC_QOS_PRIORITYn_ADDR(qos->qos_port),
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NOC_QOS_PRIORITY_MASK, val);
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NOC_QOS_PRIORITY_P1_MASK, val);
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if (rc)
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return rc;
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val = qos->prio_level << NOC_QOS_PRIORITY_P0_SHIFT;
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return regmap_update_bits(rmap, NOC_QOS_PRIORITYn_ADDR(qos->qos_port),
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NOC_QOS_PRIORITY_MASK, val);
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NOC_QOS_PRIORITY_P0_MASK, qos->prio_level);
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}
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static int qcom_icc_set_noc_qos(struct icc_node *src, u64 max_bw)
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@ -810,6 +819,10 @@ static int qnoc_probe(struct platform_device *pdev)
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qp->bus_clks = devm_kmemdup(dev, bus_mm_clocks,
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sizeof(bus_mm_clocks), GFP_KERNEL);
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qp->num_clks = ARRAY_SIZE(bus_mm_clocks);
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} else if (of_device_is_compatible(dev->of_node, "qcom,sdm660-a2noc")) {
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qp->bus_clks = devm_kmemdup(dev, bus_a2noc_clocks,
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sizeof(bus_a2noc_clocks), GFP_KERNEL);
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qp->num_clks = ARRAY_SIZE(bus_a2noc_clocks);
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} else {
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if (of_device_is_compatible(dev->of_node, "qcom,sdm660-bimc"))
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qp->is_bimc_node = true;
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