mirror of https://gitee.com/openkylin/linux.git
[ARM] 3578/1: AT91RM9200 Clock update
Patch from Andrew Victor Some updates to the clock infrastructure for the AT91RM9200. 1. Hard-coded values replaced with names defined in at91rm9200_sys.h. 2. Added the four PIO clocks, which are enabled at startup. 3. At startup, disable all unused clocks. 4. Minor bugfix for usage counts associated with MCK. [Patch from David Brownell] 5. Added at91_clock_associate() function to associate device & function with a particular clock. [Patch from David Brownell] Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Andrew Victor
Russell King
parent
b7408aff2d
commit
91f8ed835f
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@ -32,8 +32,6 @@
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#include "generic.h"
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#undef DEBUG
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/*
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* There's a lot more which can be done with clocks, including cpufreq
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* integration, slow clock mode support (for system suspend), letting
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@ -41,7 +39,9 @@
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*/
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struct clk {
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const char *name;
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const char *name; /* unique clock name */
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const char *function; /* function of the clock */
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struct device *dev; /* device associated with function */
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unsigned long rate_hz;
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struct clk *parent;
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u32 pmc_mask;
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@ -71,15 +71,14 @@ static struct clk clk32k = {
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};
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static struct clk main_clk = {
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.name = "main",
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.pmc_mask = 1 << 0, /* in PMC_SR */
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.users = 1,
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.pmc_mask = AT91_PMC_MOSCS, /* in PMC_SR */
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.id = 1,
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.primary = 1,
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};
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static struct clk plla = {
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.name = "plla",
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.parent = &main_clk,
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.pmc_mask = 1 << 1, /* in PMC_SR */
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.pmc_mask = AT91_PMC_LOCKA, /* in PMC_SR */
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.id = 2,
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.primary = 1,
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.pll = 1,
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@ -105,7 +104,7 @@ static void pllb_mode(struct clk *clk, int is_on)
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static struct clk pllb = {
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.name = "pllb",
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.parent = &main_clk,
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.pmc_mask = 1 << 2, /* in PMC_SR */
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.pmc_mask = AT91_PMC_LOCKB, /* in PMC_SR */
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.mode = pllb_mode,
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.id = 3,
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.primary = 1,
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@ -177,8 +176,7 @@ static struct clk pck3 = {
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*/
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static struct clk mck = {
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.name = "mck",
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.pmc_mask = 1 << 3, /* in PMC_SR */
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.users = 1, /* (must be) always on */
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.pmc_mask = AT91_PMC_MCKRDY, /* in PMC_SR */
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};
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static void pmc_periph_mode(struct clk *clk, int is_on)
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@ -249,6 +247,30 @@ static struct clk spi_clk = {
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.pmc_mask = 1 << AT91_ID_SPI,
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.mode = pmc_periph_mode,
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};
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static struct clk pioA_clk = {
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.name = "pioA_clk",
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.parent = &mck,
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.pmc_mask = 1 << AT91_ID_PIOA,
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.mode = pmc_periph_mode,
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};
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static struct clk pioB_clk = {
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.name = "pioB_clk",
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.parent = &mck,
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.pmc_mask = 1 << AT91_ID_PIOB,
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.mode = pmc_periph_mode,
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};
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static struct clk pioC_clk = {
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.name = "pioC_clk",
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.parent = &mck,
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.pmc_mask = 1 << AT91_ID_PIOC,
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.mode = pmc_periph_mode,
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};
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static struct clk pioD_clk = {
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.name = "pioD_clk",
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.parent = &mck,
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.pmc_mask = 1 << AT91_ID_PIOD,
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.mode = pmc_periph_mode,
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};
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static struct clk *const clock_list[] = {
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/* four primary clocks -- MUST BE FIRST! */
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@ -279,21 +301,46 @@ static struct clk *const clock_list[] = {
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&udc_clk,
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&twi_clk,
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&spi_clk,
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&pioA_clk,
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&pioB_clk,
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&pioC_clk,
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&pioD_clk,
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// ssc0..ssc2
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// tc0..tc5
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// irq0..irq6
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&ohci_clk,
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ðer_clk,
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};
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/*
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* Associate a particular clock with a function (eg, "uart") and device.
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* The drivers can then request the same 'function' with several different
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* devices and not care about which clock name to use.
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*/
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void __init at91_clock_associate(const char *id, struct device *dev, const char *func)
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{
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struct clk *clk = clk_get(NULL, id);
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if (!dev || !clk || !IS_ERR(clk_get(dev, func)))
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return;
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clk->function = func;
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clk->dev = dev;
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}
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/* clocks are all static for now; no refcounting necessary */
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struct clk *clk_get(struct device *dev, const char *id)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
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if (strcmp(id, clock_list[i]->name) == 0)
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return clock_list[i];
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struct clk *clk = clock_list[i];
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if (strcmp(id, clk->name) == 0)
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return clk;
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if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
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return clk;
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}
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return ERR_PTR(-ENOENT);
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@ -593,6 +640,30 @@ static unsigned __init at91_pll_calc(unsigned main_freq, unsigned out_freq)
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return 0;
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}
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/*
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* Several unused clocks may be active. Turn them off.
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*/
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static void at91_periphclk_reset(void)
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{
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unsigned long reg;
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int i;
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reg = at91_sys_read(AT91_PMC_PCSR);
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for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
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struct clk *clk = clock_list[i];
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if (clk->mode != pmc_periph_mode)
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continue;
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if (clk->users > 0)
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reg &= ~clk->pmc_mask;
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}
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at91_sys_write(AT91_PMC_PCDR, reg);
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}
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int __init at91_clock_init(unsigned long main_clock)
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{
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unsigned tmp, freq, mckr;
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@ -626,7 +697,6 @@ int __init at91_clock_init(unsigned long main_clock)
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*/
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at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
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pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
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at91_sys_write(AT91_PMC_PCDR, (1 << AT91_ID_UHP) | (1 << AT91_ID_UDP));
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at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP);
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at91_sys_write(AT91_CKGR_PLLBR, 0);
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at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP);
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@ -640,11 +710,13 @@ int __init at91_clock_init(unsigned long main_clock)
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*/
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mckr = at91_sys_read(AT91_PMC_MCKR);
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mck.parent = clock_list[mckr & AT91_PMC_CSS];
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mck.parent->users++;
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freq = mck.parent->rate_hz;
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freq /= (1 << ((mckr >> 2) & 3)); /* prescale */
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mck.rate_hz = freq / (1 + ((mckr >> 8) & 3)); /* mdiv */
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/* MCK and CPU clock are "always on" */
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clk_enable(&mck);
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printk("Clocks: CPU %u MHz, master %u MHz, main %u.%03u MHz\n",
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freq / 1000000, (unsigned) mck.rate_hz / 1000000,
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(unsigned) main_clock / 1000000,
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@ -663,19 +735,28 @@ int __init at91_clock_init(unsigned long main_clock)
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continue;
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pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
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parent = clock_list[pckr & 3];
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parent = clock_list[pckr & AT91_PMC_CSS];
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clk->parent = parent;
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clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3));
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if (clk->users == 0) {
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/* not being used, so switch it off */
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at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
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}
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}
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#else
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/* disable unused clocks */
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/* disable all programmable clocks */
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at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK0 | AT91_PMC_PCK1 | AT91_PMC_PCK2 | AT91_PMC_PCK3);
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#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
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#endif
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/* FIXME several unused clocks may still be active... provide
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* a CONFIG option to turn off all unused clocks at some point
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* before driver init starts.
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*/
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/* enable the PIO clocks */
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clk_enable(&pioA_clk);
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clk_enable(&pioB_clk);
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clk_enable(&pioC_clk);
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clk_enable(&pioD_clk);
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/* disable all other unused peripheral clocks */
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at91_periphclk_reset();
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return 0;
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}
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