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ARM: OMAP2+: PM: share clkdms_setup() across OMAP2, 3, 4
clkdms_setup() is identical across OMAP2, 3, and 4, so share it. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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@ -68,6 +68,16 @@ static void omap2_init_processor_devices(void)
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#define FORCEWAKEUP_SWITCH 0
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#define LOWPOWERSTATE_SWITCH 1
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int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
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{
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if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
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clkdm_allow_idle(clkdm);
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else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
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atomic_read(&clkdm->usecount) == 0)
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clkdm_sleep(clkdm);
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return 0;
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}
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/*
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* This sets pwrdm state (other than mpu & core. Currently only ON &
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* RET are supported.
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@ -22,6 +22,7 @@ extern int omap3_can_sleep(void);
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extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
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extern int omap3_idle_init(void);
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extern int omap4_idle_init(void);
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extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
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#if defined(CONFIG_PM_OPP)
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extern int omap3_opp_init(void);
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@ -283,17 +283,6 @@ static const struct platform_suspend_ops omap_pm_ops = {
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static const struct platform_suspend_ops __initdata omap_pm_ops;
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#endif /* CONFIG_SUSPEND */
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/* XXX This function should be shareable between OMAP2xxx and OMAP3 */
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static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
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{
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if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
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clkdm_allow_idle(clkdm);
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else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
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atomic_read(&clkdm->usecount) == 0)
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clkdm_sleep(clkdm);
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return 0;
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}
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static void __init prcm_setup_regs(void)
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{
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int i, num_mem_banks;
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@ -335,7 +324,7 @@ static void __init prcm_setup_regs(void)
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clkdm_sleep(gfx_clkdm);
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/* Enable hardware-supervised idle for all clkdms */
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clkdm_for_each(clkdms_setup, NULL);
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clkdm_for_each(omap_pm_clkdms_setup, NULL);
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clkdm_add_wkdep(mpu_clkdm, wkup_clkdm);
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/* REVISIT: Configure number of 32 kHz clock cycles for sys_clk
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@ -735,21 +735,6 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
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return omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
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}
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/*
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* Enable hw supervised mode for all clockdomains if it's
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* supported. Initiate sleep transition for other clockdomains, if
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* they are not used
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*/
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static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
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{
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if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
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clkdm_allow_idle(clkdm);
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else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
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atomic_read(&clkdm->usecount) == 0)
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clkdm_sleep(clkdm);
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return 0;
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}
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/*
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* Push functions to SRAM
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*
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@ -819,7 +804,7 @@ static int __init omap3_pm_init(void)
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goto err2;
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}
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(void) clkdm_for_each(clkdms_setup, NULL);
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(void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
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mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
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if (mpu_pwrdm == NULL) {
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@ -120,22 +120,6 @@ static const struct platform_suspend_ops omap_pm_ops = {
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};
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#endif /* CONFIG_SUSPEND */
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/*
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* Enable hardware supervised mode for all clockdomains if it's
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* supported. Initiate sleep transition for other clockdomains, if
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* they are not used
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*/
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static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
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{
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if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
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clkdm_allow_idle(clkdm);
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else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
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atomic_read(&clkdm->usecount) == 0)
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clkdm_sleep(clkdm);
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return 0;
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}
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static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
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{
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struct power_state *pwrst;
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@ -247,7 +231,7 @@ static int __init omap4_pm_init(void)
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goto err2;
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}
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(void) clkdm_for_each(clkdms_setup, NULL);
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(void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
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#ifdef CONFIG_SUSPEND
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suspend_set_ops(&omap_pm_ops);
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