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ARM: dts: aspeed: Fix hwrng register address 

The register address should be the full address of the rng, not the
offset from the start of the SCU.

Fixes: 5daa8212c0 ("ARM: dts: aspeed: Describe random number device")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Joel Stanley 2018-05-30 15:47:40 +09:30 committed by Olof Johansson
parent 521ec1ca75
commit 927c2fc2db
2 changed files with 4 additions and 4 deletions
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4
arch/arm/boot/dts/aspeed-g4.dtsi
View File

@ -145,9 +145,9 @@ pinctrl: pinctrl {
};
rng: hwrng@78 {
rng: hwrng@1e6e2078 {
compatible = "timeriomem_rng";
reg = <0x78 0x4>;
reg = <0x1e6e2078 0x4>;
period = <1>;
quality = <100>;
};

4
arch/arm/boot/dts/aspeed-g5.dtsi
View File

@ -189,9 +189,9 @@ pinctrl: pinctrl {
};
};
rng: hwrng@78 {
rng: hwrng@1e6e2078 {
compatible = "timeriomem_rng";
reg = <0x78 0x4>;
reg = <0x1e6e2078 0x4>;
period = <1>;
quality = <100>;
};