mirror of https://gitee.com/openkylin/linux.git
drm/i915/tgl: Move transcoders to pipes' powerwells
When trying to read registers from transcoder C and D while PG3 is ON it causes unclaimed access warnings. Adding the powerwells for the pipes fixes the issue, but doesn't match the spec. Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190817093902.2171-4-lucas.demarchi@intel.com
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@ -2549,12 +2549,14 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
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#define TGL_PW_5_POWER_DOMAINS ( \
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BIT_ULL(POWER_DOMAIN_PIPE_D) | \
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BIT_ULL(POWER_DOMAIN_TRANSCODER_D) | \
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BIT_ULL(POWER_DOMAIN_PIPE_D_PANEL_FITTER) | \
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BIT_ULL(POWER_DOMAIN_INIT))
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#define TGL_PW_4_POWER_DOMAINS ( \
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TGL_PW_5_POWER_DOMAINS | \
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BIT_ULL(POWER_DOMAIN_PIPE_C) | \
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BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \
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BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \
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BIT_ULL(POWER_DOMAIN_INIT))
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@ -2562,8 +2564,6 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
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TGL_PW_4_POWER_DOMAINS | \
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BIT_ULL(POWER_DOMAIN_PIPE_B) | \
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BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \
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BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \
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BIT_ULL(POWER_DOMAIN_TRANSCODER_D) | \
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BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_TC1_LANES) | \
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BIT_ULL(POWER_DOMAIN_PORT_DDI_TC2_LANES) | \
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