mirror of https://gitee.com/openkylin/linux.git
ASoC: Intel: catpt: Implement IPC protocol
Implement IRQ handlers for immediate and delayed replies and notifications. Communication is synchronous and allows for serialization of maximum one message at a time. DSP may respond with ADSP_PENDING status for a request - known as delayed reply - and when situation occurs, framework keeps the lock and awaits upcoming response through IPCD channel which is handled in bottom-half. Immediate replies spawn no BH at all as their processing is very short. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200929141247.8058-3-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
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@ -9,6 +9,8 @@
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#define __SND_SOC_INTEL_CATPT_CORE_H
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#include <linux/dma/dw.h>
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#include <linux/irqreturn.h>
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#include "messages.h"
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#include "registers.h"
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struct catpt_dev;
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@ -29,6 +31,31 @@ static inline bool catpt_resource_overlapping(struct resource *r1,
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return true;
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}
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struct catpt_ipc_msg {
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union {
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u32 header;
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union catpt_global_msg rsp;
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};
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void *data;
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size_t size;
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};
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struct catpt_ipc {
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struct device *dev;
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struct catpt_ipc_msg rx;
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struct catpt_fw_ready config;
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u32 default_timeout;
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bool ready;
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spinlock_t lock;
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struct mutex mutex;
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struct completion done_completion;
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struct completion busy_completion;
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};
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void catpt_ipc_init(struct catpt_ipc *ipc, struct device *dev);
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struct catpt_module_type {
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bool loaded;
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u32 entry_point;
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@ -59,6 +86,7 @@ struct catpt_spec {
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struct catpt_dev {
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struct device *dev;
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struct dw_dma_chip *dmac;
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struct catpt_ipc ipc;
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void __iomem *pci_ba;
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void __iomem *lpe_ba;
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@ -83,4 +111,20 @@ int catpt_dma_memcpy_fromdsp(struct catpt_dev *cdev, struct dma_chan *chan,
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dma_addr_t dst_addr, dma_addr_t src_addr,
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size_t size);
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irqreturn_t catpt_dsp_irq_handler(int irq, void *dev_id);
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irqreturn_t catpt_dsp_irq_thread(int irq, void *dev_id);
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/*
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* IPC handlers may return positive values which denote successful
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* HOST <-> DSP communication yet failure to process specific request.
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* Use below macro to convert returned non-zero values appropriately
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*/
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#define CATPT_IPC_ERROR(err) (((err) < 0) ? (err) : -EREMOTEIO)
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int catpt_dsp_send_msg_timeout(struct catpt_dev *cdev,
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struct catpt_ipc_msg request,
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struct catpt_ipc_msg *reply, int timeout);
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int catpt_dsp_send_msg(struct catpt_dev *cdev, struct catpt_ipc_msg request,
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struct catpt_ipc_msg *reply);
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#endif
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@ -0,0 +1,246 @@
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// SPDX-License-Identifier: GPL-2.0-only
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//
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// Copyright(c) 2020 Intel Corporation. All rights reserved.
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//
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// Author: Cezary Rojewski <cezary.rojewski@intel.com>
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//
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#include <linux/irqreturn.h>
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#include "core.h"
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#include "messages.h"
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#include "registers.h"
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#define CATPT_IPC_TIMEOUT_MS 300
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void catpt_ipc_init(struct catpt_ipc *ipc, struct device *dev)
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{
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ipc->dev = dev;
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ipc->ready = false;
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ipc->default_timeout = CATPT_IPC_TIMEOUT_MS;
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init_completion(&ipc->done_completion);
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init_completion(&ipc->busy_completion);
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spin_lock_init(&ipc->lock);
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mutex_init(&ipc->mutex);
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}
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static int catpt_ipc_arm(struct catpt_ipc *ipc, struct catpt_fw_ready *config)
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{
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/*
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* Both tx and rx are put into and received from outbox. Inbox is
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* only used for notifications where payload size is known upfront,
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* thus no separate buffer is allocated for it.
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*/
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ipc->rx.data = devm_kzalloc(ipc->dev, config->outbox_size, GFP_KERNEL);
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if (!ipc->rx.data)
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return -ENOMEM;
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memcpy(&ipc->config, config, sizeof(*config));
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ipc->ready = true;
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return 0;
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}
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static void catpt_ipc_msg_init(struct catpt_ipc *ipc,
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struct catpt_ipc_msg *reply)
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{
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lockdep_assert_held(&ipc->lock);
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ipc->rx.header = 0;
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ipc->rx.size = reply ? reply->size : 0;
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reinit_completion(&ipc->done_completion);
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reinit_completion(&ipc->busy_completion);
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}
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static void catpt_dsp_send_tx(struct catpt_dev *cdev,
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const struct catpt_ipc_msg *tx)
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{
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u32 header = tx->header | CATPT_IPCC_BUSY;
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memcpy_toio(catpt_outbox_addr(cdev), tx->data, tx->size);
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catpt_writel_shim(cdev, IPCC, header);
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}
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static int catpt_wait_msg_completion(struct catpt_dev *cdev, int timeout)
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{
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struct catpt_ipc *ipc = &cdev->ipc;
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int ret;
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ret = wait_for_completion_timeout(&ipc->done_completion,
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msecs_to_jiffies(timeout));
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if (!ret)
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return -ETIMEDOUT;
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if (ipc->rx.rsp.status != CATPT_REPLY_PENDING)
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return 0;
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/* wait for delayed reply */
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ret = wait_for_completion_timeout(&ipc->busy_completion,
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msecs_to_jiffies(timeout));
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return ret ? 0 : -ETIMEDOUT;
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}
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static int catpt_dsp_do_send_msg(struct catpt_dev *cdev,
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struct catpt_ipc_msg request,
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struct catpt_ipc_msg *reply, int timeout)
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{
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struct catpt_ipc *ipc = &cdev->ipc;
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unsigned long flags;
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int ret;
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if (!ipc->ready)
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return -EPERM;
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if (request.size > ipc->config.outbox_size ||
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(reply && reply->size > ipc->config.outbox_size))
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return -EINVAL;
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spin_lock_irqsave(&ipc->lock, flags);
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catpt_ipc_msg_init(ipc, reply);
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catpt_dsp_send_tx(cdev, &request);
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spin_unlock_irqrestore(&ipc->lock, flags);
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ret = catpt_wait_msg_completion(cdev, timeout);
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if (ret) {
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dev_crit(cdev->dev, "communication severed: %d, rebooting dsp..\n",
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ret);
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ipc->ready = false;
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/* TODO: attempt recovery */
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return ret;
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}
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ret = ipc->rx.rsp.status;
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if (reply) {
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reply->header = ipc->rx.header;
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if (!ret && reply->data)
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memcpy(reply->data, ipc->rx.data, reply->size);
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}
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return ret;
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}
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int catpt_dsp_send_msg_timeout(struct catpt_dev *cdev,
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struct catpt_ipc_msg request,
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struct catpt_ipc_msg *reply, int timeout)
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{
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struct catpt_ipc *ipc = &cdev->ipc;
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int ret;
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mutex_lock(&ipc->mutex);
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ret = catpt_dsp_do_send_msg(cdev, request, reply, timeout);
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mutex_unlock(&ipc->mutex);
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return ret;
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}
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int catpt_dsp_send_msg(struct catpt_dev *cdev, struct catpt_ipc_msg request,
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struct catpt_ipc_msg *reply)
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{
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return catpt_dsp_send_msg_timeout(cdev, request, reply,
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cdev->ipc.default_timeout);
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}
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static void catpt_dsp_copy_rx(struct catpt_dev *cdev, u32 header)
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{
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struct catpt_ipc *ipc = &cdev->ipc;
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ipc->rx.header = header;
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if (ipc->rx.rsp.status != CATPT_REPLY_SUCCESS)
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return;
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memcpy_fromio(ipc->rx.data, catpt_outbox_addr(cdev), ipc->rx.size);
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}
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static void catpt_dsp_process_response(struct catpt_dev *cdev, u32 header)
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{
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union catpt_notify_msg msg = CATPT_MSG(header);
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struct catpt_ipc *ipc = &cdev->ipc;
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if (msg.fw_ready) {
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struct catpt_fw_ready config;
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/* to fit 32b header original address is shifted right by 3 */
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u32 off = msg.mailbox_address << 3;
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memcpy_fromio(&config, cdev->lpe_ba + off, sizeof(config));
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catpt_ipc_arm(ipc, &config);
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complete(&cdev->fw_ready);
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return;
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}
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switch (msg.global_msg_type) {
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case CATPT_GLB_REQUEST_CORE_DUMP:
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break;
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case CATPT_GLB_STREAM_MESSAGE:
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switch (msg.stream_msg_type) {
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case CATPT_STRM_NOTIFICATION:
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break;
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default:
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catpt_dsp_copy_rx(cdev, header);
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/* signal completion of delayed reply */
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complete(&ipc->busy_completion);
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break;
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}
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break;
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default:
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dev_warn(cdev->dev, "unknown response: %d received\n",
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msg.global_msg_type);
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break;
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}
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}
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irqreturn_t catpt_dsp_irq_thread(int irq, void *dev_id)
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{
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struct catpt_dev *cdev = dev_id;
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u32 ipcd;
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ipcd = catpt_readl_shim(cdev, IPCD);
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/* ensure there is delayed reply or notification to process */
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if (!(ipcd & CATPT_IPCD_BUSY))
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return IRQ_NONE;
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catpt_dsp_process_response(cdev, ipcd);
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/* tell DSP processing is completed */
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catpt_updatel_shim(cdev, IPCD, CATPT_IPCD_BUSY | CATPT_IPCD_DONE,
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CATPT_IPCD_DONE);
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/* unmask dsp BUSY interrupt */
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catpt_updatel_shim(cdev, IMC, CATPT_IMC_IPCDB, 0);
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return IRQ_HANDLED;
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}
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irqreturn_t catpt_dsp_irq_handler(int irq, void *dev_id)
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{
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struct catpt_dev *cdev = dev_id;
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irqreturn_t ret = IRQ_NONE;
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u32 isc, ipcc;
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isc = catpt_readl_shim(cdev, ISC);
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/* immediate reply */
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if (isc & CATPT_ISC_IPCCD) {
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/* mask host DONE interrupt */
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catpt_updatel_shim(cdev, IMC, CATPT_IMC_IPCCD, CATPT_IMC_IPCCD);
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ipcc = catpt_readl_shim(cdev, IPCC);
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catpt_dsp_copy_rx(cdev, ipcc);
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complete(&cdev->ipc.done_completion);
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/* tell DSP processing is completed */
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catpt_updatel_shim(cdev, IPCC, CATPT_IPCC_DONE, 0);
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/* unmask host DONE interrupt */
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catpt_updatel_shim(cdev, IMC, CATPT_IMC_IPCCD, 0);
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ret = IRQ_HANDLED;
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}
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/* delayed reply or notification */
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if (isc & CATPT_ISC_IPCDB) {
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/* mask dsp BUSY interrupt */
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catpt_updatel_shim(cdev, IMC, CATPT_IMC_IPCDB, CATPT_IMC_IPCDB);
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ret = IRQ_WAKE_THREAD;
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}
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return ret;
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}
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@ -0,0 +1,401 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright(c) 2020 Intel Corporation. All rights reserved.
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*
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* Author: Cezary Rojewski <cezary.rojewski@intel.com>
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*/
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#ifndef __SND_SOC_INTEL_CATPT_MSG_H
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#define __SND_SOC_INTEL_CATPT_MSG_H
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struct catpt_dev;
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/* IPC messages base types */
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enum catpt_reply_status {
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CATPT_REPLY_SUCCESS = 0,
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CATPT_REPLY_ERROR_INVALID_PARAM = 1,
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CATPT_REPLY_UNKNOWN_MESSAGE_TYPE = 2,
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CATPT_REPLY_OUT_OF_RESOURCES = 3,
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CATPT_REPLY_BUSY = 4,
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CATPT_REPLY_PENDING = 5,
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CATPT_REPLY_FAILURE = 6,
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CATPT_REPLY_INVALID_REQUEST = 7,
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CATPT_REPLY_UNINITIALIZED = 8,
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CATPT_REPLY_NOT_FOUND = 9,
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CATPT_REPLY_SOURCE_NOT_STARTED = 10,
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};
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/* GLOBAL messages */
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enum catpt_global_msg_type {
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CATPT_GLB_GET_FW_VERSION = 0,
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CATPT_GLB_ALLOCATE_STREAM = 3,
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CATPT_GLB_FREE_STREAM = 4,
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CATPT_GLB_STREAM_MESSAGE = 6,
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CATPT_GLB_REQUEST_CORE_DUMP = 7,
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CATPT_GLB_SET_DEVICE_FORMATS = 10,
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CATPT_GLB_ENTER_DX_STATE = 12,
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CATPT_GLB_GET_MIXER_STREAM_INFO = 13,
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};
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union catpt_global_msg {
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u32 val;
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struct {
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u32 status:5;
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u32 context:19; /* stream or module specific */
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u32 global_msg_type:5;
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u32 fw_ready:1;
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u32 done:1;
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u32 busy:1;
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};
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} __packed;
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#define CATPT_MSG(hdr) { .val = hdr }
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#define CATPT_GLOBAL_MSG(msg_type) \
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{ .global_msg_type = CATPT_GLB_##msg_type }
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#define BUILD_HASH_SIZE 40
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struct catpt_fw_version {
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u8 build;
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u8 minor;
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u8 major;
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u8 type;
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u8 build_hash[BUILD_HASH_SIZE];
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u32 log_providers_hash;
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} __packed;
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int catpt_ipc_get_fw_version(struct catpt_dev *cdev,
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struct catpt_fw_version *version);
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enum catpt_pin_id {
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CATPT_PIN_ID_SYSTEM = 0,
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CATPT_PIN_ID_REFERENCE = 1,
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CATPT_PIN_ID_CAPTURE1 = 2,
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CATPT_PIN_ID_CAPTURE2 = 3,
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CATPT_PIN_ID_OFFLOAD1 = 4,
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CATPT_PIN_ID_OFFLOAD2 = 5,
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CATPT_PIN_ID_MIXER = 7,
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CATPT_PIN_ID_BLUETOOTH_CAPTURE = 8,
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CATPT_PIN_ID_BLUETOOTH_RENDER = 9,
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};
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enum catpt_path_id {
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CATPT_PATH_SSP0_OUT = 0,
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CATPT_PATH_SSP0_IN = 1,
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CATPT_PATH_SSP1_OUT = 2,
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CATPT_PATH_SSP1_IN = 3,
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/* duplicated audio in capture path */
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CATPT_PATH_SSP0_IN_DUP = 4,
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};
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enum catpt_stream_type {
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CATPT_STRM_TYPE_RENDER = 0, /* offload */
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CATPT_STRM_TYPE_SYSTEM = 1,
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CATPT_STRM_TYPE_CAPTURE = 2,
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CATPT_STRM_TYPE_LOOPBACK = 3,
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CATPT_STRM_TYPE_BLUETOOTH_RENDER = 4,
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CATPT_STRM_TYPE_BLUETOOTH_CAPTURE = 5,
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};
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enum catpt_format_id {
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CATPT_FORMAT_PCM = 0,
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CATPT_FORMAT_MP3 = 1,
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CATPT_FORMAT_AAC = 2,
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CATPT_FORMAT_WMA = 3,
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};
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enum catpt_channel_index {
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CATPT_CHANNEL_LEFT = 0x0,
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CATPT_CHANNEL_CENTER = 0x1,
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CATPT_CHANNEL_RIGHT = 0x2,
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CATPT_CHANNEL_LEFT_SURROUND = 0x3,
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CATPT_CHANNEL_CENTER_SURROUND = 0x3,
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CATPT_CHANNEL_RIGHT_SURROUND = 0x4,
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CATPT_CHANNEL_LFE = 0x7,
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CATPT_CHANNEL_INVALID = 0xF,
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};
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enum catpt_channel_config {
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CATPT_CHANNEL_CONFIG_MONO = 0, /* One channel only */
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CATPT_CHANNEL_CONFIG_STEREO = 1, /* L & R */
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CATPT_CHANNEL_CONFIG_2_POINT_1 = 2, /* L, R & LFE; PCM only */
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CATPT_CHANNEL_CONFIG_3_POINT_0 = 3, /* L, C & R; MP3 & AAC only */
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CATPT_CHANNEL_CONFIG_3_POINT_1 = 4, /* L, C, R & LFE; PCM only */
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CATPT_CHANNEL_CONFIG_QUATRO = 5, /* L, R, Ls & Rs; PCM only */
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CATPT_CHANNEL_CONFIG_4_POINT_0 = 6, /* L, C, R & Cs; MP3 & AAC only */
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CATPT_CHANNEL_CONFIG_5_POINT_0 = 7, /* L, C, R, Ls & Rs */
|
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CATPT_CHANNEL_CONFIG_5_POINT_1 = 8, /* L, C, R, Ls, Rs & LFE */
|
||||
CATPT_CHANNEL_CONFIG_DUAL_MONO = 9, /* One channel replicated in two */
|
||||
CATPT_CHANNEL_CONFIG_INVALID = 10,
|
||||
};
|
||||
|
||||
enum catpt_interleaving_style {
|
||||
CATPT_INTERLEAVING_PER_CHANNEL = 0,
|
||||
CATPT_INTERLEAVING_PER_SAMPLE = 1,
|
||||
};
|
||||
|
||||
struct catpt_audio_format {
|
||||
u32 sample_rate;
|
||||
u32 bit_depth;
|
||||
u32 channel_map;
|
||||
u32 channel_config;
|
||||
u32 interleaving;
|
||||
u8 num_channels;
|
||||
u8 valid_bit_depth;
|
||||
u8 reserved[2];
|
||||
} __packed;
|
||||
|
||||
struct catpt_ring_info {
|
||||
u32 page_table_addr;
|
||||
u32 num_pages;
|
||||
u32 size;
|
||||
u32 offset;
|
||||
u32 ring_first_page_pfn;
|
||||
} __packed;
|
||||
|
||||
#define CATPT_MODULE_COUNT (CATPT_MODID_LAST + 1)
|
||||
|
||||
enum catpt_module_id {
|
||||
CATPT_MODID_BASE_FW = 0x0,
|
||||
CATPT_MODID_MP3 = 0x1,
|
||||
CATPT_MODID_AAC_5_1 = 0x2,
|
||||
CATPT_MODID_AAC_2_0 = 0x3,
|
||||
CATPT_MODID_SRC = 0x4,
|
||||
CATPT_MODID_WAVES = 0x5,
|
||||
CATPT_MODID_DOLBY = 0x6,
|
||||
CATPT_MODID_BOOST = 0x7,
|
||||
CATPT_MODID_LPAL = 0x8,
|
||||
CATPT_MODID_DTS = 0x9,
|
||||
CATPT_MODID_PCM_CAPTURE = 0xA,
|
||||
CATPT_MODID_PCM_SYSTEM = 0xB,
|
||||
CATPT_MODID_PCM_REFERENCE = 0xC,
|
||||
CATPT_MODID_PCM = 0xD, /* offload */
|
||||
CATPT_MODID_BLUETOOTH_RENDER = 0xE,
|
||||
CATPT_MODID_BLUETOOTH_CAPTURE = 0xF,
|
||||
CATPT_MODID_LAST = CATPT_MODID_BLUETOOTH_CAPTURE,
|
||||
};
|
||||
|
||||
struct catpt_module_entry {
|
||||
u32 module_id;
|
||||
u32 entry_point;
|
||||
} __packed;
|
||||
|
||||
struct catpt_module_map {
|
||||
u8 num_entries;
|
||||
struct catpt_module_entry entries[];
|
||||
} __packed;
|
||||
|
||||
struct catpt_memory_info {
|
||||
u32 offset;
|
||||
u32 size;
|
||||
} __packed;
|
||||
|
||||
#define CATPT_CHANNELS_MAX 4
|
||||
#define CATPT_ALL_CHANNELS_MASK UINT_MAX
|
||||
|
||||
struct catpt_stream_info {
|
||||
u32 stream_hw_id;
|
||||
u32 reserved;
|
||||
u32 read_pos_regaddr;
|
||||
u32 pres_pos_regaddr;
|
||||
u32 peak_meter_regaddr[CATPT_CHANNELS_MAX];
|
||||
u32 volume_regaddr[CATPT_CHANNELS_MAX];
|
||||
} __packed;
|
||||
|
||||
int catpt_ipc_alloc_stream(struct catpt_dev *cdev,
|
||||
enum catpt_path_id path_id,
|
||||
enum catpt_stream_type type,
|
||||
struct catpt_audio_format *afmt,
|
||||
struct catpt_ring_info *rinfo,
|
||||
u8 num_modules,
|
||||
struct catpt_module_entry *modules,
|
||||
struct resource *persistent,
|
||||
struct resource *scratch,
|
||||
struct catpt_stream_info *sinfo);
|
||||
int catpt_ipc_free_stream(struct catpt_dev *cdev, u8 stream_hw_id);
|
||||
|
||||
enum catpt_ssp_iface {
|
||||
CATPT_SSP_IFACE_0 = 0,
|
||||
CATPT_SSP_IFACE_1 = 1,
|
||||
CATPT_SSP_IFACE_LAST = CATPT_SSP_IFACE_1,
|
||||
};
|
||||
|
||||
#define CATPT_SSP_COUNT (CATPT_SSP_IFACE_LAST + 1)
|
||||
|
||||
enum catpt_mclk_frequency {
|
||||
CATPT_MCLK_OFF = 0,
|
||||
CATPT_MCLK_FREQ_6_MHZ = 1,
|
||||
CATPT_MCLK_FREQ_21_MHZ = 2,
|
||||
CATPT_MCLK_FREQ_24_MHZ = 3,
|
||||
};
|
||||
|
||||
enum catpt_ssp_mode {
|
||||
CATPT_SSP_MODE_I2S_CONSUMER = 0,
|
||||
CATPT_SSP_MODE_I2S_PROVIDER = 1,
|
||||
CATPT_SSP_MODE_TDM_PROVIDER = 2,
|
||||
};
|
||||
|
||||
struct catpt_ssp_device_format {
|
||||
u32 iface;
|
||||
u32 mclk;
|
||||
u32 mode;
|
||||
u16 clock_divider;
|
||||
u8 channels;
|
||||
} __packed;
|
||||
|
||||
int catpt_ipc_set_device_format(struct catpt_dev *cdev,
|
||||
struct catpt_ssp_device_format *devfmt);
|
||||
|
||||
enum catpt_dx_state {
|
||||
CATPT_DX_STATE_D3 = 3,
|
||||
};
|
||||
|
||||
enum catpt_dx_type {
|
||||
CATPT_DX_TYPE_FW_IMAGE = 0,
|
||||
CATPT_DX_TYPE_MEMORY_DUMP = 1,
|
||||
};
|
||||
|
||||
struct catpt_save_meminfo {
|
||||
u32 offset;
|
||||
u32 size;
|
||||
u32 source;
|
||||
} __packed;
|
||||
|
||||
#define SAVE_MEMINFO_MAX 14
|
||||
|
||||
struct catpt_dx_context {
|
||||
u32 num_meminfo;
|
||||
struct catpt_save_meminfo meminfo[SAVE_MEMINFO_MAX];
|
||||
} __packed;
|
||||
|
||||
int catpt_ipc_enter_dxstate(struct catpt_dev *cdev, enum catpt_dx_state state,
|
||||
struct catpt_dx_context *context);
|
||||
|
||||
struct catpt_mixer_stream_info {
|
||||
u32 mixer_hw_id;
|
||||
u32 peak_meter_regaddr[CATPT_CHANNELS_MAX];
|
||||
u32 volume_regaddr[CATPT_CHANNELS_MAX];
|
||||
} __packed;
|
||||
|
||||
int catpt_ipc_get_mixer_stream_info(struct catpt_dev *cdev,
|
||||
struct catpt_mixer_stream_info *info);
|
||||
|
||||
/* STREAM messages */
|
||||
|
||||
enum catpt_stream_msg_type {
|
||||
CATPT_STRM_RESET_STREAM = 0,
|
||||
CATPT_STRM_PAUSE_STREAM = 1,
|
||||
CATPT_STRM_RESUME_STREAM = 2,
|
||||
CATPT_STRM_STAGE_MESSAGE = 3,
|
||||
CATPT_STRM_NOTIFICATION = 4,
|
||||
};
|
||||
|
||||
enum catpt_stage_action {
|
||||
CATPT_STG_SET_VOLUME = 1,
|
||||
CATPT_STG_SET_WRITE_POSITION = 2,
|
||||
CATPT_STG_MUTE_LOOPBACK = 3,
|
||||
};
|
||||
|
||||
union catpt_stream_msg {
|
||||
u32 val;
|
||||
struct {
|
||||
u32 status:5;
|
||||
u32 reserved:7;
|
||||
u32 stage_action:4;
|
||||
u32 stream_hw_id:4;
|
||||
u32 stream_msg_type:4;
|
||||
u32 global_msg_type:5;
|
||||
u32 fw_ready:1;
|
||||
u32 done:1;
|
||||
u32 busy:1;
|
||||
};
|
||||
} __packed;
|
||||
|
||||
#define CATPT_STREAM_MSG(msg_type) \
|
||||
{ \
|
||||
.stream_msg_type = CATPT_STRM_##msg_type, \
|
||||
.global_msg_type = CATPT_GLB_STREAM_MESSAGE }
|
||||
#define CATPT_STAGE_MSG(msg_type) \
|
||||
{ \
|
||||
.stage_action = CATPT_STG_##msg_type, \
|
||||
.stream_msg_type = CATPT_STRM_STAGE_MESSAGE, \
|
||||
.global_msg_type = CATPT_GLB_STREAM_MESSAGE }
|
||||
|
||||
int catpt_ipc_reset_stream(struct catpt_dev *cdev, u8 stream_hw_id);
|
||||
int catpt_ipc_pause_stream(struct catpt_dev *cdev, u8 stream_hw_id);
|
||||
int catpt_ipc_resume_stream(struct catpt_dev *cdev, u8 stream_hw_id);
|
||||
|
||||
/* STREAM messages - STAGE subtype */
|
||||
|
||||
enum catpt_audio_curve_type {
|
||||
CATPT_AUDIO_CURVE_NONE = 0,
|
||||
CATPT_AUDIO_CURVE_WINDOWS_FADE = 1,
|
||||
};
|
||||
|
||||
int catpt_ipc_set_volume(struct catpt_dev *cdev, u8 stream_hw_id,
|
||||
u32 channel, u32 volume,
|
||||
u32 curve_duration,
|
||||
enum catpt_audio_curve_type curve_type);
|
||||
|
||||
int catpt_ipc_set_write_pos(struct catpt_dev *cdev, u8 stream_hw_id,
|
||||
u32 pos, bool eob, bool ll);
|
||||
|
||||
int catpt_ipc_mute_loopback(struct catpt_dev *cdev, u8 stream_hw_id, bool mute);
|
||||
|
||||
/* NOTIFICATION messages */
|
||||
|
||||
enum catpt_notify_reason {
|
||||
CATPT_NOTIFY_POSITION_CHANGED = 0,
|
||||
CATPT_NOTIFY_GLITCH_OCCURRED = 1,
|
||||
};
|
||||
|
||||
union catpt_notify_msg {
|
||||
u32 val;
|
||||
struct {
|
||||
u32 mailbox_address:29;
|
||||
u32 fw_ready:1;
|
||||
u32 done:1;
|
||||
u32 busy:1;
|
||||
};
|
||||
struct {
|
||||
u32 status:5;
|
||||
u32 reserved:7;
|
||||
u32 notify_reason:4;
|
||||
u32 stream_hw_id:4;
|
||||
u32 stream_msg_type:4;
|
||||
u32 global_msg_type:5;
|
||||
u32 hdr:3; /* fw_ready, done, busy */
|
||||
};
|
||||
} __packed;
|
||||
|
||||
#define FW_INFO_SIZE_MAX 100
|
||||
|
||||
struct catpt_fw_ready {
|
||||
u32 inbox_offset;
|
||||
u32 outbox_offset;
|
||||
u32 inbox_size;
|
||||
u32 outbox_size;
|
||||
u32 fw_info_size;
|
||||
char fw_info[FW_INFO_SIZE_MAX];
|
||||
} __packed;
|
||||
|
||||
struct catpt_notify_position {
|
||||
u32 stream_position;
|
||||
u32 fw_cycle_count;
|
||||
} __packed;
|
||||
|
||||
enum catpt_glitch_type {
|
||||
CATPT_GLITCH_UNDERRUN = 1,
|
||||
CATPT_GLITCH_DECODER_ERROR = 2,
|
||||
CATPT_GLITCH_DOUBLED_WRITE_POS = 3,
|
||||
};
|
||||
|
||||
struct catpt_notify_glitch {
|
||||
u32 type;
|
||||
u64 presentation_pos;
|
||||
u32 write_pos;
|
||||
} __packed;
|
||||
|
||||
#endif
|
|
@ -15,7 +15,6 @@
|
|||
#define CATPT_SHIM_REGS_SIZE 4096
|
||||
#define CATPT_DMA_REGS_SIZE 1024
|
||||
#define CATPT_DMA_COUNT 2
|
||||
#define CATPT_SSP_COUNT 2
|
||||
#define CATPT_SSP_REGS_SIZE 512
|
||||
|
||||
/* DSP Shim registers */
|
||||
|
|
Loading…
Reference in New Issue