mirror of https://gitee.com/openkylin/linux.git
clocksource/drivers/riscv_timer: Provide the sched_clock
Currently, we don't have a sched_clock registered for RISC-V systems. This means Linux time keeping will use jiffies (running at HZ) as the default sched_clock. To avoid this, we explicity provide sched_clock using RISC-V rdtime instruction (similar to riscv_timer clocksource). Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -599,7 +599,7 @@ config ATCPIT100_TIMER
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config RISCV_TIMER
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config RISCV_TIMER
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bool "Timer for the RISC-V platform"
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bool "Timer for the RISC-V platform"
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depends on RISCV
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depends on GENERIC_SCHED_CLOCK && RISCV
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default y
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default y
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select TIMER_PROBE
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select TIMER_PROBE
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select TIMER_OF
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select TIMER_OF
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@ -8,6 +8,7 @@
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#include <linux/cpu.h>
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#include <linux/cpu.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/irq.h>
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#include <linux/sched_clock.h>
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#include <asm/smp.h>
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#include <asm/smp.h>
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#include <asm/sbi.h>
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#include <asm/sbi.h>
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@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs)
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return get_cycles64();
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return get_cycles64();
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}
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}
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static u64 riscv_sched_clock(void)
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{
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return get_cycles64();
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}
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static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
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static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
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.name = "riscv_clocksource",
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.name = "riscv_clocksource",
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.rating = 300,
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.rating = 300,
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@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n)
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cs = per_cpu_ptr(&riscv_clocksource, cpuid);
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cs = per_cpu_ptr(&riscv_clocksource, cpuid);
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clocksource_register_hz(cs, riscv_timebase);
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clocksource_register_hz(cs, riscv_timebase);
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sched_clock_register(riscv_sched_clock,
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BITS_PER_LONG, riscv_timebase);
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error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
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error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
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"clockevents/riscv/timer:starting",
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"clockevents/riscv/timer:starting",
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riscv_timer_starting_cpu, riscv_timer_dying_cpu);
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riscv_timer_starting_cpu, riscv_timer_dying_cpu);
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