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media: hantro: Add helpers to prepare/finish a run 

And use them where appropriate.

We might want to move hantro_{prepare,finish}_run() calls to
device_run() and have a 2-step approach similar to cedrus (prepare +
trigger) at some point, but let's keep that for later.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Boris Brezillon 2019-07-25 10:17:54 -04:00 committed by Mauro Carvalho Chehab
parent deff5c37c8
commit 932a9317ac
7 changed files with 37 additions and 33 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
drivers/staging/media/hantro/hantro_drv.c
View File

@ -153,6 +153,28 @@ void hantro_watchdog(struct work_struct *work)
}
}
void hantro_prepare_run(struct hantro_ctx *ctx)
{
struct vb2_v4l2_buffer *src_buf;
src_buf = hantro_get_src_buf(ctx);
v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req,
&ctx->ctrl_handler);
}
void hantro_finish_run(struct hantro_ctx *ctx)
{
struct vb2_v4l2_buffer *src_buf;
src_buf = hantro_get_src_buf(ctx);
v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req,
&ctx->ctrl_handler);
/* Kick the watchdog. */
schedule_delayed_work(&ctx->dev->watchdog_work,
msecs_to_jiffies(2000));
}
static void device_run(void *priv)
{
struct hantro_ctx *ctx = priv;

10
drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
View File

@ -171,8 +171,7 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
dst_buf = hantro_get_dst_buf(ctx);
/* Apply request controls if any */
v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req,
&ctx->ctrl_handler);
hantro_prepare_run(ctx);
slice_params = hantro_get_ctrl(ctx,
V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS);
@ -248,12 +247,7 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
&dst_buf->vb2_buf,
sequence, picture, slice_params);
/* Controls no longer in-use, we can complete them */
v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req,
&ctx->ctrl_handler);
/* Kick the watchdog and start decoding */
schedule_delayed_work(&vpu->watchdog_work, msecs_to_jiffies(2000));
hantro_finish_run(ctx);
reg = G1_REG_DEC_E(1);
vdpu_write(vpu, reg, G1_SWREG(1));

11
drivers/staging/media/hantro/hantro_g1_vp8_dec.c
View File

@ -449,13 +449,10 @@ void hantro_g1_vp8_dec_run(struct hantro_ctx *ctx)
struct hantro_dev *vpu = ctx->dev;
size_t height = ctx->dst_fmt.height;
size_t width = ctx->dst_fmt.width;
struct vb2_v4l2_buffer *vb2_src;
u32 mb_width, mb_height;
u32 reg;
vb2_src = hantro_get_src_buf(ctx);
v4l2_ctrl_request_setup(vb2_src->vb2_buf.req_obj.req,
&ctx->ctrl_handler);
hantro_prepare_run(ctx);
hdr = hantro_get_ctrl(ctx, V4L2_CID_MPEG_VIDEO_VP8_FRAME_HEADER);
if (WARN_ON(!hdr))
@ -516,11 +513,7 @@ void hantro_g1_vp8_dec_run(struct hantro_ctx *ctx)
cfg_ref(ctx, hdr);
cfg_buffers(ctx, hdr);
/* Controls no longer in-use, we can complete them */
v4l2_ctrl_request_complete(vb2_src->vb2_buf.req_obj.req,
&ctx->ctrl_handler);
schedule_delayed_work(&vpu->watchdog_work, msecs_to_jiffies(2000));
hantro_finish_run(ctx);
vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
}

7
drivers/staging/media/hantro/hantro_h1_jpeg_enc.c
View File

@ -87,6 +87,8 @@ void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx)
src_buf = hantro_get_src_buf(ctx);
dst_buf = hantro_get_dst_buf(ctx);
hantro_prepare_run(ctx);
memset(&jpeg_ctx, 0, sizeof(jpeg_ctx));
jpeg_ctx.buffer = vb2_plane_vaddr(&dst_buf->vb2_buf, 0);
jpeg_ctx.width = ctx->dst_fmt.width;
@ -119,7 +121,8 @@ void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx)
| H1_REG_ENC_CTRL_ENC_MODE_JPEG
| H1_REG_ENC_PIC_INTRA
| H1_REG_ENC_CTRL_EN_BIT;
/* Kick the watchdog and start encoding */
schedule_delayed_work(&vpu->watchdog_work, msecs_to_jiffies(2000));
hantro_finish_run(ctx);
vepu_write(vpu, reg, H1_REG_ENC_CTRL);
}

2
drivers/staging/media/hantro/hantro_hw.h
View File

@ -97,6 +97,8 @@ void hantro_watchdog(struct work_struct *work);
void hantro_run(struct hantro_ctx *ctx);
void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused,
enum vb2_buffer_state result);
void hantro_prepare_run(struct hantro_ctx *ctx);
void hantro_finish_run(struct hantro_ctx *ctx);
void hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx);
void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx);

8
drivers/staging/media/hantro/rk3399_vpu_hw_jpeg_enc.c
View File

@ -113,14 +113,12 @@ void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx)
struct hantro_dev *vpu = ctx->dev;
struct vb2_v4l2_buffer *src_buf, *dst_buf;
struct hantro_jpeg_ctx jpeg_ctx;
struct media_request *src_req;
u32 reg;
src_buf = hantro_get_src_buf(ctx);
dst_buf = hantro_get_dst_buf(ctx);
src_req = src_buf->vb2_buf.req_obj.req;
v4l2_ctrl_request_setup(src_req, &ctx->ctrl_handler);
hantro_prepare_run(ctx);
memset(&jpeg_ctx, 0, sizeof(jpeg_ctx));
jpeg_ctx.buffer = vb2_plane_vaddr(&dst_buf->vb2_buf, 0);
@ -157,9 +155,7 @@ void rk3399_vpu_jpeg_enc_run(struct hantro_ctx *ctx)
| VEPU_REG_ENCODE_FORMAT_JPEG
| VEPU_REG_ENCODE_ENABLE;
v4l2_ctrl_request_complete(src_req, &ctx->ctrl_handler);
/* Kick the watchdog and start encoding */
schedule_delayed_work(&vpu->watchdog_work, msecs_to_jiffies(2000));
hantro_finish_run(ctx);
vepu_write(vpu, reg, VEPU_REG_ENCODE_START);
}

10
drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c
View File

@ -172,9 +172,7 @@ void rk3399_vpu_mpeg2_dec_run(struct hantro_ctx *ctx)
src_buf = hantro_get_src_buf(ctx);
dst_buf = hantro_get_dst_buf(ctx);
/* Apply request controls if any */
v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req,
&ctx->ctrl_handler);
hantro_prepare_run(ctx);
slice_params = hantro_get_ctrl(ctx,
V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS);
@ -254,12 +252,8 @@ void rk3399_vpu_mpeg2_dec_run(struct hantro_ctx *ctx)
&dst_buf->vb2_buf,
sequence, picture, slice_params);
/* Controls no longer in-use, we can complete them */
v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req,
&ctx->ctrl_handler);
/* Kick the watchdog and start decoding */
schedule_delayed_work(&vpu->watchdog_work, msecs_to_jiffies(2000));
hantro_finish_run(ctx);
reg = vdpu_read(vpu, VDPU_SWREG(57)) | VDPU_REG_DEC_E(1);
vdpu_write(vpu, reg, VDPU_SWREG(57));