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arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K 

This commit adds a reference to the appropriate MSI controller in the
description of the PCIe controllers on Marvel Armada 7K and 8K
platforms.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
Thomas Petazzoni 2016-09-01 17:41:24 +02:00 committed by Gregory CLEMENT
parent 98e45c1675
commit 93970e67bd
2 changed files with 6 additions and 0 deletions
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3
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
View File

@ -176,6 +176,7 @@ cpm_pcie0: pcie@f2600000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =
@ -201,6 +202,7 @@ cpm_pcie1: pcie@f2620000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =
@ -227,6 +229,7 @@ cpm_pcie2: pcie@f2640000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =

3
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
View File

@ -176,6 +176,7 @@ cps_pcie0: pcie@f4600000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =
@ -201,6 +202,7 @@ cps_pcie1: pcie@f4620000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =
@ -227,6 +229,7 @@ cps_pcie2: pcie@f4640000 {
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
bus-range = <0 0xff>;
ranges =