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drm/i915/cdclk: have only one init/uninit function 

While transitioning to having better clarity between the modules, it's
desirable to have the function name prefixes reflect the
module. Functions in intel_foo.c should be prefixed intel_foo_.

Expose only one CDCLK init/uninit function from intel_cdclk.c instead of
one per platform. Obviously this adds one "unnecessary" if ladder within
the entry points. However it should be considered more of a CDCLK
implementation detail how this is done per platform, instead of exposing
the fact. In other words, abstract the CDCLK module better.

No functional changes.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f63ed6e129098a32c63735be6cffa4756e7947af.1554461791.git.jani.nikula@intel.com
This commit is contained in:
Jani Nikula 2019-04-05 14:00:26 +03:00
parent e7674ef682
commit 93a643f29b
3 changed files with 58 additions and 88 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

120
drivers/gpu/drm/i915/intel_cdclk.c
View File

@ -1129,16 +1129,7 @@ static void skl_sanitize_cdclk(struct drm_i915_private *dev_priv)
dev_priv->cdclk.hw.vco = -1;
}
/**
* skl_init_cdclk - Initialize CDCLK on SKL
* @dev_priv: i915 device
*
* Initialize CDCLK for SKL and derivatives. This is generally
* done only during the display core initialization sequence,
* after which the DMC will take care of turning CDCLK off/on
* as needed.
*/
void skl_init_cdclk(struct drm_i915_private *dev_priv)
static void skl_init_cdclk(struct drm_i915_private *dev_priv)
{
struct intel_cdclk_state cdclk_state;
@ -1167,14 +1158,7 @@ void skl_init_cdclk(struct drm_i915_private *dev_priv)
skl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
}
/**
* skl_uninit_cdclk - Uninitialize CDCLK on SKL
* @dev_priv: i915 device
*
* Uninitialize CDCLK for SKL and derivatives. This is done only
* during the display core uninitialization sequence.
*/
void skl_uninit_cdclk(struct drm_i915_private *dev_priv)
static void skl_uninit_cdclk(struct drm_i915_private *dev_priv)
{
struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;
@ -1499,16 +1483,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
dev_priv->cdclk.hw.vco = -1;
}
/**
* bxt_init_cdclk - Initialize CDCLK on BXT
* @dev_priv: i915 device
*
* Initialize CDCLK for BXT and derivatives. This is generally
* done only during the display core initialization sequence,
* after which the DMC will take care of turning CDCLK off/on
* as needed.
*/
void bxt_init_cdclk(struct drm_i915_private *dev_priv)
static void bxt_init_cdclk(struct drm_i915_private *dev_priv)
{
struct intel_cdclk_state cdclk_state;
@ -1537,14 +1512,7 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
bxt_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
}
/**
* bxt_uninit_cdclk - Uninitialize CDCLK on BXT
* @dev_priv: i915 device
*
* Uninitialize CDCLK for BXT and derivatives. This is done only
* during the display core uninitialization sequence.
*/
void bxt_uninit_cdclk(struct drm_i915_private *dev_priv)
static void bxt_uninit_cdclk(struct drm_i915_private *dev_priv)
{
struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;
@ -1977,16 +1945,7 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
icl_calc_voltage_level(cdclk_state->cdclk);
}
/**
* icl_init_cdclk - Initialize CDCLK on ICL
* @dev_priv: i915 device
*
* Initialize CDCLK for ICL. This consists mainly of initializing
* dev_priv->cdclk.hw and sanitizing the state of the hardware if needed. This
* is generally done only during the display core initialization sequence, after
* which the DMC will take care of turning CDCLK off/on as needed.
*/
void icl_init_cdclk(struct drm_i915_private *dev_priv)
static void icl_init_cdclk(struct drm_i915_private *dev_priv)
{
struct intel_cdclk_state sanitized_state;
u32 val;
@ -2023,14 +1982,7 @@ void icl_init_cdclk(struct drm_i915_private *dev_priv)
icl_set_cdclk(dev_priv, &sanitized_state, INVALID_PIPE);
}
/**
* icl_uninit_cdclk - Uninitialize CDCLK on ICL
* @dev_priv: i915 device
*
* Uninitialize CDCLK for ICL. This is done only during the display core
* uninitialization sequence.
*/
void icl_uninit_cdclk(struct drm_i915_private *dev_priv)
static void icl_uninit_cdclk(struct drm_i915_private *dev_priv)
{
struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;
@ -2041,16 +1993,7 @@ void icl_uninit_cdclk(struct drm_i915_private *dev_priv)
icl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
}
/**
* cnl_init_cdclk - Initialize CDCLK on CNL
* @dev_priv: i915 device
*
* Initialize CDCLK for CNL. This is generally
* done only during the display core initialization sequence,
* after which the DMC will take care of turning CDCLK off/on
* as needed.
*/
void cnl_init_cdclk(struct drm_i915_private *dev_priv)
static void cnl_init_cdclk(struct drm_i915_private *dev_priv)
{
struct intel_cdclk_state cdclk_state;
@ -2069,14 +2012,7 @@ void cnl_init_cdclk(struct drm_i915_private *dev_priv)
cnl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
}
/**
* cnl_uninit_cdclk - Uninitialize CDCLK on CNL
* @dev_priv: i915 device
*
* Uninitialize CDCLK for CNL. This is done only
* during the display core uninitialization sequence.
*/
void cnl_uninit_cdclk(struct drm_i915_private *dev_priv)
static void cnl_uninit_cdclk(struct drm_i915_private *dev_priv)
{
struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;
@ -2087,6 +2023,46 @@ void cnl_uninit_cdclk(struct drm_i915_private *dev_priv)
cnl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
}
/**
* intel_cdclk_init - Initialize CDCLK
* @i915: i915 device
*
* Initialize CDCLK. This consists mainly of initializing dev_priv->cdclk.hw and
* sanitizing the state of the hardware if needed. This is generally done only
* during the display core initialization sequence, after which the DMC will
* take care of turning CDCLK off/on as needed.
*/
void intel_cdclk_init(struct drm_i915_private *i915)
{
if (IS_ICELAKE(i915))
icl_init_cdclk(i915);
else if (IS_CANNONLAKE(i915))
cnl_init_cdclk(i915);
else if (IS_GEN9_BC(i915))
skl_init_cdclk(i915);
else if (IS_GEN9_LP(i915))
bxt_init_cdclk(i915);
}
/**
* intel_cdclk_uninit - Uninitialize CDCLK
* @i915: i915 device
*
* Uninitialize CDCLK. This is done only during the display core
* uninitialization sequence.
*/
void intel_cdclk_uninit(struct drm_i915_private *i915)
{
if (IS_ICELAKE(i915))
icl_uninit_cdclk(i915);
else if (IS_CANNONLAKE(i915))
cnl_uninit_cdclk(i915);
else if (IS_GEN9_BC(i915))
skl_uninit_cdclk(i915);
else if (IS_GEN9_LP(i915))
bxt_uninit_cdclk(i915);
}
/**
* intel_cdclk_needs_modeset - Determine if two CDCLK states require a modeset on all pipes
* @a: first CDCLK state

10
drivers/gpu/drm/i915/intel_cdclk.h
View File

@ -16,14 +16,8 @@ struct intel_cdclk_state;
struct intel_crtc_state;
int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);
void skl_init_cdclk(struct drm_i915_private *dev_priv);
void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
void cnl_init_cdclk(struct drm_i915_private *dev_priv);
void cnl_uninit_cdclk(struct drm_i915_private *dev_priv);
void bxt_init_cdclk(struct drm_i915_private *dev_priv);
void bxt_uninit_cdclk(struct drm_i915_private *dev_priv);
void icl_init_cdclk(struct drm_i915_private *dev_priv);
void icl_uninit_cdclk(struct drm_i915_private *dev_priv);
void intel_cdclk_init(struct drm_i915_private *i915);
void intel_cdclk_uninit(struct drm_i915_private *i915);
void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);
void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
void intel_update_cdclk(struct drm_i915_private *dev_priv);

16
drivers/gpu/drm/i915/intel_runtime_pm.c
View File

@ -3664,7 +3664,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv,
mutex_unlock(&power_domains->lock);
skl_init_cdclk(dev_priv);
intel_cdclk_init(dev_priv);
gen9_dbuf_enable(dev_priv);
@ -3681,7 +3681,7 @@ static void skl_display_core_uninit(struct drm_i915_private *dev_priv)
gen9_dbuf_disable(dev_priv);
skl_uninit_cdclk(dev_priv);
intel_cdclk_uninit(dev_priv);
/* The spec doesn't call for removing the reset handshake flag */
/* disable PG1 and Misc I/O */
@ -3726,7 +3726,7 @@ void bxt_display_core_init(struct drm_i915_private *dev_priv,
mutex_unlock(&power_domains->lock);
bxt_init_cdclk(dev_priv);
intel_cdclk_init(dev_priv);
gen9_dbuf_enable(dev_priv);
@ -3743,7 +3743,7 @@ void bxt_display_core_uninit(struct drm_i915_private *dev_priv)
gen9_dbuf_disable(dev_priv);
bxt_uninit_cdclk(dev_priv);
intel_cdclk_uninit(dev_priv);
/* The spec doesn't call for removing the reset handshake flag */
@ -3785,7 +3785,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume
mutex_unlock(&power_domains->lock);
/* 5. Enable CD clock */
cnl_init_cdclk(dev_priv);
intel_cdclk_init(dev_priv);
/* 6. Enable DBUF */
gen9_dbuf_enable(dev_priv);
@ -3807,7 +3807,7 @@ static void cnl_display_core_uninit(struct drm_i915_private *dev_priv)
gen9_dbuf_disable(dev_priv);
/* 3. Disable CD clock */
cnl_uninit_cdclk(dev_priv);
intel_cdclk_uninit(dev_priv);
/*
* 4. Disable Power Well 1 (PG1).
@ -3849,7 +3849,7 @@ void icl_display_core_init(struct drm_i915_private *dev_priv,
mutex_unlock(&power_domains->lock);
/* 5. Enable CDCLK. */
icl_init_cdclk(dev_priv);
intel_cdclk_init(dev_priv);
/* 6. Enable DBUF. */
icl_dbuf_enable(dev_priv);
@ -3874,7 +3874,7 @@ void icl_display_core_uninit(struct drm_i915_private *dev_priv)
icl_dbuf_disable(dev_priv);
/* 3. Disable CD clock */
icl_uninit_cdclk(dev_priv);
intel_cdclk_uninit(dev_priv);
/*
* 4. Disable Power Well 1 (PG1).