mirror of https://gitee.com/openkylin/linux.git
ia64/pv_ops: paravirtualize mov = ar.itc.
paravirtualize mov reg = ar.itc. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -77,6 +77,11 @@
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(pred) mov reg = psr \
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(pred) mov reg = psr \
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CLOBBER(clob)
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CLOBBER(clob)
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#define MOV_FROM_ITC(pred, pred_clob, reg, clob) \
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(pred) mov reg = ar.itc \
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CLOBBER(clob) \
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CLOBBER_PRED(pred_clob)
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#define MOV_TO_IFA(reg, clob) \
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#define MOV_TO_IFA(reg, clob) \
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mov cr.ifa = reg \
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mov cr.ifa = reg \
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CLOBBER(clob)
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CLOBBER(clob)
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@ -735,7 +735,7 @@ GLOBAL_ENTRY(__paravirt_leave_syscall)
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__paravirt_work_processed_syscall:
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__paravirt_work_processed_syscall:
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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adds r2=PT(LOADRS)+16,r12
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adds r2=PT(LOADRS)+16,r12
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(pUStk) mov.m r22=ar.itc // fetch time at leave
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MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave
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adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
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adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
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;;
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;;
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(p6) ld4 r31=[r18] // load current_thread_info()->flags
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(p6) ld4 r31=[r18] // load current_thread_info()->flags
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@ -984,7 +984,7 @@ GLOBAL_ENTRY(__paravirt_leave_kernel)
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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.pred.rel.mutex pUStk,pKStk
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.pred.rel.mutex pUStk,pKStk
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MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
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MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
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(pUStk) mov.m r22=ar.itc // M fetch time at leave
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MOV_FROM_ITC(pUStk, p9, r22, r29) // M fetch time at leave
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nop.i 0
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nop.i 0
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;;
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;;
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#else
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#else
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@ -280,7 +280,7 @@ ENTRY(fsys_gettimeofday)
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(p9) cmp.eq p13,p0 = 0,r30 // if mmio_ptr, clear p13 jitter control
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(p9) cmp.eq p13,p0 = 0,r30 // if mmio_ptr, clear p13 jitter control
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;;
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;;
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.pred.rel.mutex p8,p9
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.pred.rel.mutex p8,p9
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(p8) mov r2 = ar.itc // CPU_TIMER. 36 clocks latency!!!
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MOV_FROM_ITC(p8, p6, r2, r10) // CPU_TIMER. 36 clocks latency!!!
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(p9) ld8 r2 = [r30] // MMIO_TIMER. Could also have latency issues..
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(p9) ld8 r2 = [r30] // MMIO_TIMER. Could also have latency issues..
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(p13) ld8 r25 = [r19] // get itc_lastcycle value
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(p13) ld8 r25 = [r19] // get itc_lastcycle value
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ld8 r9 = [r22],IA64_TIMESPEC_TV_NSEC_OFFSET // tv_sec
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ld8 r9 = [r22],IA64_TIMESPEC_TV_NSEC_OFFSET // tv_sec
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@ -684,7 +684,7 @@ GLOBAL_ENTRY(paravirt_fsys_bubble_down)
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;;
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;;
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mov ar.rsc=0 // M2 set enforced lazy mode, pl 0, LE, loadrs=0
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mov ar.rsc=0 // M2 set enforced lazy mode, pl 0, LE, loadrs=0
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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mov.m r30=ar.itc // M get cycle for accounting
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MOV_FROM_ITC(p0, p6, r30, r23) // M get cycle for accounting
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#else
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#else
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nop.m 0
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nop.m 0
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#endif
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#endif
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@ -804,7 +804,7 @@ ENTRY(break_fault)
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///////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////
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st1 [r16]=r0 // M2|3 clear current->thread.on_ustack flag
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st1 [r16]=r0 // M2|3 clear current->thread.on_ustack flag
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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mov.m r30=ar.itc // M get cycle for accounting
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MOV_FROM_ITC(p0, p14, r30, r18) // M get cycle for accounting
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#else
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#else
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mov b6=r30 // I0 setup syscall handler branch reg early
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mov b6=r30 // I0 setup syscall handler branch reg early
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#endif
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#endif
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