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drm/nouveau/top: take nvkm_device as argument to public functions 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2016-05-30 10:32:55 +10:00
parent 5dd0775e50
commit 952eb819e3
4 changed files with 16 additions and 13 deletions
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8
drivers/gpu/drm/nouveau/include/nvkm/subdev/top.h
View File

@ -8,10 +8,10 @@ struct nvkm_top {
struct list_head device;
};
u32 nvkm_top_reset(struct nvkm_top *, enum nvkm_devidx);
u32 nvkm_top_intr(struct nvkm_top *, u32 intr, u64 *subdevs);
enum nvkm_devidx nvkm_top_fault(struct nvkm_top *, int fault);
enum nvkm_devidx nvkm_top_engine(struct nvkm_top *, int, int *runl, int *engn);
u32 nvkm_top_reset(struct nvkm_device *, enum nvkm_devidx);
u32 nvkm_top_intr(struct nvkm_device *, u32 intr, u64 *subdevs);
enum nvkm_devidx nvkm_top_fault(struct nvkm_device *, int fault);
enum nvkm_devidx nvkm_top_engine(struct nvkm_device *, int, int *runl, int *engn);
int gk104_top_new(struct nvkm_device *, int, struct nvkm_top **);
#endif

5
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
View File

@ -329,7 +329,7 @@ gk104_fifo_intr_fault(struct gk104_fifo *fifo, int unit)
}
if (eu == NULL) {
enum nvkm_devidx engidx = nvkm_top_fault(device->top, unit);
enum nvkm_devidx engidx = nvkm_top_fault(device, unit);
if (engidx < NVKM_SUBDEV_NR) {
const char *src = nvkm_subdev_name[engidx];
char *dst = en;
@ -589,7 +589,6 @@ gk104_fifo_oneinit(struct nvkm_fifo *base)
struct gk104_fifo *fifo = gk104_fifo(base);
struct nvkm_subdev *subdev = &fifo->base.engine.subdev;
struct nvkm_device *device = subdev->device;
struct nvkm_top *top = device->top;
int engn, runl, pbid, ret, i, j;
enum nvkm_devidx engidx;
u32 *map;
@ -608,7 +607,7 @@ gk104_fifo_oneinit(struct nvkm_fifo *base)
/* Determine runlist configuration from topology device info. */
i = 0;
while ((int)(engidx = nvkm_top_engine(top, i++, &runl, &engn)) >= 0) {
while ((int)(engidx = nvkm_top_engine(device, i++, &runl, &engn)) >= 0) {
/* Determine which PBDMA handles requests for this engine. */
for (j = 0, pbid = -1; j < fifo->pbdma_nr; j++) {
if (map[j] & (1 << runl)) {

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c
View File

@ -63,7 +63,7 @@ nvkm_mc_intr(struct nvkm_mc *mc, bool *handled)
u32 stat, intr = nvkm_mc_intr_mask(mc);
u64 subdevs;
stat = nvkm_top_intr(device->top, intr, &subdevs);
stat = nvkm_top_intr(device, intr, &subdevs);
while (subdevs) {
enum nvkm_devidx subidx = __ffs64(subdevs);
subdev = nvkm_device_subdev(device, subidx);
@ -94,7 +94,7 @@ nvkm_mc_reset_(struct nvkm_mc *mc, enum nvkm_devidx devidx)
const struct nvkm_mc_map *map;
u64 pmc_enable;
if (!(pmc_enable = nvkm_top_reset(device->top, devidx))) {
if (!(pmc_enable = nvkm_top_reset(device, devidx))) {
for (map = mc->func->reset; map && map->stat; map++) {
if (map->unit == devidx) {
pmc_enable = map->stat;

12
drivers/gpu/drm/nouveau/nvkm/subdev/top/base.c
View File

@ -41,8 +41,9 @@ nvkm_top_device_new(struct nvkm_top *top)
}
u32
nvkm_top_reset(struct nvkm_top *top, enum nvkm_devidx index)
nvkm_top_reset(struct nvkm_device *device, enum nvkm_devidx index)
{
struct nvkm_top *top = device->top;
struct nvkm_top_device *info;
if (top) {
@ -56,8 +57,9 @@ nvkm_top_reset(struct nvkm_top *top, enum nvkm_devidx index)
}
u32
nvkm_top_intr(struct nvkm_top *top, u32 intr, u64 *psubdevs)
nvkm_top_intr(struct nvkm_device *device, u32 intr, u64 *psubdevs)
{
struct nvkm_top *top = device->top;
struct nvkm_top_device *info;
u64 subdevs = 0;
u32 handled = 0;
@ -78,8 +80,9 @@ nvkm_top_intr(struct nvkm_top *top, u32 intr, u64 *psubdevs)
}
enum nvkm_devidx
nvkm_top_fault(struct nvkm_top *top, int fault)
nvkm_top_fault(struct nvkm_device *device, int fault)
{
struct nvkm_top *top = device->top;
struct nvkm_top_device *info;
list_for_each_entry(info, &top->device, head) {
@ -91,8 +94,9 @@ nvkm_top_fault(struct nvkm_top *top, int fault)
}
enum nvkm_devidx
nvkm_top_engine(struct nvkm_top *top, int index, int *runl, int *engn)
nvkm_top_engine(struct nvkm_device *device, int index, int *runl, int *engn)
{
struct nvkm_top *top = device->top;
struct nvkm_top_device *info;
int n = 0;