mirror of https://gitee.com/openkylin/linux.git
V4L/DVB (10953): cx25840: Fix CodingStyle errors introduced by the last patch
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Mauro Carvalho Chehab
parent
149783b581
commit
95b14fb23b
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@ -45,12 +45,11 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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}
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1006040f);
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1006040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x01bb39ee);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x01bb39ee);
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}
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if (state->is_cx25836)
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@ -70,7 +69,6 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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}
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1009040f);
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@ -95,12 +93,11 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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}
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x100a040f);
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x100a040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x0098d6e5);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x0098d6e5);
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}
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if (state->is_cx25836)
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@ -122,12 +119,11 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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}
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1e08040f);
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1e08040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x012a0869);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x012a0869);
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}
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if (state->is_cx25836)
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@ -154,12 +150,11 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
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if (!state->is_cx231xx) {
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1809040f);
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/* VID_PLL and AUX_PLL */
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cx25840_write4(client, 0x108, 0x1809040f);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x00ec6bd6);
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/* AUX_PLL_FRAC */
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cx25840_write4(client, 0x110, 0x00ec6bd6);
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}
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if (state->is_cx25836)
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@ -247,10 +242,9 @@ void cx25840_audio_set_path(struct i2c_client *client)
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/* deassert soft reset */
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cx25840_and_or(client, 0x810, ~0x1, 0x00);
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if (state->is_cx23885 || state->is_cx231xx) {
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/* Ensure the controller is running when we exit */
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/* Ensure the controller is running when we exit */
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if (state->is_cx23885 || state->is_cx231xx)
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cx25840_and_or(client, 0x803, ~0x10, 0x10);
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}
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}
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static int get_volume(struct i2c_client *client)
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@ -374,15 +374,12 @@ static void cx231xx_initialize(struct i2c_client *client)
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/* DIF Src phase inc */
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cx25840_write4(client, 0x340, 0x0df7df83);
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/* Luma */
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cx25840_write4(client, 0x414, 0x00107d12);
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/* Chroma */
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cx25840_write4(client, 0x420, 0x3d008282);
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/* ADC2 input select */
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cx25840_write(client, 0x102, 0x10);
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@ -395,7 +392,6 @@ static void cx231xx_initialize(struct i2c_client *client)
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/* White crush, Chroma AGC & Chroma Killer enabled */
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cx25840_write(client, 0x401, 0xe8);
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/* Do the firmware load in a work handler to prevent.
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Otherwise the kernel is blocked waiting for the
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bit-banging i2c interface to finish uploading the
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@ -489,42 +485,42 @@ void cx25840_std_setup(struct i2c_client *client)
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}
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/* DEBUG: Displays configured PLL frequency */
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if (!state->is_cx231xx) {
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pll_int = cx25840_read(client, 0x108);
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pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
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pll_post = cx25840_read(client, 0x109);
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v4l_dbg(1, cx25840_debug, client,
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"PLL regs = int: %u, frac: %u, post: %u\n",
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pll_int, pll_frac, pll_post);
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if (pll_post) {
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int fin, fsc;
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int pll = (28636363L * ((((u64)pll_int) << 25L) + pll_frac)) >> 25L;
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pll /= pll_post;
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v4l_dbg(1, cx25840_debug, client, "PLL = %d.%06d MHz\n",
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pll / 1000000, pll % 1000000);
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v4l_dbg(1, cx25840_debug, client, "PLL/8 = %d.%06d MHz\n",
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pll / 8000000, (pll / 8) % 1000000);
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fin = ((u64)src_decimation * pll) >> 12;
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if (!state->is_cx231xx) {
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pll_int = cx25840_read(client, 0x108);
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pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
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pll_post = cx25840_read(client, 0x109);
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v4l_dbg(1, cx25840_debug, client,
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"ADC Sampling freq = %d.%06d MHz\n",
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fin / 1000000, fin % 1000000);
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"PLL regs = int: %u, frac: %u, post: %u\n",
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pll_int, pll_frac, pll_post);
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fsc = (((u64)sc) * pll) >> 24L;
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v4l_dbg(1, cx25840_debug, client,
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"Chroma sub-carrier freq = %d.%06d MHz\n",
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fsc / 1000000, fsc % 1000000);
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if (pll_post) {
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int fin, fsc;
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int pll = (28636363L * ((((u64)pll_int) << 25L) + pll_frac)) >> 25L;
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v4l_dbg(1, cx25840_debug, client, "hblank %i, hactive %i, "
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"vblank %i, vactive %i, vblank656 %i, src_dec %i, "
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"burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x, "
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"sc 0x%06x\n",
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hblank, hactive, vblank, vactive, vblank656,
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src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
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pll /= pll_post;
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v4l_dbg(1, cx25840_debug, client, "PLL = %d.%06d MHz\n",
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pll / 1000000, pll % 1000000);
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v4l_dbg(1, cx25840_debug, client, "PLL/8 = %d.%06d MHz\n",
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pll / 8000000, (pll / 8) % 1000000);
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fin = ((u64)src_decimation * pll) >> 12;
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v4l_dbg(1, cx25840_debug, client,
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"ADC Sampling freq = %d.%06d MHz\n",
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fin / 1000000, fin % 1000000);
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fsc = (((u64)sc) * pll) >> 24L;
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v4l_dbg(1, cx25840_debug, client,
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"Chroma sub-carrier freq = %d.%06d MHz\n",
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fsc / 1000000, fsc % 1000000);
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v4l_dbg(1, cx25840_debug, client, "hblank %i, hactive %i, "
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"vblank %i, vactive %i, vblank656 %i, src_dec %i, "
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"burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x, "
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"sc 0x%06x\n",
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hblank, hactive, vblank, vactive, vblank656,
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src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
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}
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}
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}
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/* Sets horizontal blanking delay and active lines */
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cx25840_write(client, 0x470, hblank);
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@ -809,7 +805,7 @@ static int set_v4lstd(struct i2c_client *client)
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static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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{
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struct cx25840_state *state = to_state(sd);
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struct cx25840_state *state = to_state(sd);
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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switch (ctrl->id) {
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@ -876,7 +872,7 @@ static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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static int cx25840_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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{
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struct cx25840_state *state = to_state(sd);
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struct cx25840_state *state = to_state(sd);
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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switch (ctrl->id) {
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@ -1208,7 +1204,7 @@ static int cx25840_init(struct v4l2_subdev *sd, u32 val)
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cx25836_initialize(client);
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else if (state->is_cx23885)
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cx23885_initialize(client);
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else if (state->is_cx231xx)
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else if (state->is_cx231xx)
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cx231xx_initialize(client);
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else
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cx25840_initialize(client);
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@ -1567,7 +1563,7 @@ static int cx25840_probe(struct i2c_client *client,
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state->c = client;
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state->is_cx25836 = ((device_id & 0xff00) == 0x8300);
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state->is_cx23885 = (device_id == 0x0000) || (device_id == 0x1313);
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state->is_cx231xx = (device_id == 0x5A3E);
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state->is_cx231xx = (device_id == 0x5a3e);
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state->vid_input = CX25840_COMPOSITE7;
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state->aud_input = CX25840_AUDIO8;
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state->audclk_freq = 48000;
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@ -97,17 +97,17 @@ int cx25840_loadfw(struct i2c_client *client)
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u8 buffer[FWSEND];
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const u8 *ptr;
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int size, retval;
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int MAX_BUF_SIZE = FWSEND;
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int MAX_BUF_SIZE = FWSEND;
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if (state->is_cx23885)
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firmware = FWFILE_CX23885;
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else if ( state->is_cx231xx)
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firmware = FWFILE_CX231XX;
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else if (state->is_cx231xx)
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firmware = FWFILE_CX231XX;
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if( (state->is_cx231xx) && MAX_BUF_SIZE > 16) {
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printk(" Firmware download size changed to 16 bytes max length\n");
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MAX_BUF_SIZE = 16; /* cx231xx cannot accept more than 16 bytes at a time */
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}
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if ((state->is_cx231xx) && MAX_BUF_SIZE > 16) {
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v4l_err(client, " Firmware download size changed to 16 bytes max length\n");
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MAX_BUF_SIZE = 16; /* cx231xx cannot accept more than 16 bytes at a time */
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}
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if (request_firmware(&fw, firmware, FWDEV(client)) != 0) {
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v4l_err(client, "unable to open firmware %s\n", firmware);
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