mirror of https://gitee.com/openkylin/linux.git
iMX51: introduce IMX_GPIO_NR
Currently, to define a GPIO number, we're using something like : #define EFIKAMX_PCBID0 (2*32 + 16) to define GPIO 3 16. This is not really readable and it's error prone imho (note the 3 vs 2). So, I'm introducing a new macro to define this in a better way. Now, the code sample become : #define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16) v2: - move to gpio.h - add parens & spaces - switch to IMX_GPIO_NR instead of MX51_GPIO_NR Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Cc: Amit Kucheria <amit.kucheria@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -40,11 +40,11 @@
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#include "devices-imx51.h"
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#include "devices.h"
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#define CPUIMX51_USBH1_STP (0*32 + 27)
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#define CPUIMX51_QUARTA_GPIO (2*32 + 28)
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#define CPUIMX51_QUARTB_GPIO (2*32 + 25)
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#define CPUIMX51_QUARTC_GPIO (2*32 + 26)
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#define CPUIMX51_QUARTD_GPIO (2*32 + 27)
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#define CPUIMX51_USBH1_STP IMX_GPIO_NR(1, 27)
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#define CPUIMX51_QUARTA_GPIO IMX_GPIO_NR(3, 28)
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#define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25)
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#define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26)
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#define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27)
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#define CPUIMX51_QUARTA_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTA_GPIO)
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#define CPUIMX51_QUARTB_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTB_GPIO)
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#define CPUIMX51_QUARTC_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTC_GPIO)
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@ -43,19 +43,19 @@
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#include "devices-imx51.h"
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#include "devices.h"
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#define USBH1_RST (1*32 + 28)
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#define ETH_RST (1*32 + 31)
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#define TSC2007_IRQGPIO (2*32 + 12)
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#define CAN_IRQGPIO (0*32 + 1)
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#define CAN_RST (3*32 + 15)
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#define CAN_NCS (3*32 + 24)
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#define CAN_RXOBF (0*32 + 4)
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#define CAN_RX1BF (0*32 + 6)
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#define CAN_TXORTS (0*32 + 7)
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#define CAN_TX1RTS (0*32 + 8)
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#define CAN_TX2RTS (0*32 + 9)
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#define I2C_SCL (3*32 + 16)
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#define I2C_SDA (3*32 + 17)
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#define USBH1_RST IMX_GPIO_NR(2, 28)
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#define ETH_RST IMX_GPIO_NR(2, 31)
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#define TSC2007_IRQGPIO IMX_GPIO_NR(3, 12)
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#define CAN_IRQGPIO IMX_GPIO_NR(1, 1)
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#define CAN_RST IMX_GPIO_NR(4, 15)
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#define CAN_NCS IMX_GPIO_NR(4, 24)
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#define CAN_RXOBF IMX_GPIO_NR(1, 4)
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#define CAN_RX1BF IMX_GPIO_NR(1, 6)
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#define CAN_TXORTS IMX_GPIO_NR(1, 7)
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#define CAN_TX1RTS IMX_GPIO_NR(1, 8)
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#define CAN_TX2RTS IMX_GPIO_NR(1, 9)
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#define I2C_SCL IMX_GPIO_NR(4, 16)
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#define I2C_SDA IMX_GPIO_NR(4, 17)
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/* USB_CTRL_1 */
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#define MX51_USB_CTRL_1_OFFSET 0x10
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@ -243,7 +243,7 @@ static struct spi_board_info cpuimx51sd_spi_device[] = {
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.mode = SPI_MODE_0,
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.chip_select = 0,
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.platform_data = &mcp251x_info,
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.irq = gpio_to_irq(0 * 32 + 1)
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.irq = gpio_to_irq(CAN_IRQGPIO)
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},
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};
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@ -38,13 +38,13 @@
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#include "devices.h"
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#include "cpu_op-mx51.h"
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#define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */
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#define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */
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#define BABBAGE_PHY_RESET (1*32 + 5) /* GPIO_2_5 */
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#define BABBAGE_FEC_PHY_RESET (1*32 + 14) /* GPIO_2_14 */
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#define BABBAGE_POWER_KEY (1*32 + 21) /* GPIO_2_21 */
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#define BABBAGE_ECSPI1_CS0 (3*32 + 24) /* GPIO_4_24 */
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#define BABBAGE_ECSPI1_CS1 (3*32 + 25) /* GPIO_4_25 */
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#define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7)
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#define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27)
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#define BABBAGE_PHY_RESET IMX_GPIO_NR(2, 5)
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#define BABBAGE_FEC_PHY_RESET IMX_GPIO_NR(2, 14)
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#define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21)
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#define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24)
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#define BABBAGE_ECSPI1_CS1 IMX_GPIO_NR(4, 25)
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/* USB_CTRL_1 */
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#define MX51_USB_CTRL_1_OFFSET 0x10
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@ -43,22 +43,22 @@
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#define MX51_USB_PLL_DIV_24_MHZ 0x01
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#define EFIKAMX_PCBID0 (2*32 + 16)
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#define EFIKAMX_PCBID1 (2*32 + 17)
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#define EFIKAMX_PCBID2 (2*32 + 11)
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#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16)
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#define EFIKAMX_PCBID1 IMX_GPIO_NR(3, 17)
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#define EFIKAMX_PCBID2 IMX_GPIO_NR(3, 11)
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#define EFIKAMX_BLUE_LED (2*32 + 13)
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#define EFIKAMX_GREEN_LED (2*32 + 14)
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#define EFIKAMX_RED_LED (2*32 + 15)
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#define EFIKAMX_BLUE_LED IMX_GPIO_NR(3, 13)
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#define EFIKAMX_GREEN_LED IMX_GPIO_NR(3, 14)
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#define EFIKAMX_RED_LED IMX_GPIO_NR(3, 15)
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#define EFIKAMX_POWER_KEY (1*32 + 31)
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#define EFIKAMX_POWER_KEY IMX_GPIO_NR(2, 31)
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#define EFIKAMX_SPI_CS0 (3*32 + 24)
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#define EFIKAMX_SPI_CS1 (3*32 + 25)
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#define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24)
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#define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25)
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/* board 1.1 doesn't have same reset gpio */
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#define EFIKAMX_RESET1_1 (2*32 + 2)
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#define EFIKAMX_RESET (0*32 + 4)
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#define EFIKAMX_RESET1_1 IMX_GPIO_NR(3, 2)
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#define EFIKAMX_RESET IMX_GPIO_NR(1, 4)
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/* the pci ids pin have pull up. they're driven low according to board id */
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#define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
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@ -33,12 +33,12 @@
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#include "devices-imx51.h"
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#include "devices.h"
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#define MBIMX51_TSC2007_GPIO (2*32 + 30)
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#define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30)
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#define MBIMX51_TSC2007_IRQ (MXC_INTERNAL_IRQS + MBIMX51_TSC2007_GPIO)
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#define MBIMX51_LED0 (2*32 + 5)
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#define MBIMX51_LED1 (2*32 + 6)
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#define MBIMX51_LED2 (2*32 + 7)
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#define MBIMX51_LED3 (2*32 + 8)
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#define MBIMX51_LED0 IMX_GPIO_NR(3, 5)
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#define MBIMX51_LED1 IMX_GPIO_NR(3, 6)
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#define MBIMX51_LED2 IMX_GPIO_NR(3, 7)
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#define MBIMX51_LED3 IMX_GPIO_NR(3, 8)
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static struct gpio_led mbimx51_leds[] = {
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{
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@ -70,8 +70,8 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
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MX51_PAD_SD1_DATA3__SD1_DATA3,
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};
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#define GPIO_LED1 (2 * 32 + 30)
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#define GPIO_SWITCH1 (2 * 32 + 31)
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#define GPIO_LED1 IMX_GPIO_NR(3, 30)
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#define GPIO_SWITCH1 IMX_GPIO_NR(3, 31)
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static struct gpio_led eukrea_mbimxsd_leds[] = {
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{
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@ -23,6 +23,11 @@
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#include <mach/hardware.h>
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#include <asm-generic/gpio.h>
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/* There's a off-by-one betweem the gpio bank number and the gpiochip */
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/* range e.g. GPIO_1_5 is gpio 5 under linux */
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#define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr))
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/* use gpiolib dispatchers */
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#define gpio_get_value __gpio_get_value
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#define gpio_set_value __gpio_set_value
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