mirror of https://gitee.com/openkylin/linux.git
clk: samsung: Add enable/disable support for PLL35XX clocks
Some PLLs might be disabled by default after turning off and then on a power domain which they belongs to. To avoid configuring a disabled PLL, add proper code for handling PLL enable/disable. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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@ -136,11 +136,39 @@ static const struct clk_ops samsung_pll3000_clk_ops = {
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#define PLL35XX_MDIV_MASK (0x3FF)
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#define PLL35XX_PDIV_MASK (0x3F)
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#define PLL35XX_SDIV_MASK (0x7)
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#define PLL35XX_LOCK_STAT_MASK (0x1)
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#define PLL35XX_MDIV_SHIFT (16)
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#define PLL35XX_PDIV_SHIFT (8)
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#define PLL35XX_SDIV_SHIFT (0)
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#define PLL35XX_LOCK_STAT_SHIFT (29)
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#define PLL35XX_ENABLE_SHIFT (31)
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static int samsung_pll35xx_enable(struct clk_hw *hw)
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{
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struct samsung_clk_pll *pll = to_clk_pll(hw);
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u32 tmp;
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tmp = readl_relaxed(pll->con_reg);
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tmp |= BIT(PLL35XX_ENABLE_SHIFT);
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writel_relaxed(tmp, pll->con_reg);
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/* wait_lock_time */
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do {
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cpu_relax();
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tmp = readl_relaxed(pll->con_reg);
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} while (!(tmp & BIT(PLL35XX_LOCK_STAT_SHIFT)));
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return 0;
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}
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static void samsung_pll35xx_disable(struct clk_hw *hw)
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{
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struct samsung_clk_pll *pll = to_clk_pll(hw);
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u32 tmp;
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tmp = readl_relaxed(pll->con_reg);
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tmp &= ~BIT(PLL35XX_ENABLE_SHIFT);
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writel_relaxed(tmp, pll->con_reg);
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}
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static unsigned long samsung_pll35xx_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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@ -210,12 +238,13 @@ static int samsung_pll35xx_set_rate(struct clk_hw *hw, unsigned long drate,
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(rate->sdiv << PLL35XX_SDIV_SHIFT);
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writel_relaxed(tmp, pll->con_reg);
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/* wait_lock_time */
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/* wait_lock_time if enabled */
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if (tmp & BIT(PLL35XX_ENABLE_SHIFT)) {
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do {
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cpu_relax();
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tmp = readl_relaxed(pll->con_reg);
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} while (!(tmp & (PLL35XX_LOCK_STAT_MASK
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<< PLL35XX_LOCK_STAT_SHIFT)));
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} while (!(tmp & BIT(PLL35XX_LOCK_STAT_SHIFT)));
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}
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return 0;
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}
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@ -223,6 +252,8 @@ static const struct clk_ops samsung_pll35xx_clk_ops = {
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.recalc_rate = samsung_pll35xx_recalc_rate,
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.round_rate = samsung_pll_round_rate,
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.set_rate = samsung_pll35xx_set_rate,
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.enable = samsung_pll35xx_enable,
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.disable = samsung_pll35xx_disable,
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};
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static const struct clk_ops samsung_pll35xx_clk_min_ops = {
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