mirror of https://gitee.com/openkylin/linux.git
drm/i915: Parametrize DDI_BUF_TRANS registers
FIXME: Should there be a WARN(i != 9) or something, or what does the entry 9 comment mean? Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -7197,7 +7197,8 @@ enum skl_disp_power_wells {
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/* DDI Buffer Translations */
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/* DDI Buffer Translations */
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#define DDI_BUF_TRANS_A 0x64E00
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#define DDI_BUF_TRANS_A 0x64E00
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#define DDI_BUF_TRANS_B 0x64E60
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#define DDI_BUF_TRANS_B 0x64E60
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#define DDI_BUF_TRANS(port) _PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B)
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#define DDI_BUF_TRANS_LO(port, i) (_PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B) + (i) * 8)
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#define DDI_BUF_TRANS_HI(port, i) (_PORT(port, DDI_BUF_TRANS_A, DDI_BUF_TRANS_B) + (i) * 8 + 4)
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/* Sideband Interface (SBI) is programmed indirectly, via
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/* Sideband Interface (SBI) is programmed indirectly, via
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* SBI_ADDR, which contains the register offset; and SBI_DATA,
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* SBI_ADDR, which contains the register offset; and SBI_DATA,
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@ -414,7 +414,6 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
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bool supports_hdmi)
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bool supports_hdmi)
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{
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 reg;
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u32 iboost_bit = 0;
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u32 iboost_bit = 0;
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int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry,
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int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry,
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size;
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size;
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@ -505,11 +504,11 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
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BUG();
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BUG();
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}
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}
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for (i = 0, reg = DDI_BUF_TRANS(port); i < size; i++) {
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for (i = 0; i < size; i++) {
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I915_WRITE(reg, ddi_translations[i].trans1 | iboost_bit);
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I915_WRITE(DDI_BUF_TRANS_LO(port, i),
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reg += 4;
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ddi_translations[i].trans1 | iboost_bit);
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I915_WRITE(reg, ddi_translations[i].trans2);
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I915_WRITE(DDI_BUF_TRANS_HI(port, i),
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reg += 4;
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ddi_translations[i].trans2);
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}
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}
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if (!supports_hdmi)
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if (!supports_hdmi)
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@ -521,10 +520,10 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
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hdmi_level = hdmi_default_entry;
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hdmi_level = hdmi_default_entry;
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/* Entry 9 is for HDMI: */
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/* Entry 9 is for HDMI: */
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I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
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I915_WRITE(DDI_BUF_TRANS_LO(port, i),
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reg += 4;
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ddi_translations_hdmi[hdmi_level].trans1 | iboost_bit);
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I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans2);
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I915_WRITE(DDI_BUF_TRANS_HI(port, i),
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reg += 4;
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ddi_translations_hdmi[hdmi_level].trans2);
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}
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}
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/* Program DDI buffers translations for DP. By default, program ports A-D in DP
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/* Program DDI buffers translations for DP. By default, program ports A-D in DP
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