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ARM64: dts: meson: bump mali450 clk to 744MHz 

The Mali-450 IP can run up to 744MHz, bump the frequency using
the GP0 PLL clock.

Cc: Michal Lazo <michal.lazo@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Neil Armstrong 2018-03-12 12:10:21 +01:00 committed by Kevin Hilman
parent 6878231f25
commit 97ac009309
2 changed files with 14 additions and 8 deletions
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11
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
View File

@ -247,14 +247,17 @@ mali: gpu@c0000 {
* MALI_0 and MALI_1 muxed to a single clock by a glitch
* free mux to safely change frequency while running.
*/
assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
assigned-clocks = <&clkc CLKID_GP0_PLL>,
<&clkc CLKID_MALI_0_SEL>,
<&clkc CLKID_MALI_0>,
<&clkc CLKID_MALI>; /* Glitch free mux */
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
assigned-clock-parents = <0>, /* Do Nothing */
<&clkc CLKID_GP0_PLL>,
<0>, /* Do Nothing */
<&clkc CLKID_MALI_0>;
assigned-clock-rates = <0>, /* Do Nothing */
<666666666>,
assigned-clock-rates = <744000000>,
<0>, /* Do Nothing */
<744000000>,
<0>; /* Do Nothing */
};
};

11
arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
View File

@ -29,14 +29,17 @@ mali: gpu@c0000 {
* MALI_0 and MALI_1 muxed to a single clock by a glitch
* free mux to safely change frequency while running.
*/
assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
assigned-clocks = <&clkc CLKID_GP0_PLL>,
<&clkc CLKID_MALI_0_SEL>,
<&clkc CLKID_MALI_0>,
<&clkc CLKID_MALI>; /* Glitch free mux */
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
assigned-clock-parents = <0>, /* Do Nothing */
<&clkc CLKID_GP0_PLL>,
<0>, /* Do Nothing */
<&clkc CLKID_MALI_0>;
assigned-clock-rates = <0>, /* Do Nothing */
<666666666>,
assigned-clock-rates = <744000000>,
<0>, /* Do Nothing */
<744000000>,
<0>; /* Do Nothing */
};
};