mirror of https://gitee.com/openkylin/linux.git
dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
Macro to select a clock was not correct. Offset of enable register starts at 0x30, then calculation to select a bit is: (@enable_reg - 0x30) / 4 * 32 + bit_to_select Tested-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
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@ -25,7 +25,7 @@
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#define STM32F4_RCC_AHB1_OTGHS 29
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#define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
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#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit + (0x30 * 8))
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#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit)
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/* AHB2 */
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@ -36,13 +36,13 @@
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#define STM32F4_RCC_AHB2_OTGFS 7
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#define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8))
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#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + (0x34 * 8))
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#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20)
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/* AHB3 */
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#define STM32F4_RCC_AHB3_FMC 0
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#define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8))
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#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + (0x38 * 8))
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#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40)
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/* APB1 */
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#define STM32F4_RCC_APB1_TIM2 0
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@ -72,7 +72,7 @@
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#define STM32F4_RCC_APB1_UART8 31
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#define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8))
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#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + (0x40 * 8))
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#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80)
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/* APB2 */
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#define STM32F4_RCC_APB2_TIM1 0
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@ -93,6 +93,6 @@
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#define STM32F4_RCC_APB2_LTDC 26
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#define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8))
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#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + (0x44 * 8))
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#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0)
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#endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */
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