mirror of https://gitee.com/openkylin/linux.git
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf
Daniel Borkmann says: ==================== pull-request: bpf 2019-05-06 The following pull-request contains BPF updates for your *net* tree. The main changes are: 1) Two x32 JIT fixes: one which has buggy signed comparisons in 64 bit conditional jumps and another one for 64 bit negation, both from Wang. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
982e826d31
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@ -117,6 +117,8 @@ static bool is_simm32(s64 value)
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#define IA32_JLE 0x7E
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#define IA32_JG 0x7F
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#define COND_JMP_OPCODE_INVALID (0xFF)
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/*
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* Map eBPF registers to IA32 32bit registers or stack scratch space.
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*
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@ -698,19 +700,12 @@ static inline void emit_ia32_neg64(const u8 dst[], bool dstk, u8 **pprog)
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STACK_VAR(dst_hi));
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}
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/* xor ecx,ecx */
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EMIT2(0x31, add_2reg(0xC0, IA32_ECX, IA32_ECX));
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/* sub dreg_lo,ecx */
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EMIT2(0x2B, add_2reg(0xC0, dreg_lo, IA32_ECX));
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/* mov dreg_lo,ecx */
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EMIT2(0x89, add_2reg(0xC0, dreg_lo, IA32_ECX));
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/* xor ecx,ecx */
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EMIT2(0x31, add_2reg(0xC0, IA32_ECX, IA32_ECX));
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/* sbb dreg_hi,ecx */
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EMIT2(0x19, add_2reg(0xC0, dreg_hi, IA32_ECX));
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/* mov dreg_hi,ecx */
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EMIT2(0x89, add_2reg(0xC0, dreg_hi, IA32_ECX));
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/* neg dreg_lo */
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EMIT2(0xF7, add_1reg(0xD8, dreg_lo));
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/* adc dreg_hi,0x0 */
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EMIT3(0x83, add_1reg(0xD0, dreg_hi), 0x00);
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/* neg dreg_hi */
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EMIT2(0xF7, add_1reg(0xD8, dreg_hi));
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if (dstk) {
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/* mov dword ptr [ebp+off],dreg_lo */
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@ -1613,6 +1608,75 @@ static inline void emit_push_r64(const u8 src[], u8 **pprog)
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*pprog = prog;
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}
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static u8 get_cond_jmp_opcode(const u8 op, bool is_cmp_lo)
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{
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u8 jmp_cond;
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/* Convert BPF opcode to x86 */
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switch (op) {
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case BPF_JEQ:
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jmp_cond = IA32_JE;
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break;
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case BPF_JSET:
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case BPF_JNE:
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jmp_cond = IA32_JNE;
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break;
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case BPF_JGT:
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/* GT is unsigned '>', JA in x86 */
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jmp_cond = IA32_JA;
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break;
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case BPF_JLT:
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/* LT is unsigned '<', JB in x86 */
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jmp_cond = IA32_JB;
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break;
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case BPF_JGE:
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/* GE is unsigned '>=', JAE in x86 */
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jmp_cond = IA32_JAE;
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break;
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case BPF_JLE:
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/* LE is unsigned '<=', JBE in x86 */
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jmp_cond = IA32_JBE;
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break;
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case BPF_JSGT:
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if (!is_cmp_lo)
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/* Signed '>', GT in x86 */
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jmp_cond = IA32_JG;
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else
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/* GT is unsigned '>', JA in x86 */
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jmp_cond = IA32_JA;
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break;
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case BPF_JSLT:
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if (!is_cmp_lo)
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/* Signed '<', LT in x86 */
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jmp_cond = IA32_JL;
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else
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/* LT is unsigned '<', JB in x86 */
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jmp_cond = IA32_JB;
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break;
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case BPF_JSGE:
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if (!is_cmp_lo)
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/* Signed '>=', GE in x86 */
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jmp_cond = IA32_JGE;
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else
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/* GE is unsigned '>=', JAE in x86 */
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jmp_cond = IA32_JAE;
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break;
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case BPF_JSLE:
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if (!is_cmp_lo)
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/* Signed '<=', LE in x86 */
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jmp_cond = IA32_JLE;
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else
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/* LE is unsigned '<=', JBE in x86 */
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jmp_cond = IA32_JBE;
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break;
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default: /* to silence GCC warning */
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jmp_cond = COND_JMP_OPCODE_INVALID;
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break;
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}
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return jmp_cond;
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}
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static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
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int oldproglen, struct jit_context *ctx)
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{
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@ -2069,10 +2133,6 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
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case BPF_JMP | BPF_JLT | BPF_X:
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case BPF_JMP | BPF_JGE | BPF_X:
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case BPF_JMP | BPF_JLE | BPF_X:
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case BPF_JMP | BPF_JSGT | BPF_X:
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case BPF_JMP | BPF_JSLE | BPF_X:
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case BPF_JMP | BPF_JSLT | BPF_X:
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case BPF_JMP | BPF_JSGE | BPF_X:
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case BPF_JMP32 | BPF_JEQ | BPF_X:
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case BPF_JMP32 | BPF_JNE | BPF_X:
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case BPF_JMP32 | BPF_JGT | BPF_X:
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@ -2118,6 +2178,40 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
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EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));
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goto emit_cond_jmp;
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}
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case BPF_JMP | BPF_JSGT | BPF_X:
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case BPF_JMP | BPF_JSLE | BPF_X:
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case BPF_JMP | BPF_JSLT | BPF_X:
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case BPF_JMP | BPF_JSGE | BPF_X: {
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u8 dreg_lo = dstk ? IA32_EAX : dst_lo;
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u8 dreg_hi = dstk ? IA32_EDX : dst_hi;
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u8 sreg_lo = sstk ? IA32_ECX : src_lo;
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u8 sreg_hi = sstk ? IA32_EBX : src_hi;
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if (dstk) {
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EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
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STACK_VAR(dst_lo));
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EMIT3(0x8B,
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add_2reg(0x40, IA32_EBP,
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IA32_EDX),
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STACK_VAR(dst_hi));
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}
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if (sstk) {
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EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),
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STACK_VAR(src_lo));
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EMIT3(0x8B,
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add_2reg(0x40, IA32_EBP,
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IA32_EBX),
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STACK_VAR(src_hi));
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}
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/* cmp dreg_hi,sreg_hi */
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EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));
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EMIT2(IA32_JNE, 10);
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/* cmp dreg_lo,sreg_lo */
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EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));
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goto emit_cond_jmp_signed;
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}
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case BPF_JMP | BPF_JSET | BPF_X:
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case BPF_JMP32 | BPF_JSET | BPF_X: {
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bool is_jmp64 = BPF_CLASS(insn->code) == BPF_JMP;
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@ -2194,10 +2288,6 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
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case BPF_JMP | BPF_JLT | BPF_K:
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case BPF_JMP | BPF_JGE | BPF_K:
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case BPF_JMP | BPF_JLE | BPF_K:
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case BPF_JMP | BPF_JSGT | BPF_K:
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case BPF_JMP | BPF_JSLE | BPF_K:
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case BPF_JMP | BPF_JSLT | BPF_K:
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case BPF_JMP | BPF_JSGE | BPF_K:
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case BPF_JMP32 | BPF_JEQ | BPF_K:
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case BPF_JMP32 | BPF_JNE | BPF_K:
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case BPF_JMP32 | BPF_JGT | BPF_K:
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@ -2238,50 +2328,9 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
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/* cmp dreg_lo,sreg_lo */
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EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));
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emit_cond_jmp: /* Convert BPF opcode to x86 */
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switch (BPF_OP(code)) {
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case BPF_JEQ:
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jmp_cond = IA32_JE;
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break;
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case BPF_JSET:
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case BPF_JNE:
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jmp_cond = IA32_JNE;
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break;
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case BPF_JGT:
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/* GT is unsigned '>', JA in x86 */
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jmp_cond = IA32_JA;
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break;
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case BPF_JLT:
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/* LT is unsigned '<', JB in x86 */
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jmp_cond = IA32_JB;
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break;
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case BPF_JGE:
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/* GE is unsigned '>=', JAE in x86 */
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jmp_cond = IA32_JAE;
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break;
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case BPF_JLE:
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/* LE is unsigned '<=', JBE in x86 */
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jmp_cond = IA32_JBE;
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break;
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case BPF_JSGT:
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/* Signed '>', GT in x86 */
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jmp_cond = IA32_JG;
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break;
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case BPF_JSLT:
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/* Signed '<', LT in x86 */
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jmp_cond = IA32_JL;
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break;
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case BPF_JSGE:
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/* Signed '>=', GE in x86 */
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jmp_cond = IA32_JGE;
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break;
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case BPF_JSLE:
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/* Signed '<=', LE in x86 */
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jmp_cond = IA32_JLE;
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break;
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default: /* to silence GCC warning */
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emit_cond_jmp: jmp_cond = get_cond_jmp_opcode(BPF_OP(code), false);
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if (jmp_cond == COND_JMP_OPCODE_INVALID)
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return -EFAULT;
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}
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jmp_offset = addrs[i + insn->off] - addrs[i];
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if (is_imm8(jmp_offset)) {
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EMIT2(jmp_cond, jmp_offset);
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@ -2291,7 +2340,66 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
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pr_err("cond_jmp gen bug %llx\n", jmp_offset);
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return -EFAULT;
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}
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break;
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}
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case BPF_JMP | BPF_JSGT | BPF_K:
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case BPF_JMP | BPF_JSLE | BPF_K:
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case BPF_JMP | BPF_JSLT | BPF_K:
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case BPF_JMP | BPF_JSGE | BPF_K: {
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u8 dreg_lo = dstk ? IA32_EAX : dst_lo;
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u8 dreg_hi = dstk ? IA32_EDX : dst_hi;
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u8 sreg_lo = IA32_ECX;
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u8 sreg_hi = IA32_EBX;
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u32 hi;
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if (dstk) {
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EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),
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STACK_VAR(dst_lo));
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EMIT3(0x8B,
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add_2reg(0x40, IA32_EBP,
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IA32_EDX),
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STACK_VAR(dst_hi));
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}
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/* mov ecx,imm32 */
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EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);
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hi = imm32 & (1 << 31) ? (u32)~0 : 0;
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/* mov ebx,imm32 */
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EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi);
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/* cmp dreg_hi,sreg_hi */
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EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));
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EMIT2(IA32_JNE, 10);
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/* cmp dreg_lo,sreg_lo */
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EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));
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/*
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* For simplicity of branch offset computation,
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* let's use fixed jump coding here.
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*/
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emit_cond_jmp_signed: /* Check the condition for low 32-bit comparison */
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jmp_cond = get_cond_jmp_opcode(BPF_OP(code), true);
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if (jmp_cond == COND_JMP_OPCODE_INVALID)
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return -EFAULT;
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jmp_offset = addrs[i + insn->off] - addrs[i] + 8;
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if (is_simm32(jmp_offset)) {
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EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
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} else {
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pr_err("cond_jmp gen bug %llx\n", jmp_offset);
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return -EFAULT;
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}
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EMIT2(0xEB, 6);
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/* Check the condition for high 32-bit comparison */
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jmp_cond = get_cond_jmp_opcode(BPF_OP(code), false);
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if (jmp_cond == COND_JMP_OPCODE_INVALID)
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return -EFAULT;
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jmp_offset = addrs[i + insn->off] - addrs[i];
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if (is_simm32(jmp_offset)) {
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EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
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} else {
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pr_err("cond_jmp gen bug %llx\n", jmp_offset);
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return -EFAULT;
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}
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break;
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}
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case BPF_JMP | BPF_JA:
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@ -86,3 +86,22 @@
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.result = ACCEPT,
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.retval = 2,
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},
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{
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"jit: jsgt, jslt",
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.insns = {
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BPF_LD_IMM64(BPF_REG_1, 0x80000000ULL),
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BPF_LD_IMM64(BPF_REG_2, 0x0ULL),
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BPF_JMP_REG(BPF_JSGT, BPF_REG_1, BPF_REG_2, 2),
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BPF_MOV64_IMM(BPF_REG_0, 1),
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BPF_EXIT_INSN(),
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BPF_JMP_REG(BPF_JSLT, BPF_REG_2, BPF_REG_1, 2),
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BPF_MOV64_IMM(BPF_REG_0, 1),
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BPF_EXIT_INSN(),
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BPF_MOV64_IMM(BPF_REG_0, 2),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 2,
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},
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