mirror of https://gitee.com/openkylin/linux.git
[SERIAL] amba-pl010: Remove accessor macros
Remove unnecessary accessor macros, using readb/writel directly instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
Russell King
parent
111c9bf8c5
commit
98639a67a9
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@ -62,26 +62,8 @@
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#define AMBA_ISR_PASS_LIMIT 256
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/*
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* Access macros for the AMBA UARTs
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*/
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#define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR)
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#define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR)
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#define UART_GET_FR(p) readb((p)->membase + UART01x_FR)
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#define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR)
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#define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR)
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#define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR)
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#define UART_GET_CR(p) readb((p)->membase + UART010_CR)
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#define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR)
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#define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL)
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#define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL)
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#define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM)
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#define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM)
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#define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH)
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#define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH)
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#define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
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#define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
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#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0)
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#define UART_DUMMY_RSR_RX /*256*/0
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#define UART_PORT_SIZE 64
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@ -110,36 +92,36 @@ static void pl010_stop_tx(struct uart_port *port)
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{
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unsigned int cr;
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cr = UART_GET_CR(port);
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cr = readb(port->membase + UART010_CR);
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cr &= ~UART010_CR_TIE;
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UART_PUT_CR(port, cr);
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writel(cr, port->membase + UART010_CR);
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}
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static void pl010_start_tx(struct uart_port *port)
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{
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unsigned int cr;
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cr = UART_GET_CR(port);
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cr = readb(port->membase + UART010_CR);
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cr |= UART010_CR_TIE;
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UART_PUT_CR(port, cr);
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writel(cr, port->membase + UART010_CR);
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}
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static void pl010_stop_rx(struct uart_port *port)
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{
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unsigned int cr;
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cr = UART_GET_CR(port);
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cr = readb(port->membase + UART010_CR);
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cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
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UART_PUT_CR(port, cr);
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writel(cr, port->membase + UART010_CR);
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}
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static void pl010_enable_ms(struct uart_port *port)
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{
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unsigned int cr;
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cr = UART_GET_CR(port);
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cr = readb(port->membase + UART010_CR);
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cr |= UART010_CR_MSIE;
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UART_PUT_CR(port, cr);
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writel(cr, port->membase + UART010_CR);
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}
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static void
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@ -152,9 +134,9 @@ pl010_rx_chars(struct uart_port *port)
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struct tty_struct *tty = port->info->tty;
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unsigned int status, ch, flag, rsr, max_count = 256;
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status = UART_GET_FR(port);
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status = readb(port->membase + UART01x_FR);
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while (UART_RX_DATA(status) && max_count--) {
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ch = UART_GET_CHAR(port);
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ch = readb(port->membase + UART01x_DR);
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flag = TTY_NORMAL;
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port->icount.rx++;
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@ -163,7 +145,7 @@ pl010_rx_chars(struct uart_port *port)
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* Note that the error handling code is
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* out of the main execution path
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*/
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rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX;
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rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
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if (unlikely(rsr & UART01x_RSR_ANY)) {
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if (rsr & UART01x_RSR_BE) {
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rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
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@ -193,7 +175,7 @@ pl010_rx_chars(struct uart_port *port)
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uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);
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ignore_char:
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status = UART_GET_FR(port);
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status = readb(port->membase + UART01x_FR);
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}
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tty_flip_buffer_push(tty);
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return;
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@ -205,7 +187,7 @@ static void pl010_tx_chars(struct uart_port *port)
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int count;
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if (port->x_char) {
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UART_PUT_CHAR(port, port->x_char);
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writel(port->x_char, port->membase + UART01x_DR);
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port->icount.tx++;
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port->x_char = 0;
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return;
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@ -217,7 +199,7 @@ static void pl010_tx_chars(struct uart_port *port)
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count = port->fifosize >> 1;
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do {
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UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
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writel(xmit->buf[xmit->tail], port->membase + UART01x_DR);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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@ -236,9 +218,9 @@ static void pl010_modem_status(struct uart_port *port)
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int status, delta;
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UART_PUT_ICR(&uap->port, 0);
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writel(0, uap->port.membase + UART010_ICR);
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status = UART_GET_FR(&uap->port) & UART01x_FR_MODEM_ANY;
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status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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delta = status ^ uap->old_status;
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uap->old_status = status;
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@ -266,7 +248,7 @@ static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs)
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spin_lock(&port->lock);
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status = UART_GET_INT_STATUS(port);
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status = readb(port->membase + UART010_IIR);
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if (status) {
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do {
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if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
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@ -283,7 +265,7 @@ static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs)
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if (pass_counter-- == 0)
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break;
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status = UART_GET_INT_STATUS(port);
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status = readb(port->membase + UART010_IIR);
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} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
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UART010_IIR_TIS));
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handled = 1;
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@ -296,7 +278,7 @@ static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs)
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static unsigned int pl010_tx_empty(struct uart_port *port)
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{
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return UART_GET_FR(port) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
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return readb(port->membase + UART01x_FR) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
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}
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static unsigned int pl010_get_mctrl(struct uart_port *port)
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@ -304,7 +286,7 @@ static unsigned int pl010_get_mctrl(struct uart_port *port)
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unsigned int result = 0;
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unsigned int status;
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status = UART_GET_FR(port);
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status = readb(port->membase + UART01x_FR);
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if (status & UART01x_FR_DCD)
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result |= TIOCM_CAR;
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if (status & UART01x_FR_DSR)
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@ -340,12 +322,12 @@ static void pl010_break_ctl(struct uart_port *port, int break_state)
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unsigned int lcr_h;
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spin_lock_irqsave(&port->lock, flags);
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lcr_h = UART_GET_LCRH(port);
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lcr_h = readb(port->membase + UART010_LCRH);
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if (break_state == -1)
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lcr_h |= UART01x_LCRH_BRK;
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else
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lcr_h &= ~UART01x_LCRH_BRK;
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UART_PUT_LCRH(port, lcr_h);
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writel(lcr_h, port->membase + UART010_LCRH);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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@ -364,13 +346,13 @@ static int pl010_startup(struct uart_port *port)
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/*
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* initialise the old status of the modem signals
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*/
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uap->old_status = UART_GET_FR(port) & UART01x_FR_MODEM_ANY;
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uap->old_status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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/*
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* Finally, enable interrupts
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*/
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UART_PUT_CR(port, UART01x_CR_UARTEN | UART010_CR_RIE |
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UART010_CR_RTIE);
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writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
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port->membase + UART010_CR);
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return 0;
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}
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@ -385,11 +367,12 @@ static void pl010_shutdown(struct uart_port *port)
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/*
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* disable all interrupts, disable the port
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*/
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UART_PUT_CR(port, 0);
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writel(0, port->membase + UART010_CR);
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/* disable break condition and fifos */
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UART_PUT_LCRH(port, UART_GET_LCRH(port) &
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~(UART01x_LCRH_BRK | UART01x_LCRH_FEN));
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writel(readb(port->membase + UART010_LCRH) &
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~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
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port->membase + UART010_LCRH);
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}
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static void
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@ -466,25 +449,25 @@ pl010_set_termios(struct uart_port *port, struct termios *termios,
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port->ignore_status_mask |= UART_DUMMY_RSR_RX;
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/* first, disable everything */
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old_cr = UART_GET_CR(port) & ~UART010_CR_MSIE;
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old_cr = readb(port->membase + UART010_CR) & ~UART010_CR_MSIE;
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if (UART_ENABLE_MS(port, termios->c_cflag))
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old_cr |= UART010_CR_MSIE;
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UART_PUT_CR(port, 0);
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writel(0, port->membase + UART010_CR);
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/* Set baud rate */
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quot -= 1;
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UART_PUT_LCRM(port, ((quot & 0xf00) >> 8));
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UART_PUT_LCRL(port, (quot & 0xff));
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writel((quot & 0xf00) >> 8, port->membase + UART010_LCRM);
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writel(quot & 0xff, port->membase + UART010_LCRL);
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/*
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* ----------v----------v----------v----------v-----
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* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
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* ----------^----------^----------^----------^-----
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*/
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UART_PUT_LCRH(port, lcr_h);
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UART_PUT_CR(port, old_cr);
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writel(lcr_h, port->membase + UART010_LCRH);
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writel(old_cr, port->membase + UART010_CR);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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@ -593,9 +576,13 @@ static struct uart_amba_port amba_ports[UART_NR] = {
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static void pl010_console_putchar(struct uart_port *port, int ch)
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{
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while (!UART_TX_READY(UART_GET_FR(port)))
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unsigned int status;
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do {
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status = readb(port->membase + UART01x_FR);
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barrier();
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UART_PUT_CHAR(port, ch);
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} while (!UART_TX_READY(status));
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writel(ch, port->membase + UART01x_DR);
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}
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static void
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@ -607,8 +594,8 @@ pl010_console_write(struct console *co, const char *s, unsigned int count)
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/*
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* First save the CR then disable the interrupts
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*/
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old_cr = UART_GET_CR(port);
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UART_PUT_CR(port, UART01x_CR_UARTEN);
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old_cr = readb(port->membase + UART010_CR);
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writel(UART01x_CR_UARTEN, port->membase + UART010_CR);
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uart_console_write(port, s, count, pl010_console_putchar);
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@ -617,18 +604,19 @@ pl010_console_write(struct console *co, const char *s, unsigned int count)
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* and restore the TCR
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*/
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do {
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status = UART_GET_FR(port);
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status = readb(port->membase + UART01x_FR);
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barrier();
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} while (status & UART01x_FR_BUSY);
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UART_PUT_CR(port, old_cr);
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writel(old_cr, port->membase + UART010_CR);
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}
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static void __init
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pl010_console_get_options(struct uart_port *port, int *baud,
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int *parity, int *bits)
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{
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if (UART_GET_CR(port) & UART01x_CR_UARTEN) {
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if (readb(port->membase + UART010_CR) & UART01x_CR_UARTEN) {
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unsigned int lcr_h, quot;
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lcr_h = UART_GET_LCRH(port);
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lcr_h = readb(port->membase + UART010_LCRH);
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*parity = 'n';
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if (lcr_h & UART01x_LCRH_PEN) {
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@ -643,7 +631,7 @@ pl010_console_get_options(struct uart_port *port, int *baud,
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else
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*bits = 8;
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quot = UART_GET_LCRL(port) | UART_GET_LCRM(port) << 8;
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quot = readb(port->membase + UART010_LCRL) | readb(port->membase + UART010_LCRM) << 8;
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*baud = port->uartclk / (16 * (quot + 1));
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}
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}
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