mirror of https://gitee.com/openkylin/linux.git
soundwire: qcom : use FIELD_{GET|PREP}
use FIELD_{GET|PREP} in qcom driver to get/set field values instead of open coding masks and shift operations. Also, remove now unused register shift defines Signed-off-by: Vinod Koul <vkoul@kernel.org> Tested-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20200903114504.1202143-6-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -43,13 +43,10 @@
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#define SWRM_CMD_FIFO_RD_FIFO_ADDR 0x318
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#define SWRM_ENUMERATOR_CFG_ADDR 0x500
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#define SWRM_MCP_FRAME_CTRL_BANK_ADDR(m) (0x101C + 0x40 * (m))
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#define SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_SHFT 3
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#define SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK GENMASK(2, 0)
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#define SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK GENMASK(7, 3)
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#define SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_SHFT 0
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#define SWRM_MCP_CFG_ADDR 0x1048
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#define SWRM_MCP_CFG_MAX_NUM_OF_CMD_NO_PINGS_BMSK GENMASK(21, 17)
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#define SWRM_MCP_CFG_MAX_NUM_OF_CMD_NO_PINGS_SHFT 0x11
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#define SWRM_DEF_CMD_NO_PINGS 0x1f
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#define SWRM_MCP_STATUS 0x104C
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#define SWRM_MCP_STATUS_BANK_NUM_MASK BIT(0)
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@ -284,8 +281,8 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
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u32 val;
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/* Clear Rows and Cols */
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val = (SWRM_MAX_ROW_VAL << SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_SHFT |
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SWRM_MIN_COL_VAL << SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_SHFT);
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val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, SWRM_MAX_ROW_VAL);
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val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, SWRM_MIN_COL_VAL);
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ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
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@ -298,9 +295,7 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
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/* Configure No pings */
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ctrl->reg_read(ctrl, SWRM_MCP_CFG_ADDR, &val);
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val &= ~SWRM_MCP_CFG_MAX_NUM_OF_CMD_NO_PINGS_BMSK;
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val |= (SWRM_DEF_CMD_NO_PINGS <<
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SWRM_MCP_CFG_MAX_NUM_OF_CMD_NO_PINGS_SHFT);
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val |= FIELD_PREP(SWRM_MCP_CFG_MAX_NUM_OF_CMD_NO_PINGS_BMSK, SWRM_DEF_CMD_NO_PINGS);
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ctrl->reg_write(ctrl, SWRM_MCP_CFG_ADDR, val);
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/* Configure number of retries of a read/write cmd */
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@ -355,11 +350,8 @@ static int qcom_swrm_pre_bank_switch(struct sdw_bus *bus)
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ctrl->reg_read(ctrl, reg, &val);
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val &= ~SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK;
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val &= ~SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK;
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val |= (SWRM_MAX_ROW_VAL << SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_SHFT |
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SWRM_MAX_COL_VAL << SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_SHFT);
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val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, SWRM_MAX_COL_VAL);
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val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, SWRM_MAX_ROW_VAL);
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return ctrl->reg_write(ctrl, reg, val);
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}
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@ -693,8 +685,8 @@ static int qcom_swrm_get_port_config(struct qcom_swrm_ctrl *ctrl)
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ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val);
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ctrl->num_dout_ports = val & SWRM_COMP_PARAMS_DOUT_PORTS_MASK;
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ctrl->num_din_ports = (val & SWRM_COMP_PARAMS_DIN_PORTS_MASK) >> 5;
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ctrl->num_dout_ports = FIELD_GET(SWRM_COMP_PARAMS_DOUT_PORTS_MASK, val);
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ctrl->num_din_ports = FIELD_GET(SWRM_COMP_PARAMS_DIN_PORTS_MASK, val);
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ret = of_property_read_u32(np, "qcom,din-ports", &val);
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if (ret)
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