mirror of https://gitee.com/openkylin/linux.git
arm64: dts: renesas: r8a77965: Add CMT device nodes
This patch adds CMT{0|1|2|3} device nodes for r8a77965 SoC. Tested-by: Cao Van Dong <cv-dong@jinso.co.jp> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -317,6 +317,76 @@ pfc: pin-controller@e6060000 {
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reg = <0 0xe6060000 0 0x50c>;
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};
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cmt0: timer@e60f0000 {
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compatible = "renesas,r8a77965-cmt0",
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"renesas,rcar-gen3-cmt0";
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reg = <0 0xe60f0000 0 0x1004>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 303>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 303>;
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status = "disabled";
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,r8a77965-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6130000 0 0x1004>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 302>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 302>;
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status = "disabled";
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};
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cmt2: timer@e6140000 {
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compatible = "renesas,r8a77965-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6140000 0 0x1004>;
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interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 301>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 301>;
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status = "disabled";
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};
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cmt3: timer@e6148000 {
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compatible = "renesas,r8a77965-cmt1",
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"renesas,rcar-gen3-cmt1";
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reg = <0 0xe6148000 0 0x1004>;
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interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 300>;
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clock-names = "fck";
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 300>;
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status = "disabled";
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};
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cpg: clock-controller@e6150000 {
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compatible = "renesas,r8a77965-cpg-mssr";
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reg = <0 0xe6150000 0 0x1000>;
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