mirror of https://gitee.com/openkylin/linux.git
xen/events: move 2-level specific code into its own file
In preparation for alternative event channel ABIs, move all the functions accessing the shared data structures into their own file. Signed-off-by: David Vrabel <david.vrabel@citrix.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
This commit is contained in:
parent
d2ba3166f2
commit
9a489f45a1
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@ -1,3 +1,4 @@
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obj-y += events.o
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events-y += events_base.o
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events-y += events_2l.o
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@ -0,0 +1,348 @@
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/*
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* Xen event channels (2-level ABI)
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*
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* Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
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*/
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#define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
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#include <linux/linkage.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <asm/sync_bitops.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/hypervisor.h>
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#include <xen/xen.h>
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#include <xen/xen-ops.h>
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#include <xen/events.h>
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#include <xen/interface/xen.h>
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#include <xen/interface/event_channel.h>
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#include "events_internal.h"
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/*
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* Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
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* careful to only use bitops which allow for this (e.g
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* test_bit/find_first_bit and friends but not __ffs) and to pass
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* BITS_PER_EVTCHN_WORD as the bitmask length.
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*/
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#define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
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/*
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* Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
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* array. Primarily to avoid long lines (hence the terse name).
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*/
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#define BM(x) (unsigned long *)(x)
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/* Find the first set bit in a evtchn mask */
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#define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
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static DEFINE_PER_CPU(xen_ulong_t [NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD],
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cpu_evtchn_mask);
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void xen_evtchn_port_bind_to_cpu(struct irq_info *info, int cpu)
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{
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clear_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, info->cpu)));
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set_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, cpu)));
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}
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void clear_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_clear_bit(port, BM(&s->evtchn_pending[0]));
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}
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void set_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_set_bit(port, BM(&s->evtchn_pending[0]));
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}
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int test_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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return sync_test_bit(port, BM(&s->evtchn_pending[0]));
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}
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int test_and_set_mask(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0]));
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}
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void mask_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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sync_set_bit(port, BM(&s->evtchn_mask[0]));
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}
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void unmask_evtchn(int port)
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{
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struct shared_info *s = HYPERVISOR_shared_info;
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unsigned int cpu = get_cpu();
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int do_hypercall = 0, evtchn_pending = 0;
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BUG_ON(!irqs_disabled());
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if (unlikely((cpu != cpu_from_evtchn(port))))
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do_hypercall = 1;
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else {
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/*
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* Need to clear the mask before checking pending to
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* avoid a race with an event becoming pending.
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*
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* EVTCHNOP_unmask will only trigger an upcall if the
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* mask bit was set, so if a hypercall is needed
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* remask the event.
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*/
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sync_clear_bit(port, BM(&s->evtchn_mask[0]));
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evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
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if (unlikely(evtchn_pending && xen_hvm_domain())) {
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sync_set_bit(port, BM(&s->evtchn_mask[0]));
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do_hypercall = 1;
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}
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}
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/* Slow path (hypercall) if this is a non-local port or if this is
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* an hvm domain and an event is pending (hvm domains don't have
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* their own implementation of irq_enable). */
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if (do_hypercall) {
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struct evtchn_unmask unmask = { .port = port };
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(void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
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} else {
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struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
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/*
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* The following is basically the equivalent of
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* 'hw_resend_irq'. Just like a real IO-APIC we 'lose
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* the interrupt edge' if the channel is masked.
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*/
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if (evtchn_pending &&
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!sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
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BM(&vcpu_info->evtchn_pending_sel)))
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vcpu_info->evtchn_upcall_pending = 1;
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}
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put_cpu();
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}
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static DEFINE_PER_CPU(unsigned int, current_word_idx);
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static DEFINE_PER_CPU(unsigned int, current_bit_idx);
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/*
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* Mask out the i least significant bits of w
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*/
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#define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
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static inline xen_ulong_t active_evtchns(unsigned int cpu,
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struct shared_info *sh,
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unsigned int idx)
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{
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return sh->evtchn_pending[idx] &
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per_cpu(cpu_evtchn_mask, cpu)[idx] &
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~sh->evtchn_mask[idx];
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}
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/*
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* Search the CPU's pending events bitmasks. For each one found, map
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* the event number to an irq, and feed it into do_IRQ() for handling.
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*
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* Xen uses a two-level bitmap to speed searching. The first level is
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* a bitset of words which contain pending event bits. The second
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* level is a bitset of pending events themselves.
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*/
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void xen_evtchn_handle_events(int cpu)
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{
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int irq;
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xen_ulong_t pending_words;
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xen_ulong_t pending_bits;
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int start_word_idx, start_bit_idx;
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int word_idx, bit_idx;
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int i;
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struct irq_desc *desc;
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struct shared_info *s = HYPERVISOR_shared_info;
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struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
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/* Timer interrupt has highest priority. */
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irq = irq_from_virq(cpu, VIRQ_TIMER);
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if (irq != -1) {
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unsigned int evtchn = evtchn_from_irq(irq);
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word_idx = evtchn / BITS_PER_LONG;
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bit_idx = evtchn % BITS_PER_LONG;
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if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx)) {
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desc = irq_to_desc(irq);
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if (desc)
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generic_handle_irq_desc(irq, desc);
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}
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}
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/*
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* Master flag must be cleared /before/ clearing
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* selector flag. xchg_xen_ulong must contain an
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* appropriate barrier.
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*/
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pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
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start_word_idx = __this_cpu_read(current_word_idx);
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start_bit_idx = __this_cpu_read(current_bit_idx);
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word_idx = start_word_idx;
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for (i = 0; pending_words != 0; i++) {
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xen_ulong_t words;
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words = MASK_LSBS(pending_words, word_idx);
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/*
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* If we masked out all events, wrap to beginning.
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*/
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if (words == 0) {
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word_idx = 0;
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bit_idx = 0;
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continue;
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}
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word_idx = EVTCHN_FIRST_BIT(words);
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pending_bits = active_evtchns(cpu, s, word_idx);
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bit_idx = 0; /* usually scan entire word from start */
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/*
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* We scan the starting word in two parts.
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*
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* 1st time: start in the middle, scanning the
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* upper bits.
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*
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* 2nd time: scan the whole word (not just the
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* parts skipped in the first pass) -- if an
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* event in the previously scanned bits is
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* pending again it would just be scanned on
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* the next loop anyway.
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*/
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if (word_idx == start_word_idx) {
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if (i == 0)
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bit_idx = start_bit_idx;
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}
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do {
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xen_ulong_t bits;
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int port;
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bits = MASK_LSBS(pending_bits, bit_idx);
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/* If we masked out all events, move on. */
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if (bits == 0)
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break;
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bit_idx = EVTCHN_FIRST_BIT(bits);
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/* Process port. */
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port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
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irq = evtchn_to_irq[port];
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if (irq != -1) {
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desc = irq_to_desc(irq);
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if (desc)
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generic_handle_irq_desc(irq, desc);
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}
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bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
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/* Next caller starts at last processed + 1 */
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__this_cpu_write(current_word_idx,
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bit_idx ? word_idx :
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(word_idx+1) % BITS_PER_EVTCHN_WORD);
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__this_cpu_write(current_bit_idx, bit_idx);
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} while (bit_idx != 0);
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/* Scan start_l1i twice; all others once. */
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if ((word_idx != start_word_idx) || (i != 0))
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pending_words &= ~(1UL << word_idx);
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word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
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}
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}
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irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
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{
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struct shared_info *sh = HYPERVISOR_shared_info;
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int cpu = smp_processor_id();
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xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
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int i;
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unsigned long flags;
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static DEFINE_SPINLOCK(debug_lock);
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struct vcpu_info *v;
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spin_lock_irqsave(&debug_lock, flags);
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printk("\nvcpu %d\n ", cpu);
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for_each_online_cpu(i) {
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int pending;
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v = per_cpu(xen_vcpu, i);
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pending = (get_irq_regs() && i == cpu)
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? xen_irqs_disabled(get_irq_regs())
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: v->evtchn_upcall_mask;
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printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i,
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pending, v->evtchn_upcall_pending,
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(int)(sizeof(v->evtchn_pending_sel)*2),
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v->evtchn_pending_sel);
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}
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v = per_cpu(xen_vcpu, cpu);
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printk("\npending:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
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printk("%0*"PRI_xen_ulong"%s",
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(int)sizeof(sh->evtchn_pending[0])*2,
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sh->evtchn_pending[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nglobal mask:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
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printk("%0*"PRI_xen_ulong"%s",
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(int)(sizeof(sh->evtchn_mask[0])*2),
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sh->evtchn_mask[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nglobally unmasked:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
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printk("%0*"PRI_xen_ulong"%s",
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(int)(sizeof(sh->evtchn_mask[0])*2),
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sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nlocal cpu%d mask:\n ", cpu);
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for (i = (NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
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printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
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cpu_evtchn[i],
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i % 8 == 0 ? "\n " : " ");
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printk("\nlocally unmasked:\n ");
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for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
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xen_ulong_t pending = sh->evtchn_pending[i]
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& ~sh->evtchn_mask[i]
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& cpu_evtchn[i];
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printk("%0*"PRI_xen_ulong"%s",
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(int)(sizeof(sh->evtchn_mask[0])*2),
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pending, i % 8 == 0 ? "\n " : " ");
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}
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printk("\npending list:\n");
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for (i = 0; i < NR_EVENT_CHANNELS; i++) {
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if (sync_test_bit(i, BM(sh->evtchn_pending))) {
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int word_idx = i / BITS_PER_EVTCHN_WORD;
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printk(" %d: event %d -> irq %d%s%s%s\n",
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cpu_from_evtchn(i), i,
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evtchn_to_irq[i],
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sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
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? "" : " l2-clear",
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!sync_test_bit(i, BM(sh->evtchn_mask))
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? "" : " globally-masked",
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sync_test_bit(i, BM(cpu_evtchn))
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? "" : " locally-masked");
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}
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}
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spin_unlock_irqrestore(&debug_lock, flags);
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return IRQ_HANDLED;
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}
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@ -59,6 +59,8 @@
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#include <xen/interface/vcpu.h>
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#include <asm/hw_irq.h>
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#include "events_internal.h"
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/*
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* This lock protects updates to the following mapping and reference-count
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* arrays. The lock does not need to be acquired to read the mapping tables.
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@ -73,72 +75,12 @@ static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
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/* IRQ <-> IPI mapping */
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static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
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/* Interrupt types. */
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enum xen_irq_type {
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IRQT_UNBOUND = 0,
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IRQT_PIRQ,
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IRQT_VIRQ,
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IRQT_IPI,
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IRQT_EVTCHN
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};
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/*
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* Packed IRQ information:
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* type - enum xen_irq_type
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* event channel - irq->event channel mapping
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* cpu - cpu this event channel is bound to
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* index - type-specific information:
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* PIRQ - physical IRQ, GSI, flags, and owner domain
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* VIRQ - virq number
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* IPI - IPI vector
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* EVTCHN -
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*/
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struct irq_info {
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struct list_head list;
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int refcnt;
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enum xen_irq_type type; /* type */
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unsigned irq;
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unsigned short evtchn; /* event channel */
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unsigned short cpu; /* cpu bound */
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union {
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unsigned short virq;
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enum ipi_vector ipi;
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struct {
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unsigned short pirq;
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unsigned short gsi;
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unsigned char flags;
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uint16_t domid;
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} pirq;
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} u;
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};
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#define PIRQ_NEEDS_EOI (1 << 0)
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#define PIRQ_SHAREABLE (1 << 1)
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static int *evtchn_to_irq;
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int *evtchn_to_irq;
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#ifdef CONFIG_X86
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static unsigned long *pirq_eoi_map;
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#endif
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static bool (*pirq_needs_eoi)(unsigned irq);
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/*
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* Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
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* careful to only use bitops which allow for this (e.g
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* test_bit/find_first_bit and friends but not __ffs) and to pass
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* BITS_PER_EVTCHN_WORD as the bitmask length.
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*/
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#define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
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/*
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* Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
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* array. Primarily to avoid long lines (hence the terse name).
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*/
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#define BM(x) (unsigned long *)(x)
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/* Find the first set bit in a evtchn mask */
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#define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
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static DEFINE_PER_CPU(xen_ulong_t [NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD],
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cpu_evtchn_mask);
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/* Xen will never allocate port zero for any purpose. */
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#define VALID_EVTCHN(chn) ((chn) != 0)
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||||
|
@ -149,7 +91,7 @@ static void enable_dynirq(struct irq_data *data);
|
|||
static void disable_dynirq(struct irq_data *data);
|
||||
|
||||
/* Get info for IRQ */
|
||||
static struct irq_info *info_for_irq(unsigned irq)
|
||||
struct irq_info *info_for_irq(unsigned irq)
|
||||
{
|
||||
return irq_get_handler_data(irq);
|
||||
}
|
||||
|
@ -230,7 +172,7 @@ static void xen_irq_info_pirq_init(unsigned irq,
|
|||
/*
|
||||
* Accessors for packed IRQ information.
|
||||
*/
|
||||
static unsigned int evtchn_from_irq(unsigned irq)
|
||||
unsigned int evtchn_from_irq(unsigned irq)
|
||||
{
|
||||
if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
|
||||
return 0;
|
||||
|
@ -244,6 +186,11 @@ unsigned irq_from_evtchn(unsigned int evtchn)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(irq_from_evtchn);
|
||||
|
||||
int irq_from_virq(unsigned int cpu, unsigned int virq)
|
||||
{
|
||||
return per_cpu(virq_to_irq, cpu)[virq];
|
||||
}
|
||||
|
||||
static enum ipi_vector ipi_from_irq(unsigned irq)
|
||||
{
|
||||
struct irq_info *info = info_for_irq(irq);
|
||||
|
@ -279,12 +226,12 @@ static enum xen_irq_type type_from_irq(unsigned irq)
|
|||
return info_for_irq(irq)->type;
|
||||
}
|
||||
|
||||
static unsigned cpu_from_irq(unsigned irq)
|
||||
unsigned cpu_from_irq(unsigned irq)
|
||||
{
|
||||
return info_for_irq(irq)->cpu;
|
||||
}
|
||||
|
||||
static unsigned int cpu_from_evtchn(unsigned int evtchn)
|
||||
unsigned int cpu_from_evtchn(unsigned int evtchn)
|
||||
{
|
||||
int irq = evtchn_to_irq[evtchn];
|
||||
unsigned ret = 0;
|
||||
|
@ -310,55 +257,21 @@ static bool pirq_needs_eoi_flag(unsigned irq)
|
|||
return info->u.pirq.flags & PIRQ_NEEDS_EOI;
|
||||
}
|
||||
|
||||
static inline xen_ulong_t active_evtchns(unsigned int cpu,
|
||||
struct shared_info *sh,
|
||||
unsigned int idx)
|
||||
{
|
||||
return sh->evtchn_pending[idx] &
|
||||
per_cpu(cpu_evtchn_mask, cpu)[idx] &
|
||||
~sh->evtchn_mask[idx];
|
||||
}
|
||||
|
||||
static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
|
||||
{
|
||||
int irq = evtchn_to_irq[chn];
|
||||
struct irq_info *info = info_for_irq(irq);
|
||||
|
||||
BUG_ON(irq == -1);
|
||||
#ifdef CONFIG_SMP
|
||||
cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
|
||||
#endif
|
||||
|
||||
clear_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu_from_irq(irq))));
|
||||
set_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu)));
|
||||
xen_evtchn_port_bind_to_cpu(info, cpu);
|
||||
|
||||
info_for_irq(irq)->cpu = cpu;
|
||||
info->cpu = cpu;
|
||||
}
|
||||
|
||||
static inline void clear_evtchn(int port)
|
||||
{
|
||||
struct shared_info *s = HYPERVISOR_shared_info;
|
||||
sync_clear_bit(port, BM(&s->evtchn_pending[0]));
|
||||
}
|
||||
|
||||
static inline void set_evtchn(int port)
|
||||
{
|
||||
struct shared_info *s = HYPERVISOR_shared_info;
|
||||
sync_set_bit(port, BM(&s->evtchn_pending[0]));
|
||||
}
|
||||
|
||||
static inline int test_evtchn(int port)
|
||||
{
|
||||
struct shared_info *s = HYPERVISOR_shared_info;
|
||||
return sync_test_bit(port, BM(&s->evtchn_pending[0]));
|
||||
}
|
||||
|
||||
static inline int test_and_set_mask(int port)
|
||||
{
|
||||
struct shared_info *s = HYPERVISOR_shared_info;
|
||||
return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0]));
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* notify_remote_via_irq - send event to remote end of event channel via irq
|
||||
* @irq: irq of event channel to send event to
|
||||
|
@ -376,63 +289,6 @@ void notify_remote_via_irq(int irq)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(notify_remote_via_irq);
|
||||
|
||||
static void mask_evtchn(int port)
|
||||
{
|
||||
struct shared_info *s = HYPERVISOR_shared_info;
|
||||
sync_set_bit(port, BM(&s->evtchn_mask[0]));
|
||||
}
|
||||
|
||||
static void unmask_evtchn(int port)
|
||||
{
|
||||
struct shared_info *s = HYPERVISOR_shared_info;
|
||||
unsigned int cpu = get_cpu();
|
||||
int do_hypercall = 0, evtchn_pending = 0;
|
||||
|
||||
BUG_ON(!irqs_disabled());
|
||||
|
||||
if (unlikely((cpu != cpu_from_evtchn(port))))
|
||||
do_hypercall = 1;
|
||||
else {
|
||||
/*
|
||||
* Need to clear the mask before checking pending to
|
||||
* avoid a race with an event becoming pending.
|
||||
*
|
||||
* EVTCHNOP_unmask will only trigger an upcall if the
|
||||
* mask bit was set, so if a hypercall is needed
|
||||
* remask the event.
|
||||
*/
|
||||
sync_clear_bit(port, BM(&s->evtchn_mask[0]));
|
||||
evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
|
||||
|
||||
if (unlikely(evtchn_pending && xen_hvm_domain())) {
|
||||
sync_set_bit(port, BM(&s->evtchn_mask[0]));
|
||||
do_hypercall = 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Slow path (hypercall) if this is a non-local port or if this is
|
||||
* an hvm domain and an event is pending (hvm domains don't have
|
||||
* their own implementation of irq_enable). */
|
||||
if (do_hypercall) {
|
||||
struct evtchn_unmask unmask = { .port = port };
|
||||
(void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
|
||||
} else {
|
||||
struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
|
||||
|
||||
/*
|
||||
* The following is basically the equivalent of
|
||||
* 'hw_resend_irq'. Just like a real IO-APIC we 'lose
|
||||
* the interrupt edge' if the channel is masked.
|
||||
*/
|
||||
if (evtchn_pending &&
|
||||
!sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
|
||||
BM(&vcpu_info->evtchn_pending_sel)))
|
||||
vcpu_info->evtchn_upcall_pending = 1;
|
||||
}
|
||||
|
||||
put_cpu();
|
||||
}
|
||||
|
||||
static void xen_irq_init(unsigned irq)
|
||||
{
|
||||
struct irq_info *info;
|
||||
|
@ -1216,222 +1072,21 @@ void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
|
|||
notify_remote_via_irq(irq);
|
||||
}
|
||||
|
||||
irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
struct shared_info *sh = HYPERVISOR_shared_info;
|
||||
int cpu = smp_processor_id();
|
||||
xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
|
||||
int i;
|
||||
unsigned long flags;
|
||||
static DEFINE_SPINLOCK(debug_lock);
|
||||
struct vcpu_info *v;
|
||||
|
||||
spin_lock_irqsave(&debug_lock, flags);
|
||||
|
||||
printk("\nvcpu %d\n ", cpu);
|
||||
|
||||
for_each_online_cpu(i) {
|
||||
int pending;
|
||||
v = per_cpu(xen_vcpu, i);
|
||||
pending = (get_irq_regs() && i == cpu)
|
||||
? xen_irqs_disabled(get_irq_regs())
|
||||
: v->evtchn_upcall_mask;
|
||||
printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i,
|
||||
pending, v->evtchn_upcall_pending,
|
||||
(int)(sizeof(v->evtchn_pending_sel)*2),
|
||||
v->evtchn_pending_sel);
|
||||
}
|
||||
v = per_cpu(xen_vcpu, cpu);
|
||||
|
||||
printk("\npending:\n ");
|
||||
for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
|
||||
printk("%0*"PRI_xen_ulong"%s",
|
||||
(int)sizeof(sh->evtchn_pending[0])*2,
|
||||
sh->evtchn_pending[i],
|
||||
i % 8 == 0 ? "\n " : " ");
|
||||
printk("\nglobal mask:\n ");
|
||||
for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
|
||||
printk("%0*"PRI_xen_ulong"%s",
|
||||
(int)(sizeof(sh->evtchn_mask[0])*2),
|
||||
sh->evtchn_mask[i],
|
||||
i % 8 == 0 ? "\n " : " ");
|
||||
|
||||
printk("\nglobally unmasked:\n ");
|
||||
for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
|
||||
printk("%0*"PRI_xen_ulong"%s",
|
||||
(int)(sizeof(sh->evtchn_mask[0])*2),
|
||||
sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
|
||||
i % 8 == 0 ? "\n " : " ");
|
||||
|
||||
printk("\nlocal cpu%d mask:\n ", cpu);
|
||||
for (i = (NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
|
||||
printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
|
||||
cpu_evtchn[i],
|
||||
i % 8 == 0 ? "\n " : " ");
|
||||
|
||||
printk("\nlocally unmasked:\n ");
|
||||
for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
|
||||
xen_ulong_t pending = sh->evtchn_pending[i]
|
||||
& ~sh->evtchn_mask[i]
|
||||
& cpu_evtchn[i];
|
||||
printk("%0*"PRI_xen_ulong"%s",
|
||||
(int)(sizeof(sh->evtchn_mask[0])*2),
|
||||
pending, i % 8 == 0 ? "\n " : " ");
|
||||
}
|
||||
|
||||
printk("\npending list:\n");
|
||||
for (i = 0; i < NR_EVENT_CHANNELS; i++) {
|
||||
if (sync_test_bit(i, BM(sh->evtchn_pending))) {
|
||||
int word_idx = i / BITS_PER_EVTCHN_WORD;
|
||||
printk(" %d: event %d -> irq %d%s%s%s\n",
|
||||
cpu_from_evtchn(i), i,
|
||||
evtchn_to_irq[i],
|
||||
sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
|
||||
? "" : " l2-clear",
|
||||
!sync_test_bit(i, BM(sh->evtchn_mask))
|
||||
? "" : " globally-masked",
|
||||
sync_test_bit(i, BM(cpu_evtchn))
|
||||
? "" : " locally-masked");
|
||||
}
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&debug_lock, flags);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static DEFINE_PER_CPU(unsigned, xed_nesting_count);
|
||||
static DEFINE_PER_CPU(unsigned int, current_word_idx);
|
||||
static DEFINE_PER_CPU(unsigned int, current_bit_idx);
|
||||
|
||||
/*
|
||||
* Mask out the i least significant bits of w
|
||||
*/
|
||||
#define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
|
||||
|
||||
/*
|
||||
* Search the CPUs pending events bitmasks. For each one found, map
|
||||
* the event number to an irq, and feed it into do_IRQ() for
|
||||
* handling.
|
||||
*
|
||||
* Xen uses a two-level bitmap to speed searching. The first level is
|
||||
* a bitset of words which contain pending event bits. The second
|
||||
* level is a bitset of pending events themselves.
|
||||
*/
|
||||
static void __xen_evtchn_do_upcall(void)
|
||||
{
|
||||
int start_word_idx, start_bit_idx;
|
||||
int word_idx, bit_idx;
|
||||
int i, irq;
|
||||
int cpu = get_cpu();
|
||||
struct shared_info *s = HYPERVISOR_shared_info;
|
||||
struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
|
||||
int cpu = get_cpu();
|
||||
unsigned count;
|
||||
|
||||
do {
|
||||
xen_ulong_t pending_words;
|
||||
xen_ulong_t pending_bits;
|
||||
struct irq_desc *desc;
|
||||
|
||||
vcpu_info->evtchn_upcall_pending = 0;
|
||||
|
||||
if (__this_cpu_inc_return(xed_nesting_count) - 1)
|
||||
goto out;
|
||||
|
||||
/*
|
||||
* Master flag must be cleared /before/ clearing
|
||||
* selector flag. xchg_xen_ulong must contain an
|
||||
* appropriate barrier.
|
||||
*/
|
||||
if ((irq = per_cpu(virq_to_irq, cpu)[VIRQ_TIMER]) != -1) {
|
||||
int evtchn = evtchn_from_irq(irq);
|
||||
word_idx = evtchn / BITS_PER_LONG;
|
||||
pending_bits = evtchn % BITS_PER_LONG;
|
||||
if (active_evtchns(cpu, s, word_idx) & (1ULL << pending_bits)) {
|
||||
desc = irq_to_desc(irq);
|
||||
if (desc)
|
||||
generic_handle_irq_desc(irq, desc);
|
||||
}
|
||||
}
|
||||
|
||||
pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
|
||||
|
||||
start_word_idx = __this_cpu_read(current_word_idx);
|
||||
start_bit_idx = __this_cpu_read(current_bit_idx);
|
||||
|
||||
word_idx = start_word_idx;
|
||||
|
||||
for (i = 0; pending_words != 0; i++) {
|
||||
xen_ulong_t words;
|
||||
|
||||
words = MASK_LSBS(pending_words, word_idx);
|
||||
|
||||
/*
|
||||
* If we masked out all events, wrap to beginning.
|
||||
*/
|
||||
if (words == 0) {
|
||||
word_idx = 0;
|
||||
bit_idx = 0;
|
||||
continue;
|
||||
}
|
||||
word_idx = EVTCHN_FIRST_BIT(words);
|
||||
|
||||
pending_bits = active_evtchns(cpu, s, word_idx);
|
||||
bit_idx = 0; /* usually scan entire word from start */
|
||||
/*
|
||||
* We scan the starting word in two parts.
|
||||
*
|
||||
* 1st time: start in the middle, scanning the
|
||||
* upper bits.
|
||||
*
|
||||
* 2nd time: scan the whole word (not just the
|
||||
* parts skipped in the first pass) -- if an
|
||||
* event in the previously scanned bits is
|
||||
* pending again it would just be scanned on
|
||||
* the next loop anyway.
|
||||
*/
|
||||
if (word_idx == start_word_idx) {
|
||||
if (i == 0)
|
||||
bit_idx = start_bit_idx;
|
||||
}
|
||||
|
||||
do {
|
||||
xen_ulong_t bits;
|
||||
int port;
|
||||
|
||||
bits = MASK_LSBS(pending_bits, bit_idx);
|
||||
|
||||
/* If we masked out all events, move on. */
|
||||
if (bits == 0)
|
||||
break;
|
||||
|
||||
bit_idx = EVTCHN_FIRST_BIT(bits);
|
||||
|
||||
/* Process port. */
|
||||
port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
|
||||
irq = evtchn_to_irq[port];
|
||||
|
||||
if (irq != -1) {
|
||||
desc = irq_to_desc(irq);
|
||||
if (desc)
|
||||
generic_handle_irq_desc(irq, desc);
|
||||
}
|
||||
|
||||
bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
|
||||
|
||||
/* Next caller starts at last processed + 1 */
|
||||
__this_cpu_write(current_word_idx,
|
||||
bit_idx ? word_idx :
|
||||
(word_idx+1) % BITS_PER_EVTCHN_WORD);
|
||||
__this_cpu_write(current_bit_idx, bit_idx);
|
||||
} while (bit_idx != 0);
|
||||
|
||||
/* Scan start_l1i twice; all others once. */
|
||||
if ((word_idx != start_word_idx) || (i != 0))
|
||||
pending_words &= ~(1UL << word_idx);
|
||||
|
||||
word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
|
||||
}
|
||||
xen_evtchn_handle_events(cpu);
|
||||
|
||||
BUG_ON(!irqs_disabled());
|
||||
|
||||
|
|
|
@ -0,0 +1,74 @@
|
|||
/*
|
||||
* Xen Event Channels (internal header)
|
||||
*
|
||||
* Copyright (C) 2013 Citrix Systems R&D Ltd.
|
||||
*
|
||||
* This source code is licensed under the GNU General Public License,
|
||||
* Version 2 or later. See the file COPYING for more details.
|
||||
*/
|
||||
#ifndef __EVENTS_INTERNAL_H__
|
||||
#define __EVENTS_INTERNAL_H__
|
||||
|
||||
/* Interrupt types. */
|
||||
enum xen_irq_type {
|
||||
IRQT_UNBOUND = 0,
|
||||
IRQT_PIRQ,
|
||||
IRQT_VIRQ,
|
||||
IRQT_IPI,
|
||||
IRQT_EVTCHN
|
||||
};
|
||||
|
||||
/*
|
||||
* Packed IRQ information:
|
||||
* type - enum xen_irq_type
|
||||
* event channel - irq->event channel mapping
|
||||
* cpu - cpu this event channel is bound to
|
||||
* index - type-specific information:
|
||||
* PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
|
||||
* guest, or GSI (real passthrough IRQ) of the device.
|
||||
* VIRQ - virq number
|
||||
* IPI - IPI vector
|
||||
* EVTCHN -
|
||||
*/
|
||||
struct irq_info {
|
||||
struct list_head list;
|
||||
int refcnt;
|
||||
enum xen_irq_type type; /* type */
|
||||
unsigned irq;
|
||||
unsigned short evtchn; /* event channel */
|
||||
unsigned short cpu; /* cpu bound */
|
||||
|
||||
union {
|
||||
unsigned short virq;
|
||||
enum ipi_vector ipi;
|
||||
struct {
|
||||
unsigned short pirq;
|
||||
unsigned short gsi;
|
||||
unsigned char vector;
|
||||
unsigned char flags;
|
||||
uint16_t domid;
|
||||
} pirq;
|
||||
} u;
|
||||
};
|
||||
|
||||
#define PIRQ_NEEDS_EOI (1 << 0)
|
||||
#define PIRQ_SHAREABLE (1 << 1)
|
||||
|
||||
extern int *evtchn_to_irq;
|
||||
|
||||
struct irq_info *info_for_irq(unsigned irq);
|
||||
unsigned cpu_from_irq(unsigned irq);
|
||||
unsigned cpu_from_evtchn(unsigned int evtchn);
|
||||
|
||||
void xen_evtchn_port_bind_to_cpu(struct irq_info *info, int cpu);
|
||||
|
||||
void clear_evtchn(int port);
|
||||
void set_evtchn(int port);
|
||||
int test_evtchn(int port);
|
||||
int test_and_set_mask(int port);
|
||||
void mask_evtchn(int port);
|
||||
void unmask_evtchn(int port);
|
||||
|
||||
void xen_evtchn_handle_events(int cpu);
|
||||
|
||||
#endif /* #ifndef __EVENTS_INTERNAL_H__ */
|
|
@ -73,6 +73,8 @@ void xen_poll_irq_timeout(int irq, u64 timeout);
|
|||
|
||||
/* Determine the IRQ which is bound to an event channel */
|
||||
unsigned irq_from_evtchn(unsigned int evtchn);
|
||||
int irq_from_virq(unsigned int cpu, unsigned int virq);
|
||||
unsigned int evtchn_from_irq(unsigned irq);
|
||||
|
||||
/* Xen HVM evtchn vector callback */
|
||||
void xen_hvm_callback_vector(void);
|
||||
|
|
Loading…
Reference in New Issue