mirror of https://gitee.com/openkylin/linux.git
perf/x86: Rename x86_pmu::er_flags to 'flags'
Because it will be used for more than just tracking the presence of extra registers. Signed-off-by: Stephane Eranian <eranian@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: bp@alien8.de Cc: jolsa@redhat.com Cc: kan.liang@intel.com Cc: maria.n.dimakopoulou@gmail.com Link: http://lkml.kernel.org/r/1416251225-17721-2-git-send-email-eranian@google.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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c2b078e78a
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arch/x86/kernel/cpu
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@ -521,7 +521,7 @@ struct x86_pmu {
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* Extra registers for events
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*/
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struct extra_reg *extra_regs;
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unsigned int er_flags;
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unsigned int flags;
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/*
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* Intel host/guest support (KVM)
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@ -545,8 +545,11 @@ do { \
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x86_pmu.quirks = &__quirk; \
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} while (0)
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#define ERF_NO_HT_SHARING 1
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#define ERF_HAS_RSP_1 2
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/*
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* x86_pmu flags
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*/
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#define PMU_FL_NO_HT_SHARING 0x1 /* no hyper-threading resource sharing */
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#define PMU_FL_HAS_RSP_1 0x2 /* has 2 equivalent offcore_rsp regs */
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#define EVENT_VAR(_id) event_attr_##_id
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#define EVENT_PTR(_id) &event_attr_##_id.attr.attr
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@ -1667,7 +1667,7 @@ intel_bts_constraints(struct perf_event *event)
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static int intel_alt_er(int idx)
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{
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if (!(x86_pmu.er_flags & ERF_HAS_RSP_1))
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if (!(x86_pmu.flags & PMU_FL_HAS_RSP_1))
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return idx;
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if (idx == EXTRA_REG_RSP_0)
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@ -2250,7 +2250,7 @@ static void intel_pmu_cpu_starting(int cpu)
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if (!cpuc->shared_regs)
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return;
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if (!(x86_pmu.er_flags & ERF_NO_HT_SHARING)) {
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if (!(x86_pmu.flags & PMU_FL_NO_HT_SHARING)) {
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for_each_cpu(i, topology_thread_cpumask(cpu)) {
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struct intel_shared_regs *pc;
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@ -2671,7 +2671,7 @@ __init int intel_pmu_init(void)
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x86_pmu.event_constraints = intel_slm_event_constraints;
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x86_pmu.pebs_constraints = intel_slm_pebs_event_constraints;
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x86_pmu.extra_regs = intel_slm_extra_regs;
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x86_pmu.er_flags |= ERF_HAS_RSP_1;
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x86_pmu.flags |= PMU_FL_HAS_RSP_1;
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pr_cont("Silvermont events, ");
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break;
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@ -2689,7 +2689,7 @@ __init int intel_pmu_init(void)
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x86_pmu.enable_all = intel_pmu_nhm_enable_all;
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x86_pmu.pebs_constraints = intel_westmere_pebs_event_constraints;
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x86_pmu.extra_regs = intel_westmere_extra_regs;
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x86_pmu.er_flags |= ERF_HAS_RSP_1;
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x86_pmu.flags |= PMU_FL_HAS_RSP_1;
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x86_pmu.cpu_events = nhm_events_attrs;
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@ -2721,8 +2721,8 @@ __init int intel_pmu_init(void)
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else
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x86_pmu.extra_regs = intel_snb_extra_regs;
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/* all extra regs are per-cpu when HT is on */
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x86_pmu.er_flags |= ERF_HAS_RSP_1;
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x86_pmu.er_flags |= ERF_NO_HT_SHARING;
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x86_pmu.flags |= PMU_FL_HAS_RSP_1;
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x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
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x86_pmu.cpu_events = snb_events_attrs;
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@ -2756,8 +2756,8 @@ __init int intel_pmu_init(void)
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else
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x86_pmu.extra_regs = intel_snb_extra_regs;
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/* all extra regs are per-cpu when HT is on */
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x86_pmu.er_flags |= ERF_HAS_RSP_1;
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x86_pmu.er_flags |= ERF_NO_HT_SHARING;
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x86_pmu.flags |= PMU_FL_HAS_RSP_1;
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x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
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x86_pmu.cpu_events = snb_events_attrs;
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@ -2784,8 +2784,8 @@ __init int intel_pmu_init(void)
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x86_pmu.extra_regs = intel_snbep_extra_regs;
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x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
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/* all extra regs are per-cpu when HT is on */
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x86_pmu.er_flags |= ERF_HAS_RSP_1;
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x86_pmu.er_flags |= ERF_NO_HT_SHARING;
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x86_pmu.flags |= PMU_FL_HAS_RSP_1;
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x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
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x86_pmu.hw_config = hsw_hw_config;
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x86_pmu.get_event_constraints = hsw_get_event_constraints;
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@ -2817,8 +2817,8 @@ __init int intel_pmu_init(void)
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x86_pmu.extra_regs = intel_snbep_extra_regs;
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x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
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/* all extra regs are per-cpu when HT is on */
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x86_pmu.er_flags |= ERF_HAS_RSP_1;
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x86_pmu.er_flags |= ERF_NO_HT_SHARING;
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x86_pmu.flags |= PMU_FL_HAS_RSP_1;
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x86_pmu.flags |= PMU_FL_NO_HT_SHARING;
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x86_pmu.hw_config = hsw_hw_config;
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x86_pmu.get_event_constraints = hsw_get_event_constraints;
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