mirror of https://gitee.com/openkylin/linux.git
RDMA/hns: Refactor post recv flow
Refactor post recv flow by removing unnecessary checking and removing duplicated code. Link: https://lore.kernel.org/r/1611997090-48820-10-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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@ -48,8 +48,8 @@
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#include "hns_roce_hem.h"
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#include "hns_roce_hw_v2.h"
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static void set_data_seg_v2(struct hns_roce_v2_wqe_data_seg *dseg,
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struct ib_sge *sg)
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static inline void set_data_seg_v2(struct hns_roce_v2_wqe_data_seg *dseg,
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struct ib_sge *sg)
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{
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dseg->lkey = cpu_to_le32(sg->lkey);
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dseg->addr = cpu_to_le64(sg->addr);
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@ -729,6 +729,40 @@ static int check_recv_valid(struct hns_roce_dev *hr_dev,
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return 0;
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}
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static void fill_rq_wqe(struct hns_roce_qp *hr_qp, const struct ib_recv_wr *wr,
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u32 wqe_idx)
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{
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struct hns_roce_v2_wqe_data_seg *dseg;
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struct hns_roce_rinl_sge *sge_list;
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void *wqe = NULL;
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int i;
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wqe = hns_roce_get_recv_wqe(hr_qp, wqe_idx);
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dseg = (struct hns_roce_v2_wqe_data_seg *)wqe;
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for (i = 0; i < wr->num_sge; i++) {
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if (!wr->sg_list[i].length)
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continue;
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set_data_seg_v2(dseg, wr->sg_list + i);
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dseg++;
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}
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if (hr_qp->rq.rsv_sge) {
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dseg->lkey = cpu_to_le32(HNS_ROCE_INVALID_LKEY);
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dseg->addr = 0;
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dseg->len = cpu_to_le32(HNS_ROCE_INVALID_SGE_LENGTH);
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}
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/* rq support inline data */
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if (hr_qp->rq_inl_buf.wqe_cnt) {
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sge_list = hr_qp->rq_inl_buf.wqe_list[wqe_idx].sg_list;
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hr_qp->rq_inl_buf.wqe_list[wqe_idx].sge_cnt = (u32)wr->num_sge;
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for (i = 0; i < wr->num_sge; i++) {
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sge_list[i].addr = (void *)(u64)wr->sg_list[i].addr;
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sge_list[i].len = wr->sg_list[i].length;
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}
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}
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}
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static int hns_roce_v2_post_recv(struct ib_qp *ibqp,
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const struct ib_recv_wr *wr,
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const struct ib_recv_wr **bad_wr)
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@ -736,15 +770,9 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp,
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struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device);
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struct hns_roce_qp *hr_qp = to_hr_qp(ibqp);
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struct ib_device *ibdev = &hr_dev->ib_dev;
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struct hns_roce_v2_wqe_data_seg *dseg;
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struct hns_roce_rinl_sge *sge_list;
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u32 wqe_idx, nreq, max_sge;
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unsigned long flags;
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void *wqe = NULL;
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u32 wqe_idx;
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u32 max_sge;
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int nreq;
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int ret;
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int i;
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spin_lock_irqsave(&hr_qp->rq.lock, flags);
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@ -764,8 +792,6 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp,
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goto out;
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}
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wqe_idx = (hr_qp->rq.head + nreq) & (hr_qp->rq.wqe_cnt - 1);
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if (unlikely(wr->num_sge > max_sge)) {
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ibdev_err(ibdev, "num_sge = %d >= max_sge = %u.\n",
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wr->num_sge, max_sge);
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@ -774,32 +800,8 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp,
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goto out;
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}
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wqe = hns_roce_get_recv_wqe(hr_qp, wqe_idx);
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dseg = (struct hns_roce_v2_wqe_data_seg *)wqe;
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for (i = 0; i < wr->num_sge; i++) {
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if (!wr->sg_list[i].length)
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continue;
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set_data_seg_v2(dseg, wr->sg_list + i);
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dseg++;
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}
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if (hr_qp->rq.rsv_sge) {
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dseg->lkey = cpu_to_le32(HNS_ROCE_INVALID_LKEY);
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dseg->addr = 0;
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dseg->len = cpu_to_le32(HNS_ROCE_INVALID_SGE_LENGTH);
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}
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/* rq support inline data */
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if (hr_qp->rq_inl_buf.wqe_cnt) {
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sge_list = hr_qp->rq_inl_buf.wqe_list[wqe_idx].sg_list;
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hr_qp->rq_inl_buf.wqe_list[wqe_idx].sge_cnt =
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(u32)wr->num_sge;
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for (i = 0; i < wr->num_sge; i++) {
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sge_list[i].addr =
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(void *)(u64)wr->sg_list[i].addr;
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sge_list[i].len = wr->sg_list[i].length;
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}
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}
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wqe_idx = (hr_qp->rq.head + nreq) & (hr_qp->rq.wqe_cnt - 1);
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fill_rq_wqe(hr_qp, wr, wqe_idx);
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hr_qp->rq.wrid[wqe_idx] = wr->wr_id;
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}
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@ -928,9 +930,8 @@ static int hns_roce_v2_post_srq_recv(struct ib_srq *ibsrq,
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dseg = (struct hns_roce_v2_wqe_data_seg *)wqe;
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for (i = 0; i < wr->num_sge; ++i) {
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dseg[i].len = cpu_to_le32(wr->sg_list[i].length);
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dseg[i].lkey = cpu_to_le32(wr->sg_list[i].lkey);
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dseg[i].addr = cpu_to_le64(wr->sg_list[i].addr);
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set_data_seg_v2(dseg, wr->sg_list + i);
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dseg++;
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}
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if (srq->rsv_sge) {
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