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net: phy: micrel: use phy_read_mmd and phy_write_mmd 

This driver implements open-coded versions of phy_read_mmd() and
phy_write_mmd() for KSZ9031. That's not needed, let's use the
phylib functions directly.

This is compile-tested only because I have no such hardware.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Heiner Kallweit 2019-01-16 21:52:22 +01:00 committed by David S. Miller
parent 43deda5408
commit 9b420eff9f
1 changed files with 11 additions and 32 deletions
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43
drivers/net/phy/micrel.c
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@ -426,9 +426,6 @@ static int ksz9021_config_init(struct phy_device *phydev)
return 0;
}
#define MII_KSZ9031RN_MMD_CTRL_REG 0x0d
#define MII_KSZ9031RN_MMD_REGDATA_REG 0x0e
#define OP_DATA 1
#define KSZ9031_PS_TO_REG 60
/* Extended registers */
@ -446,24 +443,6 @@ static int ksz9021_config_init(struct phy_device *phydev)
#define MII_KSZ9031RN_EDPD 0x23
#define MII_KSZ9031RN_EDPD_ENABLE BIT(0)
static int ksz9031_extended_write(struct phy_device *phydev,
u8 mode, u32 dev_addr, u32 regnum, u16 val)
{
phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr);
phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum);
phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr);
return phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, val);
}
static int ksz9031_extended_read(struct phy_device *phydev,
u8 mode, u32 dev_addr, u32 regnum)
{
phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr);
phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum);
phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr);
return phy_read(phydev, MII_KSZ9031RN_MMD_REGDATA_REG);
}
static int ksz9031_of_load_skew_values(struct phy_device *phydev,
const struct device_node *of_node,
u16 reg, size_t field_sz,
@ -484,7 +463,7 @@ static int ksz9031_of_load_skew_values(struct phy_device *phydev,
return 0;
if (matches < numfields)
newval = ksz9031_extended_read(phydev, OP_DATA, 2, reg);
newval = phy_read_mmd(phydev, 2, reg);
else
newval = 0;
@ -498,7 +477,7 @@ static int ksz9031_of_load_skew_values(struct phy_device *phydev,
<< (field_sz * i));
}
return ksz9031_extended_write(phydev, OP_DATA, 2, reg, newval);
return phy_write_mmd(phydev, 2, reg, newval);
}
/* Center KSZ9031RNX FLP timing at 16ms. */
@ -506,13 +485,13 @@ static int ksz9031_center_flp_timing(struct phy_device *phydev)
{
int result;
result = ksz9031_extended_write(phydev, OP_DATA, 0,
MII_KSZ9031RN_FLP_BURST_TX_HI, 0x0006);
result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_HI,
0x0006);
if (result)
return result;
result = ksz9031_extended_write(phydev, OP_DATA, 0,
MII_KSZ9031RN_FLP_BURST_TX_LO, 0x1A80);
result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_LO,
0x1A80);
if (result)
return result;
@ -524,11 +503,11 @@ static int ksz9031_enable_edpd(struct phy_device *phydev)
{
int reg;
reg = ksz9031_extended_read(phydev, OP_DATA, 0x1C, MII_KSZ9031RN_EDPD);
reg = phy_read_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD);
if (reg < 0)
return reg;
return ksz9031_extended_write(phydev, OP_DATA, 0x1C, MII_KSZ9031RN_EDPD,
reg | MII_KSZ9031RN_EDPD_ENABLE);
return phy_write_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD,
reg | MII_KSZ9031RN_EDPD_ENABLE);
}
static int ksz9031_config_init(struct phy_device *phydev)
@ -654,7 +633,7 @@ static int ksz9131_of_load_skew_values(struct phy_device *phydev,
return 0;
if (matches < numfields)
newval = ksz9031_extended_read(phydev, OP_DATA, 2, reg);
newval = phy_read_mmd(phydev, 2, reg);
else
newval = 0;
@ -668,7 +647,7 @@ static int ksz9131_of_load_skew_values(struct phy_device *phydev,
<< (field_sz * i));
}
return ksz9031_extended_write(phydev, OP_DATA, 2, reg, newval);
return phy_write_mmd(phydev, 2, reg, newval);
}
static int ksz9131_config_init(struct phy_device *phydev)