mirror of https://gitee.com/openkylin/linux.git
USB: EHCI: Add bus glue for GRLIB GRUSBHC controller
This patch adds support for the GRLIB GRUSBHC EHCI controller from Aeroflex Gaisler. The controller is typically found on LEON/GRLIB SoCs. Tested on GR-LEON4-ITX with with little endian interface and on LEON3 system on GR-PCI-XC5V development board for big endian controller. Signed-off-by: Jan Andersson <jan@gaisler.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Jan Andersson
Greg Kroah-Hartman
parent
c430131a02
commit
9be0392989
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@ -68,6 +68,7 @@ config USB_ARCH_HAS_EHCI
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default y if PLAT_S5P
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default y if ARCH_MSM
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default y if MICROBLAZE
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default y if SPARC_LEON
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default PCI
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# ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface.
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@ -106,13 +106,13 @@ config USB_EHCI_BIG_ENDIAN_MMIO
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depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || \
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ARCH_IXP4XX || XPS_USB_HCD_XILINX || \
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PPC_MPC512x || CPU_CAVIUM_OCTEON || \
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PMC_MSP)
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PMC_MSP || SPARC_LEON)
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default y
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config USB_EHCI_BIG_ENDIAN_DESC
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bool
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depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX || \
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PPC_MPC512x || PMC_MSP)
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PPC_MPC512x || PMC_MSP || SPARC_LEON)
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default y
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config XPS_USB_HCD_XILINX
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@ -0,0 +1,242 @@
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/*
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* Driver for Aeroflex Gaisler GRLIB GRUSBHC EHCI host controller
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*
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* GRUSBHC is typically found on LEON/GRLIB SoCs
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*
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* (c) Jan Andersson <jan@gaisler.com>
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*
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* Based on ehci-ppc-of.c which is:
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* (c) Valentine Barshak <vbarshak@ru.mvista.com>
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* and in turn based on "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de>
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* and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/signal.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#define GRUSBHC_HCIVERSION 0x0100 /* Known value of cap. reg. HCIVERSION */
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/* called during probe() after chip reset completes */
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static int ehci_grlib_setup(struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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int retval;
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retval = ehci_halt(ehci);
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if (retval)
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return retval;
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retval = ehci_init(hcd);
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if (retval)
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return retval;
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ehci->sbrn = 0x20;
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ehci_port_power(ehci, 1);
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return ehci_reset(ehci);
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}
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static const struct hc_driver ehci_grlib_hc_driver = {
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.description = hcd_name,
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.product_desc = "GRLIB GRUSBHC EHCI",
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.hcd_priv_size = sizeof(struct ehci_hcd),
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/*
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* generic hardware linkage
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*/
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.irq = ehci_irq,
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.flags = HCD_MEMORY | HCD_USB2,
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/*
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* basic lifecycle operations
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*/
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.reset = ehci_grlib_setup,
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.start = ehci_run,
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.stop = ehci_stop,
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.shutdown = ehci_shutdown,
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/*
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* managing i/o requests and associated device resources
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*/
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.urb_enqueue = ehci_urb_enqueue,
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.urb_dequeue = ehci_urb_dequeue,
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.endpoint_disable = ehci_endpoint_disable,
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.endpoint_reset = ehci_endpoint_reset,
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/*
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* scheduling support
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*/
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.get_frame_number = ehci_get_frame,
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/*
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* root hub support
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*/
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.hub_status_data = ehci_hub_status_data,
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.hub_control = ehci_hub_control,
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#ifdef CONFIG_PM
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.bus_suspend = ehci_bus_suspend,
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.bus_resume = ehci_bus_resume,
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#endif
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.relinquish_port = ehci_relinquish_port,
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.port_handed_over = ehci_port_handed_over,
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.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
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};
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static int __devinit ehci_hcd_grlib_probe(struct platform_device *op)
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{
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struct device_node *dn = op->dev.of_node;
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struct usb_hcd *hcd;
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struct ehci_hcd *ehci = NULL;
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struct resource res;
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u32 hc_capbase;
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int irq;
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int rv;
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if (usb_disabled())
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return -ENODEV;
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dev_dbg(&op->dev, "initializing GRUSBHC EHCI USB Controller\n");
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rv = of_address_to_resource(dn, 0, &res);
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if (rv)
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return rv;
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/* usb_create_hcd requires dma_mask != NULL */
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op->dev.dma_mask = &op->dev.coherent_dma_mask;
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hcd = usb_create_hcd(&ehci_grlib_hc_driver, &op->dev,
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"GRUSBHC EHCI USB");
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if (!hcd)
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return -ENOMEM;
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hcd->rsrc_start = res.start;
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hcd->rsrc_len = res.end - res.start + 1;
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if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
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printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__);
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rv = -EBUSY;
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goto err_rmr;
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}
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irq = irq_of_parse_and_map(dn, 0);
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if (irq == NO_IRQ) {
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printk(KERN_ERR "%s: irq_of_parse_and_map failed\n", __FILE__);
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rv = -EBUSY;
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goto err_irq;
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}
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hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
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if (!hcd->regs) {
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printk(KERN_ERR "%s: ioremap failed\n", __FILE__);
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rv = -ENOMEM;
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goto err_ioremap;
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}
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ehci = hcd_to_ehci(hcd);
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ehci->caps = hcd->regs;
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/* determine endianness of this implementation */
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hc_capbase = ehci_readl(ehci, &ehci->caps->hc_capbase);
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if (HC_VERSION(ehci, hc_capbase) != GRUSBHC_HCIVERSION) {
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ehci->big_endian_mmio = 1;
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ehci->big_endian_desc = 1;
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ehci->big_endian_capbase = 1;
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}
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ehci->regs = hcd->regs +
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HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
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/* cache this readonly data; minimize chip reads */
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ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
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rv = usb_add_hcd(hcd, irq, 0);
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if (rv)
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goto err_ehci;
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return 0;
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err_ehci:
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iounmap(hcd->regs);
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err_ioremap:
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irq_dispose_mapping(irq);
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err_irq:
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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err_rmr:
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usb_put_hcd(hcd);
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return rv;
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}
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static int ehci_hcd_grlib_remove(struct platform_device *op)
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{
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struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
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dev_set_drvdata(&op->dev, NULL);
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dev_dbg(&op->dev, "stopping GRLIB GRUSBHC EHCI USB Controller\n");
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usb_remove_hcd(hcd);
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iounmap(hcd->regs);
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irq_dispose_mapping(hcd->irq);
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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usb_put_hcd(hcd);
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return 0;
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}
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static void ehci_hcd_grlib_shutdown(struct platform_device *op)
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{
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struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
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if (hcd->driver->shutdown)
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hcd->driver->shutdown(hcd);
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}
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static const struct of_device_id ehci_hcd_grlib_of_match[] = {
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{
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.name = "GAISLER_EHCI",
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},
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{
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.name = "01_026",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, ehci_hcd_grlib_of_match);
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static struct platform_driver ehci_grlib_driver = {
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.probe = ehci_hcd_grlib_probe,
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.remove = ehci_hcd_grlib_remove,
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.shutdown = ehci_hcd_grlib_shutdown,
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.driver = {
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.name = "grlib-ehci",
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.owner = THIS_MODULE,
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.of_match_table = ehci_hcd_grlib_of_match,
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},
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};
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@ -1275,6 +1275,11 @@ MODULE_LICENSE ("GPL");
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#define PLATFORM_DRIVER ehci_ath79_driver
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#endif
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#ifdef CONFIG_SPARC_LEON
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#include "ehci-grlib.c"
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#define PLATFORM_DRIVER ehci_grlib_driver
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#endif
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#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
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!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
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!defined(XILINX_OF_PLATFORM_DRIVER)
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@ -627,6 +627,9 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
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#if defined(CONFIG_ARM) && defined(CONFIG_ARCH_IXP4XX)
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#define readl_be(addr) __raw_readl((__force unsigned *)addr)
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#define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr)
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#elif defined(CONFIG_SPARC_LEON)
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#define readl_be(addr) __raw_readl(addr)
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#define writel_be(val, addr) __raw_writel(val, addr)
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#endif
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static inline unsigned int ehci_readl(const struct ehci_hcd *ehci,
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