mirror of https://gitee.com/openkylin/linux.git
staging: sm7xx: merge hardware information in smtcfb_info struct
With this patch smtcfb_info becomes the main structure to reach/handle state. fb_info struct links this struct via its private data field. This change improves encapsulation in functions. It reduces the number of arguments used in signatures too. Tested with SM712 Signed-off-by: Javier M. Mellid <jmunhoz@igalia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -40,21 +40,12 @@ struct screen_info smtc_screen_info;
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*/
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struct smtcfb_info {
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struct fb_info fb;
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struct display_switch *dispsw;
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struct pci_dev *dev;
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signed int currcon;
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struct pci_dev *pdev;
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struct {
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u8 red, green, blue;
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} palette[NR_RGB];
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u_int palette_size;
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};
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struct par_info {
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/*
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* Hardware
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*/
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u16 chipID;
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unsigned char __iomem *m_pMMIO;
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char __iomem *m_pLFB;
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@ -97,7 +88,6 @@ char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
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char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */
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static u32 colreg[17];
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static struct par_info hw; /* hardware information */
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static struct fb_var_screeninfo smtcfb_var = {
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.xres = 1024,
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@ -122,32 +112,29 @@ static struct fb_fix_screeninfo smtcfb_fix = {
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.accel = FB_ACCEL_SMI_LYNX,
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};
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static void sm712_set_timing(struct smtcfb_info *sfb,
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struct par_info *ppar_info)
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static void sm712_set_timing(struct smtcfb_info *sfb)
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{
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int i = 0, j = 0;
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u32 m_nScreenStride;
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dev_dbg(&sfb->dev->dev,
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"ppar_info->width=%d ppar_info->height=%d"
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"sfb->fb.var.bits_per_pixel=%d ppar_info->hz=%d\n",
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ppar_info->width, ppar_info->height,
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sfb->fb.var.bits_per_pixel, ppar_info->hz);
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dev_dbg(&sfb->pdev->dev,
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"sfb->width=%d sfb->height=%d "
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"sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
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sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
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for (j = 0; j < numVGAModes; j++) {
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if (VGAMode[j].mmSizeX == ppar_info->width &&
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VGAMode[j].mmSizeY == ppar_info->height &&
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if (VGAMode[j].mmSizeX == sfb->width &&
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VGAMode[j].mmSizeY == sfb->height &&
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VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
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VGAMode[j].hz == ppar_info->hz) {
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VGAMode[j].hz == sfb->hz) {
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dev_dbg(&sfb->dev->dev,
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"VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d"
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dev_dbg(&sfb->pdev->dev,
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"VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d "
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"VGAMode[j].bpp=%d VGAMode[j].hz=%d\n",
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VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
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VGAMode[j].bpp, VGAMode[j].hz);
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dev_dbg(&sfb->dev->dev,
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"VGAMode index=%d\n", j);
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dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j);
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smtc_mmiowb(0x0, 0x3c6);
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@ -208,37 +195,37 @@ static void sm712_set_timing(struct smtcfb_info *sfb,
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smtc_mmiowb(0x67, 0x3c2);
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/* set VPR registers */
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writel(0x0, ppar_info->m_pVPR + 0x0C);
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writel(0x0, ppar_info->m_pVPR + 0x40);
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writel(0x0, sfb->m_pVPR + 0x0C);
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writel(0x0, sfb->m_pVPR + 0x40);
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/* set data width */
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m_nScreenStride =
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(ppar_info->width * sfb->fb.var.bits_per_pixel) / 64;
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(sfb->width * sfb->fb.var.bits_per_pixel) / 64;
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switch (sfb->fb.var.bits_per_pixel) {
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case 8:
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writel(0x0, ppar_info->m_pVPR + 0x0);
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writel(0x0, sfb->m_pVPR + 0x0);
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break;
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case 16:
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writel(0x00020000, ppar_info->m_pVPR + 0x0);
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writel(0x00020000, sfb->m_pVPR + 0x0);
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break;
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case 24:
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writel(0x00040000, ppar_info->m_pVPR + 0x0);
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writel(0x00040000, sfb->m_pVPR + 0x0);
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break;
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case 32:
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writel(0x00030000, ppar_info->m_pVPR + 0x0);
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writel(0x00030000, sfb->m_pVPR + 0x0);
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break;
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}
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writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
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ppar_info->m_pVPR + 0x10);
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sfb->m_pVPR + 0x10);
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}
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static void sm712_setpalette(int regno, unsigned red, unsigned green,
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unsigned blue, struct fb_info *info)
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{
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struct par_info *cur_par = (struct par_info *)info->par;
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struct smtcfb_info *sfb = info->par;
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if (cur_par->BaseAddressInVRAM)
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if (sfb->BaseAddressInVRAM)
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/*
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* second display palette for dual head. Enable CRT RAM, 6-bit
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* RAM
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@ -253,14 +240,13 @@ static void sm712_setpalette(int regno, unsigned red, unsigned green,
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smtc_mmiowb(blue >> 10, dac_val);
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}
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static void smtc_set_timing(struct smtcfb_info *sfb, struct par_info
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*ppar_info)
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static void smtc_set_timing(struct smtcfb_info *sfb)
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{
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switch (ppar_info->chipID) {
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switch (sfb->chipID) {
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case 0x710:
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case 0x712:
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case 0x720:
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sm712_set_timing(sfb, ppar_info);
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sm712_set_timing(sfb);
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break;
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}
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}
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@ -630,10 +616,10 @@ void smtcfb_setmode(struct smtcfb_info *sfb)
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break;
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}
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hw.width = sfb->fb.var.xres;
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hw.height = sfb->fb.var.yres;
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hw.hz = 60;
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smtc_set_timing(sfb, &hw);
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sfb->width = sfb->fb.var.xres;
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sfb->height = sfb->fb.var.yres;
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sfb->hz = 60;
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smtc_set_timing(sfb);
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}
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static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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@ -680,8 +666,7 @@ static struct fb_ops smtcfb_ops = {
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/*
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* Alloc struct smtcfb_info and assign the default value
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*/
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static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev,
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char *name)
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static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev, char *name)
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{
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struct smtcfb_info *sfb;
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@ -690,8 +675,7 @@ static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev,
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if (!sfb)
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return NULL;
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sfb->currcon = -1;
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sfb->dev = dev;
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sfb->pdev = pdev;
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/*** Init sfb->fb with default value ***/
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sfb->fb.flags = FBINFO_FLAG_DEFAULT;
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@ -715,7 +699,9 @@ static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev,
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/* text mode acceleration */
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sfb->fb.var.accel_flags = FB_ACCELF_TEXT;
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sfb->fb.var.vmode = FB_VMODE_NONINTERLACED;
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sfb->fb.par = &hw;
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sfb->fb.par = sfb;
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sfb->fb.pseudo_palette = colreg;
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return sfb;
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@ -842,14 +828,14 @@ static int __devinit smtcfb_pci_probe(struct pci_dev *pdev,
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if (err)
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return err;
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hw.chipID = ent->device;
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sprintf(name, "sm%Xfb", hw.chipID);
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sfb = smtc_alloc_fb_info(pdev, name);
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if (!sfb)
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goto failed_free;
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sfb->chipID = ent->device;
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sprintf(name, "sm%Xfb", sfb->chipID);
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pci_set_drvdata(pdev, sfb);
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sm7xx_init_hw();
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@ -872,29 +858,29 @@ static int __devinit smtcfb_pci_probe(struct pci_dev *pdev,
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#endif
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/* Map address and memory detection */
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pFramebufferPhysical = pci_resource_start(pdev, 0);
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pci_read_config_byte(pdev, PCI_REVISION_ID, &hw.chipRevID);
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pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chipRevID);
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switch (hw.chipID) {
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switch (sfb->chipID) {
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case 0x710:
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case 0x712:
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sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
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sfb->fb.fix.mmio_len = 0x00400000;
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smem_size = SM712_VIDEOMEMORYSIZE;
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#ifdef __BIG_ENDIAN
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hw.m_pLFB = (smtc_VRAMBaseAddress =
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sfb->m_pLFB = (smtc_VRAMBaseAddress =
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ioremap(pFramebufferPhysical, 0x00c00000));
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#else
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hw.m_pLFB = (smtc_VRAMBaseAddress =
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sfb->m_pLFB = (smtc_VRAMBaseAddress =
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ioremap(pFramebufferPhysical, 0x00800000));
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#endif
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hw.m_pMMIO = (smtc_RegBaseAddress =
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sfb->m_pMMIO = (smtc_RegBaseAddress =
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smtc_VRAMBaseAddress + 0x00700000);
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hw.m_pDPR = smtc_VRAMBaseAddress + 0x00408000;
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hw.m_pVPR = hw.m_pLFB + 0x0040c000;
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sfb->m_pDPR = smtc_VRAMBaseAddress + 0x00408000;
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sfb->m_pVPR = sfb->m_pLFB + 0x0040c000;
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#ifdef __BIG_ENDIAN
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if (sfb->fb.var.bits_per_pixel == 32) {
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smtc_VRAMBaseAddress += 0x800000;
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hw.m_pLFB += 0x800000;
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sfb->m_pLFB += 0x800000;
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dev_info(&pdev->dev,
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"smtc_VRAMBaseAddress=%p sfb->m_pLFB=%p",
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smtc_VRAMBaseAddress, sfb->m_pLFB);
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@ -924,12 +910,12 @@ static int __devinit smtcfb_pci_probe(struct pci_dev *pdev,
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sfb->fb.fix.mmio_start = pFramebufferPhysical;
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sfb->fb.fix.mmio_len = 0x00200000;
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smem_size = SM722_VIDEOMEMORYSIZE;
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hw.m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000);
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hw.m_pLFB = (smtc_VRAMBaseAddress =
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hw.m_pDPR + 0x00200000);
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hw.m_pMMIO = (smtc_RegBaseAddress =
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hw.m_pDPR + 0x000c0000);
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hw.m_pVPR = hw.m_pDPR + 0x800;
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sfb->m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000);
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sfb->m_pLFB = (smtc_VRAMBaseAddress =
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sfb->m_pDPR + 0x00200000);
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sfb->m_pMMIO = (smtc_RegBaseAddress =
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sfb->m_pDPR + 0x000c0000);
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sfb->m_pVPR = sfb->m_pDPR + 0x800;
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smtc_seqw(0x62, 0xff);
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smtc_seqw(0x6a, 0x0d);
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@ -954,18 +940,16 @@ static int __devinit smtcfb_pci_probe(struct pci_dev *pdev,
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smtcfb_setmode(sfb);
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/* Primary display starting from 0 position */
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hw.BaseAddressInVRAM = 0;
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sfb->fb.par = &hw;
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sfb->BaseAddressInVRAM = 0;
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err = register_framebuffer(&sfb->fb);
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if (err < 0)
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goto failed;
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dev_info(&pdev->dev,
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"Silicon Motion SM%X Rev%X primary display mode"
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"%dx%d-%d Init Complete.\n", hw.chipID, hw.chipRevID,
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sfb->fb.var.xres, sfb->fb.var.yres,
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sfb->fb.var.bits_per_pixel);
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"Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
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sfb->chipID, sfb->chipRevID, sfb->fb.var.xres,
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sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
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return 0;
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@ -1037,7 +1021,7 @@ static int smtcfb_pci_resume(struct device *device)
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/* reinit hardware */
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sm7xx_init_hw();
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switch (hw.chipID) {
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switch (sfb->chipID) {
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case 0x710:
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case 0x712:
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/* set MCLK = 14.31818 * (0x16 / 0x2) */
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