sfc: Add efx_nic_type operation for register self-test

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ben Hutchings 2009-11-29 03:43:23 +00:00 committed by David S. Miller
parent eb9f6744cb
commit 9bfc4bb1f9
4 changed files with 10 additions and 8 deletions

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@ -2458,7 +2458,7 @@ static bool efx_masked_compare_oword(const efx_oword_t *a, const efx_oword_t *b,
((a->u64[1] ^ b->u64[1]) & mask->u64[1]); ((a->u64[1] ^ b->u64[1]) & mask->u64[1]);
} }
int falcon_test_registers(struct efx_nic *efx) static int falcon_b0_test_registers(struct efx_nic *efx)
{ {
unsigned address = 0, i, j; unsigned address = 0, i, j;
efx_oword_t mask, imask, original, reg, buf; efx_oword_t mask, imask, original, reg, buf;
@ -3327,6 +3327,7 @@ struct efx_nic_type falcon_b0_nic_type = {
.get_wol = falcon_get_wol, .get_wol = falcon_get_wol,
.set_wol = falcon_set_wol, .set_wol = falcon_set_wol,
.resume_wol = efx_port_dummy_op_void, .resume_wol = efx_port_dummy_op_void,
.test_registers = falcon_b0_test_registers,
.default_mac_ops = &falcon_xmac_operations, .default_mac_ops = &falcon_xmac_operations,
.revision = EFX_REV_FALCON_B0, .revision = EFX_REV_FALCON_B0,

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@ -154,7 +154,6 @@ extern int falcon_reset_xaui(struct efx_nic *efx);
struct falcon_nvconfig; struct falcon_nvconfig;
extern int falcon_read_nvram(struct efx_nic *efx, extern int falcon_read_nvram(struct efx_nic *efx,
struct falcon_nvconfig *nvconfig); struct falcon_nvconfig *nvconfig);
extern int falcon_test_registers(struct efx_nic *efx);
/************************************************************************** /**************************************************************************
* *

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@ -864,6 +864,7 @@ static inline const char *efx_dev_name(struct efx_nic *efx)
* @get_wol: Get WoL configuration from driver state * @get_wol: Get WoL configuration from driver state
* @set_wol: Push WoL configuration to the NIC * @set_wol: Push WoL configuration to the NIC
* @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume) * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
* @test_registers: Test read/write functionality of control registers
* @default_mac_ops: efx_mac_operations to set at startup * @default_mac_ops: efx_mac_operations to set at startup
* @revision: Hardware architecture revision * @revision: Hardware architecture revision
* @mem_map_size: Memory BAR mapped size * @mem_map_size: Memory BAR mapped size
@ -902,6 +903,7 @@ struct efx_nic_type {
void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol); void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
int (*set_wol)(struct efx_nic *efx, u32 type); int (*set_wol)(struct efx_nic *efx, u32 type);
void (*resume_wol)(struct efx_nic *efx); void (*resume_wol)(struct efx_nic *efx);
int (*test_registers)(struct efx_nic *efx);
struct efx_mac_operations *default_mac_ops; struct efx_mac_operations *default_mac_ops;
int revision; int revision;

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@ -122,14 +122,14 @@ static int efx_test_nvram(struct efx_nic *efx, struct efx_self_tests *tests)
static int efx_test_chip(struct efx_nic *efx, struct efx_self_tests *tests) static int efx_test_chip(struct efx_nic *efx, struct efx_self_tests *tests)
{ {
int rc; int rc = 0;
/* Not supported on A-series silicon */ /* Test register access */
if (efx_nic_rev(efx) < EFX_REV_FALCON_B0) if (efx->type->test_registers) {
return 0; rc = efx->type->test_registers(efx);
tests->registers = rc ? -1 : 1;
}
rc = falcon_test_registers(efx);
tests->registers = rc ? -1 : 1;
return rc; return rc;
} }