mirror of https://gitee.com/openkylin/linux.git
ARM: tegra: Device tree changes for v5.8-rc1
This contains a bit of cleanup and CPU frequency scaling support for the Tegra30 Beaver board. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl6+pQYTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoR+VD/9wS9fQMI3b56vWJa8EKMiIV6XlvDJ/ HGR0ZOcCH25pHcgMrvg/pAa3TISA2dCGnGxd3Ax+5bU9JvVfC7GujiYwa/IaUkZI 7alUKUe4sTG498hfix2XNDcYcnHm4UnPen2/3ehugRe8BW9v1fnQHwrz5NM/RbzX +EsFA142e74NJ4BcCDsgUHOIU4yWlOVZZi1zP/NbwpNJO4eGV9cXGXVlQfhmtPqZ Gz+fe4kUPgUDdTijng8eRpoJXytmki/C6grL0bITtkQ0G4AZIWd9pBts3KO4m+bf tGuOMWfXBQm0HuiNB+5dMj4Twmj4h+U94SUVDw9hBhnYb0cYGhEdFhwfzCxqr+iC XqY8NsXiKFWnsZUBWDGL5LOIV7qdQnBChizACLLf2qZ5adlRRanPdQRxkFko12pK EG27dhN5YtRR1eRtNMmeEQIWZBVj6V1Vg2Mm5EReHO8r/GJ06Ic3lh4MMnk/LCL5 lYWbrlOTUrJl2LHMDM0N1fAJg97BLr9ni0VX1+E8bb3bQXyiDbzhEV2rLt4adEDF 0NEY12+/g0XKfxZ0QeC0DjyafHk7WmbO5pHr0FsB5ngc9RB8bfR+8yPvR2E0aiRW DuKz6Bp4zXgMLQ7Rk72jU5HVNN7DRGPQ4wN3D9XK9wA1RnFVcspPlWTRMEkdzvrW b+rrQnhnUQ22eg== =55XZ -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.8-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.8-rc1 This contains a bit of cleanup and CPU frequency scaling support for the Tegra30 Beaver board. * tag 'tegra-for-5.8-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: dts: tegra30: beaver: Add CPU Operating Performance Points ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS ARM: tegra: Kill off "simple-panel" compatibles Link: https://lore.kernel.org/r/20200515145311.1580134-11-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
9c1acf5174
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@ -46,8 +46,7 @@ dsi@54300000 {
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avdd-dsi-csi-supply = <&avdd_1v2_reg>;
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avdd-dsi-csi-supply = <&avdd_1v2_reg>;
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panel@0 {
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panel@0 {
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compatible = "panasonic,vvx10f004b00",
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compatible = "panasonic,vvx10f004b00";
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"simple-panel";
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reg = <0>;
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reg = <0>;
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power-supply = <&avdd_lcd_reg>;
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power-supply = <&avdd_lcd_reg>;
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@ -1087,7 +1087,7 @@ power {
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};
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};
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panel: panel {
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panel: panel {
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compatible = "lg,lp129qe", "simple-panel";
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compatible = "lg,lp129qe";
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backlight = <&backlight>;
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backlight = <&backlight>;
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ddc-i2c-bus = <&dpaux>;
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ddc-i2c-bus = <&dpaux>;
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@ -223,7 +223,7 @@ panel: panel {
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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*/
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*/
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compatible = "edt,et057090dhu", "simple-panel";
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compatible = "edt,et057090dhu";
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backlight = <&backlight>;
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backlight = <&backlight>;
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power-supply = <®_3v3>;
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power-supply = <®_3v3>;
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};
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};
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@ -205,7 +205,7 @@ panel: panel {
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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*/
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*/
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compatible = "edt,et057090dhu", "simple-panel";
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compatible = "edt,et057090dhu";
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backlight = <&backlight>;
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backlight = <&backlight>;
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power-supply = <®_3v3>;
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power-supply = <®_3v3>;
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};
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};
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@ -665,7 +665,7 @@ power {
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};
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};
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panel: panel {
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panel: panel {
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compatible = "auo,b101aw03", "simple-panel";
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compatible = "auo,b101aw03";
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power-supply = <&vdd_pnl_reg>;
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power-supply = <&vdd_pnl_reg>;
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enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
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enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
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@ -57,7 +57,7 @@ backlight: backlight {
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};
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};
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panel: panel {
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panel: panel {
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compatible = "innolux,n156bge-l21", "simple-panel";
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compatible = "innolux,n156bge-l21";
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power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
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power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
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enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
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enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
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@ -604,7 +604,7 @@ wifi {
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};
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};
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panel: panel {
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panel: panel {
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compatible = "samsung,ltn101nt05", "simple-panel";
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compatible = "samsung,ltn101nt05";
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ddc-i2c-bus = <&lvds_ddc>;
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ddc-i2c-bus = <&lvds_ddc>;
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power-supply = <&vdd_pnl_reg>;
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power-supply = <&vdd_pnl_reg>;
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@ -826,7 +826,7 @@ lid {
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};
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};
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panel: panel {
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panel: panel {
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compatible = "chunghwa,claa101wa01a", "simple-panel";
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compatible = "chunghwa,claa101wa01a";
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power-supply = <&vdd_pnl_reg>;
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power-supply = <&vdd_pnl_reg>;
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enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
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enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
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@ -611,7 +611,7 @@ power {
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};
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};
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panel: panel {
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panel: panel {
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compatible = "chunghwa,claa101wa01a", "simple-panel";
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compatible = "chunghwa,claa101wa01a";
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power-supply = <&vdd_pnl_reg>;
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power-supply = <&vdd_pnl_reg>;
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enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
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enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
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@ -195,7 +195,7 @@ panel: panel {
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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*/
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*/
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compatible = "edt,et057090dhu", "simple-panel";
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compatible = "edt,et057090dhu";
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backlight = <&backlight>;
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backlight = <&backlight>;
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power-supply = <®_3v3>;
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power-supply = <®_3v3>;
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};
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};
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@ -196,7 +196,7 @@ panel: panel {
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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*/
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*/
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compatible = "edt,et057090dhu", "simple-panel";
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compatible = "edt,et057090dhu";
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backlight = <&backlight>;
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backlight = <&backlight>;
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power-supply = <®_3v3>;
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power-supply = <®_3v3>;
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};
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};
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@ -2,6 +2,8 @@
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/dts-v1/;
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/dts-v1/;
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#include "tegra30.dtsi"
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#include "tegra30.dtsi"
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#include "tegra30-cpu-opp.dtsi"
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#include "tegra30-cpu-opp-microvolt.dtsi"
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/ {
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/ {
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model = "NVIDIA Tegra30 Beaver evaluation board";
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model = "NVIDIA Tegra30 Beaver evaluation board";
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@ -1806,9 +1808,14 @@ vdd2_reg: vdd2 {
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vddctrl_reg: vddctrl {
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vddctrl_reg: vddctrl {
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regulator-name = "vdd_cpu,vdd_sys";
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regulator-name = "vdd_cpu,vdd_sys";
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regulator-min-microvolt = <1000000>;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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regulator-max-microvolt = <1250000>;
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regulator-coupled-with = <&core_vdd_reg>;
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regulator-coupled-max-spread = <300000>;
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regulator-max-step-microvolt = <100000>;
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regulator-always-on;
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regulator-always-on;
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nvidia,tegra-cpu-regulator;
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};
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};
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vio_reg: vio {
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vio_reg: vio {
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@ -1868,17 +1875,22 @@ ldo8_reg: ldo8 {
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};
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};
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};
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};
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tps62361@60 {
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core_vdd_reg: tps62361@60 {
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compatible = "ti,tps62361";
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compatible = "ti,tps62361";
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reg = <0x60>;
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reg = <0x60>;
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regulator-name = "tps62361-vout";
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regulator-name = "tps62361-vout";
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regulator-min-microvolt = <500000>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-coupled-with = <&vddctrl_reg>;
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regulator-coupled-max-spread = <300000>;
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regulator-max-step-microvolt = <100000>;
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regulator-boot-on;
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regulator-boot-on;
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regulator-always-on;
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regulator-always-on;
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ti,vsel0-state-high;
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ti,vsel0-state-high;
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ti,vsel1-state-high;
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ti,vsel1-state-high;
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nvidia,tegra-core-regulator;
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};
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};
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};
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};
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@ -2120,4 +2132,26 @@ sound {
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assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
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<&tegra_car TEGRA30_CLK_EXTERN1>;
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<&tegra_car TEGRA30_CLK_EXTERN1>;
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};
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};
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cpus {
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cpu0: cpu@0 {
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cpu-supply = <&vddctrl_reg>;
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operating-points-v2 = <&cpu0_opp_table>;
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};
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cpu@1 {
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cpu-supply = <&vddctrl_reg>;
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operating-points-v2 = <&cpu0_opp_table>;
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};
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cpu@2 {
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cpu-supply = <&vddctrl_reg>;
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operating-points-v2 = <&cpu0_opp_table>;
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};
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cpu@3 {
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cpu-supply = <&vddctrl_reg>;
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operating-points-v2 = <&cpu0_opp_table>;
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};
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};
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};
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};
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@ -432,7 +432,7 @@ clk32k_in: clock@0 {
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};
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};
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panel: panel {
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panel: panel {
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compatible = "chunghwa,claa101wb01", "simple-panel";
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compatible = "chunghwa,claa101wb01";
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ddc-i2c-bus = <&panelddc>;
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ddc-i2c-bus = <&panelddc>;
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power-supply = <&vdd_pnl1_reg>;
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power-supply = <&vdd_pnl1_reg>;
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@ -159,7 +159,7 @@ panel: panel {
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et057090dhu: EDT 5.7" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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* edt,et070080dh6: EDT 7.0" LCD TFT
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*/
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*/
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compatible = "edt,et057090dhu", "simple-panel";
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compatible = "edt,et057090dhu";
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backlight = <&backlight>;
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backlight = <&backlight>;
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power-supply = <®_3v3>;
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power-supply = <®_3v3>;
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};
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};
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