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drm/ttm: remove available_caching 

Instead of letting TTM make an educated guess based on
some mask all drivers should just specify what caching
they want for their CPU mappings.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/390207/
This commit is contained in:
Christian König 2020-09-11 16:01:21 +02:00
parent 5839172f09
commit 9c3006a4cc
15 changed files with 11 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
View File

@ -95,7 +95,6 @@ int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size)
man->use_tt = true;
man->func = &amdgpu_gtt_mgr_func;
man->available_caching = TTM_PL_MASK_CACHING;
ttm_resource_manager_init(man, gtt_size >> PAGE_SHIFT);

1
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
View File

@ -68,7 +68,6 @@ static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,
uint64_t size)
{
return ttm_range_man_init(&adev->mman.bdev, type,
TTM_PL_FLAG_UNCACHED,
false, size >> PAGE_SHIFT);
}

2
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
View File

@ -179,8 +179,6 @@ int amdgpu_vram_mgr_init(struct amdgpu_device *adev)
struct ttm_resource_manager *man = &mgr->manager;
int ret;
man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
ttm_resource_manager_init(man, adev->gmc.real_vram_size >> PAGE_SHIFT);
man->func = &amdgpu_vram_mgr_func;

1
drivers/gpu/drm/drm_gem_vram_helper.c
View File

@ -1057,7 +1057,6 @@ static int drm_vram_mm_init(struct drm_vram_mm *vmm, struct drm_device *dev,
return ret;
ret = ttm_range_man_init(&vmm->bdev, TTM_PL_VRAM,
TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC,
false, vram_size >> PAGE_SHIFT);
if (ret)
return ret;

9
drivers/gpu/drm/nouveau/nouveau_ttm.c
View File

@ -200,7 +200,6 @@ nouveau_ttm_init_vram(struct nouveau_drm *drm)
if (!man)
return -ENOMEM;
man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
man->func = &nouveau_vram_manager;
ttm_resource_manager_init(man,
@ -209,9 +208,7 @@ nouveau_ttm_init_vram(struct nouveau_drm *drm)
ttm_resource_manager_set_used(man, true);
return 0;
} else {
return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_VRAM,
TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC,
false,
return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_VRAM, false,
drm->gem.vram_available >> PAGE_SHIFT);
}
}
@ -243,8 +240,7 @@ nouveau_ttm_init_gtt(struct nouveau_drm *drm)
else if (!drm->agp.bridge)
func = &nv04_gart_manager;
else
return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_TT,
TTM_PL_MASK_CACHING, true,
return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_TT, true,
size_pages);
man = kzalloc(sizeof(*man), GFP_KERNEL);
@ -252,7 +248,6 @@ nouveau_ttm_init_gtt(struct nouveau_drm *drm)
return -ENOMEM;
man->func = func;
man->available_caching = TTM_PL_MASK_CACHING;
man->use_tt = true;
ttm_resource_manager_init(man, size_pages);
ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_TT, man);

3
drivers/gpu/drm/qxl/qxl_ttm.c
View File

@ -202,8 +202,7 @@ static int qxl_ttm_init_mem_type(struct qxl_device *qdev,
unsigned int type,
uint64_t size)
{
return ttm_range_man_init(&qdev->mman.bdev, type, TTM_PL_MASK_CACHING,
false, size);
return ttm_range_man_init(&qdev->mman.bdev, type, false, size);
}
int qxl_ttm_init(struct qxl_device *qdev)

2
drivers/gpu/drm/radeon/radeon_ttm.c
View File

@ -69,14 +69,12 @@ struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
static int radeon_ttm_init_vram(struct radeon_device *rdev)
{
return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC,
false, rdev->mc.real_vram_size >> PAGE_SHIFT);
}
static int radeon_ttm_init_gtt(struct radeon_device *rdev)
{
return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
TTM_PL_MASK_CACHING,
true, rdev->mc.gtt_size >> PAGE_SHIFT);
}

8
drivers/gpu/drm/ttm/ttm_bo.c
View File

@ -910,11 +910,8 @@ static int ttm_bo_mem_placement(struct ttm_buffer_object *bo,
if (!man || !ttm_resource_manager_used(man))
return -EBUSY;
if ((place->flags & man->available_caching) == 0)
return -EBUSY;
cur_flags = place->flags & man->available_caching;
cur_flags = ttm_bo_select_caching(man, bo->mem.placement, cur_flags);
cur_flags = ttm_bo_select_caching(man, bo->mem.placement,
place->flags);
cur_flags |= place->flags & ~TTM_PL_MASK_CACHING;
mem->mem_type = place->mem_type;
@ -1432,7 +1429,6 @@ static void ttm_bo_init_sysman(struct ttm_bo_device *bdev)
* Other types need to be driver / IOCTL initialized.
*/
man->use_tt = true;
man->available_caching = TTM_PL_MASK_CACHING;
ttm_resource_manager_init(man, 0);
ttm_set_driver_manager(bdev, TTM_PL_SYSTEM, man);

5
drivers/gpu/drm/ttm/ttm_range_manager.c
View File

@ -113,9 +113,7 @@ static void ttm_range_man_free(struct ttm_resource_manager *man,
static const struct ttm_resource_manager_func ttm_range_manager_func;
int ttm_range_man_init(struct ttm_bo_device *bdev,
unsigned type,
uint32_t available_caching,
bool use_tt,
unsigned type, bool use_tt,
unsigned long p_size)
{
struct ttm_resource_manager *man;
@ -126,7 +124,6 @@ int ttm_range_man_init(struct ttm_bo_device *bdev,
return -ENOMEM;
man = &rman->manager;
man->available_caching = available_caching;
man->use_tt = use_tt;
man->func = &ttm_range_manager_func;

1
drivers/gpu/drm/ttm/ttm_resource.c
View File

@ -140,7 +140,6 @@ void ttm_resource_manager_debug(struct ttm_resource_manager *man,
drm_printf(p, " use_type: %d\n", man->use_type);
drm_printf(p, " use_tt: %d\n", man->use_tt);
drm_printf(p, " size: %llu\n", man->size);
drm_printf(p, " available_caching: 0x%08X\n", man->available_caching);
if (man->func && man->func->debug)
(*man->func->debug)(man, p);
}

5
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
View File

@ -626,8 +626,7 @@ static int vmw_vram_manager_init(struct vmw_private *dev_priv)
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
ret = vmw_thp_init(dev_priv);
#else
ret = ttm_range_man_init(&dev_priv->bdev, TTM_PL_VRAM,
TTM_PL_FLAG_CACHED, false,
ret = ttm_range_man_init(&dev_priv->bdev, TTM_PL_VRAM, false,
dev_priv->vram_size >> PAGE_SHIFT);
#endif
ttm_resource_manager_set_used(ttm_manager_type(&dev_priv->bdev, TTM_PL_VRAM), false);
@ -882,8 +881,6 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
DRM_ERROR("Failed initializing TTM buffer object driver.\n");
goto out_no_bdev;
}
ttm_manager_type(&dev_priv->bdev, TTM_PL_SYSTEM)->available_caching =
TTM_PL_FLAG_CACHED;
/*
* Enable VRAM, but initially don't use it until SVGA is enabled and

1
drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c
View File

@ -112,7 +112,6 @@ int vmw_gmrid_man_init(struct vmw_private *dev_priv, int type)
man = &gman->manager;
man->func = &vmw_gmrid_manager_func;
man->available_caching = TTM_PL_FLAG_CACHED;
/* TODO: This is most likely not correct */
man->use_tt = true;
ttm_resource_manager_init(man, 0);

10
drivers/gpu/drm/vmwgfx/vmwgfx_thp.c
View File

@ -123,24 +123,20 @@ static void vmw_thp_put_node(struct ttm_resource_manager *man,
int vmw_thp_init(struct vmw_private *dev_priv)
{
struct ttm_resource_manager *man;
struct vmw_thp_manager *rman;
rman = kzalloc(sizeof(*rman), GFP_KERNEL);
if (!rman)
return -ENOMEM;
man = &rman->manager;
man->available_caching = TTM_PL_FLAG_CACHED;
ttm_resource_manager_init(man,
ttm_resource_manager_init(&rman->manager,
dev_priv->vram_size >> PAGE_SHIFT);
drm_mm_init(&rman->mm, 0, man->size);
drm_mm_init(&rman->mm, 0, rman->manager.size);
spin_lock_init(&rman->lock);
ttm_set_driver_manager(&dev_priv->bdev, TTM_PL_VRAM, &rman->manager);
ttm_resource_manager_set_used(man, true);
ttm_resource_manager_set_used(&rman->manager, true);
return 0;
}

5
include/drm/ttm/ttm_bo_driver.h
View File

@ -689,7 +689,6 @@ pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t tmp);
*
* @bdev: ttm device
* @type: memory manager type
* @available_caching: TTM_PL_FLAG_* for allowed caching modes
* @use_tt: if the memory manager uses tt
* @p_size: size of area to be managed in pages.
*
@ -697,9 +696,7 @@ pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t tmp);
* The range manager is installed for this device in the type slot.
*/
int ttm_range_man_init(struct ttm_bo_device *bdev,
unsigned type,
uint32_t available_caching,
bool use_tt,
unsigned type, bool use_tt,
unsigned long p_size);
/**

3
include/drm/ttm/ttm_resource.h
View File

@ -108,8 +108,6 @@ struct ttm_resource_manager_func {
* @gpu_offset: If used, the GPU offset of the first managed page of
* fixed memory or the first managed location in an aperture.
* @size: Size of the managed region.
* @available_caching: A mask of available caching types, TTM_PL_FLAG_XX,
* as defined in ttm_placement_common.h
* @func: structure pointer implementing the range manager. See above
* @move_lock: lock for move fence
* static information. bdev::driver::io_mem_free is never used.
@ -125,7 +123,6 @@ struct ttm_resource_manager {
bool use_type;
bool use_tt;
uint64_t size;
uint32_t available_caching;
const struct ttm_resource_manager_func *func;
spinlock_t move_lock;