ARM: SoC fixes for v5.10, part 2

Around one third of the fixes this time are for dts files that list
 their ethernet controller as using 'phy-mode="rgmii"' but are changed to
 'phy-mode="rgmii-id"' now, because the PHY drivers (realtek, ksz9031,
 dp83867, ...) now configure the internal delay based on that when they
 used to stay on the hardware default.
 
 The long story is archived at
 https://lore.kernel.org/netdev/CAMj1kXEEF_Un-4NTaD5iUN0NoZYaJQn-rPediX0S6oRiuVuW-A@mail.gmail.com/
 I was trying to hold off on the bugfixes until there was a solution that
 would avoid breaking all boards, but that does not seem to be happening
 any time soon, so I am now sending the correct version of the dts files to
 ensure that at least these machines can use their network devices again.
 
 The other changes this time are:
 
 - Updating the MAINTAINER lists for Allwinner and Samsung SoCs
 
 - Multiple i.MX8MN machines get updates for their CPU
   operating points to match the data sheet
 
 - A revert for a dts patch that caused a regression in USB
   support on Odroid U3
 
 - Two fixes for the AMD Tee driver, addressing a memory leak
   and missing locking
 
 - Mark the network subsystem on qoriq-fman3 as cache coherent
   for correctness as better performance.
 
 - Minor dts fixes elsewhere, addressing dtc warnings and similar
   problems
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl+yqIMACgkQmmx57+YA
 GNniQxAAnv8RAPMt8Jv4tyA0RshkD5+6JtgD6KfYccbI5Df+1O3YKJm90SA4Tpwg
 03GHpAsgIs9SYNP7gSs9HPYCOJwC4rmgmfbnbB4Ezpr+oe+w6C8FI7160BBgb4f8
 3/0LC6YyF48SPJ40lF/GOnTLbD5hxGw08oHCh/oL+b+bwn21JZoXAtkloCz8o6Ax
 u98G5MAaJhoTFaE3jq+8F1t6PNJ518HTulzod7uLAjn4iQtAmE96J7q9ncwcGu6a
 HNNcAGuz7X5QfEwWuAJai8eWvtMyGLvB5x1LXjjCNKgIqG+cD1tqpQ3FMedi36fg
 N+fxMxTJKuvBaQ83h/yyNk4/W3h6ddTbuEH0s320xSP5eiZ4r+/2Ry3WPHxHR3Rq
 YYDFbN6I19pQmgedJhgEmUEJXMcyId4SqN85l+uB58lOzu4zGf4WwVd+CBnEoIu3
 wMGHbwruP1t+4hvZjiga53iOzWTR2EzTYkKxfDrV3mPZY6gmov5Xjb0JZNl164WF
 0IJEa61HKf/ueJ5UNwWXpObNyD9rD2Ucugvok/KC1s06NFKjebGK4JhwChxMN0Sk
 baynLGSDe8utENrYgW+KmgZTQHTEICimT5ogW7H+W3trXqxvTKpwCsv5zZM0e238
 vULK/YGZLQZaZrxsCG2WylL6SlJQfptMy8wzOoKmbgTOkcsBasA=
 =Qgm/
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-fixes-v5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Around one third of the fixes this time are for dts files that list
  their ethernet controller as using 'phy-mode="rgmii"' but are changed
  to 'phy-mode="rgmii-id"' now, because the PHY drivers (realtek,
  ksz9031, dp83867, ...) now configure the internal delay based on that
  when they used to stay on the hardware default.

  The long story is archived at

    https://lore.kernel.org/netdev/CAMj1kXEEF_Un-4NTaD5iUN0NoZYaJQn-rPediX0S6oRiuVuW-A@mail.gmail.com/

  I was trying to hold off on the bugfixes until there was a solution
  that would avoid breaking all boards, but that does not seem to be
  happening any time soon, so I am now sending the correct version of
  the dts files to ensure that at least these machines can use their
  network devices again.

  The other changes this time are:

   - Updating the MAINTAINER lists for Allwinner and Samsung SoCs

   - Multiple i.MX8MN machines get updates for their CPU operating
     points to match the data sheet

   - A revert for a dts patch that caused a regression in USB support on
     Odroid U3

   - Two fixes for the AMD Tee driver, addressing a memory leak and
     missing locking

   - Mark the network subsystem on qoriq-fman3 as cache coherent for
     correctness as better performance.

   - Minor dts fixes elsewhere, addressing dtc warnings and similar
     problems"

* tag 'arm-soc-fixes-v5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits)
  ARM: dts: exynos: revert "add input clock to CMU in Exynos4412 Odroid"
  ARM: dts: imx50-evk: Fix the chip select 1 IOMUX
  arm64: dts: imx8mm: fix voltage for 1.6GHz CPU operating point
  ARM: dts: stm32: Keep VDDA LDO1 always on on DHCOM
  ARM: dts: stm32: Enable thermal sensor support on stm32mp15xx-dhcor
  ARM: dts: stm32: Define VIO regulator supply on DHCOM
  ARM: dts: stm32: Fix LED5 on STM32MP1 DHCOM PDK2
  ARM: dts: stm32: Fix TA3-GPIO-C key on STM32MP1 DHCOM PDK2
  arm64: dts: renesas: r8a774e1: Add missing audio_clk_b
  tee: amdtee: synchronize access to shm list
  tee: amdtee: fix memory leak due to reset of global shm list
  arm64: dts: agilex/stratix10: Fix qspi node compatible
  ARM: dts: imx6q-prti6q: fix PHY address
  ARM: dts: vf610-zii-dev-rev-b: Fix MDIO over clocking
  arm: dts: imx6qdl-udoo: fix rgmii phy-mode for ksz9031 phy
  arm64: dts imx8mn: Remove non-existent USB OTG2
  arm64: dts: imx8mm-beacon-som: Fix Choppy BT audio
  arm64: dts: fsl: DPAA FMan DMA operations are coherent
  arm64: dts: fsl: fix endianness issue of rcpm
  arm64: dts: imx8mn-evk: fix missing PMIC's interrupt line pull-up
  ...
This commit is contained in:
Linus Torvalds 2020-11-16 15:07:08 -08:00
commit 9c87c9f412
48 changed files with 128 additions and 139 deletions

10
CREDITS
View File

@ -849,6 +849,12 @@ D: trivial hack to add variable address length routing to Rose.
D: AX25-HOWTO, HAM-HOWTO, IPX-HOWTO, NET-2-HOWTO
D: ax25-utils maintainer.
N: Kamil Debski
E: kamil@wypas.org
D: Samsung S5P 2D graphics acceleration and Multi Format Codec drivers
D: Samsung USB2 phy drivers
D: PWM fan driver
N: Helge Deller
E: deller@gmx.de
W: http://www.parisc-linux.org/
@ -2852,6 +2858,10 @@ D: IPX development and support
N: Venkatesh Pallipadi (Venki)
D: x86/HPET
N: Kyungmin Park
E: kyungmin.park@samsung.com
D: Samsung S5Pv210 and Exynos4210 mobile platforms
N: David Parsons
E: orc@pell.chi.il.us
D: improved memory detection code.

View File

@ -1546,6 +1546,7 @@ F: drivers/clk/sunxi/
ARM/Allwinner sunXi SoC support
M: Maxime Ripard <mripard@kernel.org>
M: Chen-Yu Tsai <wens@csie.org>
R: Jernej Skrabec <jernej.skrabec@siol.net>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
@ -2374,7 +2375,7 @@ F: drivers/i2c/busses/i2c-rk3x.c
F: sound/soc/rockchip/
N: rockchip
ARM/SAMSUNG EXYNOS ARM ARCHITECTURES
ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES
M: Krzysztof Kozlowski <krzk@kernel.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-samsung-soc@vger.kernel.org
@ -2403,15 +2404,7 @@ N: s3c2410
N: s3c64xx
N: s5pv210
ARM/SAMSUNG MOBILE MACHINE SUPPORT
M: Kyungmin Park <kyungmin.park@samsung.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-s5pv210/
ARM/SAMSUNG S5P SERIES 2D GRAPHICS ACCELERATION (G2D) SUPPORT
M: Kyungmin Park <kyungmin.park@samsung.com>
M: Kamil Debski <kamil@wypas.org>
M: Andrzej Hajda <a.hajda@samsung.com>
L: linux-arm-kernel@lists.infradead.org
L: linux-media@vger.kernel.org
@ -2436,9 +2429,6 @@ S: Maintained
F: drivers/media/platform/s5p-jpeg/
ARM/SAMSUNG S5P SERIES Multi Format Codec (MFC) SUPPORT
M: Kyungmin Park <kyungmin.park@samsung.com>
M: Kamil Debski <kamil@wypas.org>
M: Jeongtae Park <jtp.park@samsung.com>
M: Andrzej Hajda <a.hajda@samsung.com>
L: linux-arm-kernel@lists.infradead.org
L: linux-media@vger.kernel.org
@ -14211,7 +14201,6 @@ F: drivers/media/usb/pwc/*
F: include/trace/events/pwc.h
PWM FAN DRIVER
M: Kamil Debski <kamil@wypas.org>
M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
L: linux-hwmon@vger.kernel.org
S: Supported
@ -15425,14 +15414,12 @@ F: Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml
F: drivers/nfc/s3fwrn5
SAMSUNG S5C73M3 CAMERA DRIVER
M: Kyungmin Park <kyungmin.park@samsung.com>
M: Andrzej Hajda <a.hajda@samsung.com>
L: linux-media@vger.kernel.org
S: Supported
F: drivers/media/i2c/s5c73m3/*
SAMSUNG S5K5BAF CAMERA DRIVER
M: Kyungmin Park <kyungmin.park@samsung.com>
M: Andrzej Hajda <a.hajda@samsung.com>
L: linux-media@vger.kernel.org
S: Supported
@ -15450,7 +15437,6 @@ F: Documentation/devicetree/bindings/crypto/samsung-sss.yaml
F: drivers/crypto/s5p-sss.c
SAMSUNG S5P/EXYNOS4 SOC SERIES CAMERA SUBSYSTEM DRIVERS
M: Kyungmin Park <kyungmin.park@samsung.com>
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
L: linux-media@vger.kernel.org
S: Supported
@ -15498,7 +15484,6 @@ T: git https://github.com/lmajewski/linux-samsung-thermal.git
F: drivers/thermal/samsung/
SAMSUNG USB2 PHY DRIVER
M: Kamil Debski <kamil@wypas.org>
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
L: linux-kernel@vger.kernel.org
S: Supported

View File

@ -122,7 +122,6 @@ &camera {
};
&clock {
clocks = <&clock CLK_XUSBXTI>;
assigned-clocks = <&clock CLK_FOUT_EPLL>;
assigned-clock-rates = <45158401>;
};

View File

@ -59,7 +59,7 @@ MX50_PAD_CSPI_SCLK__CSPI_SCLK 0x00
MX50_PAD_CSPI_MISO__CSPI_MISO 0x00
MX50_PAD_CSPI_MOSI__CSPI_MOSI 0x00
MX50_PAD_CSPI_SS0__GPIO4_11 0xc4
MX50_PAD_ECSPI1_MOSI__CSPI_SS1 0xf4
MX50_PAD_ECSPI1_MOSI__GPIO4_13 0x84
>;
};

View File

@ -213,8 +213,8 @@ mdio {
#size-cells = <0>;
/* Microchip KSZ9031RNX PHY */
rgmii_phy: ethernet-phy@4 {
reg = <4>;
rgmii_phy: ethernet-phy@0 {
reg = <0>;
interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;

View File

@ -98,7 +98,7 @@ sound {
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -46,6 +46,16 @@ button-0 {
linux,code = <KEY_A>;
gpios = <&gpiof 3 GPIO_ACTIVE_LOW>;
};
/*
* The EXTi IRQ line 0 is shared with PMIC,
* so mark this as polled GPIO key.
*/
button-2 {
label = "TA3-GPIO-C";
linux,code = <KEY_C>;
gpios = <&gpiog 0 GPIO_ACTIVE_LOW>;
};
};
gpio-keys {
@ -59,13 +69,6 @@ button-1 {
wakeup-source;
};
button-2 {
label = "TA3-GPIO-C";
linux,code = <KEY_C>;
gpios = <&gpioi 11 GPIO_ACTIVE_LOW>;
wakeup-source;
};
button-3 {
label = "TA4-GPIO-D";
linux,code = <KEY_D>;
@ -79,7 +82,7 @@ led {
led-0 {
label = "green:led5";
gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>;
default-state = "off";
};

View File

@ -68,6 +68,7 @@ ethernet_vio: vioregulator {
gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd>;
};
};
@ -202,6 +203,7 @@ v3v3: buck4 {
vdda: ldo1 {
regulator-name = "vdda";
regulator-always-on;
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
interrupts = <IT_CURLIM_LDO1 0>;

View File

@ -21,6 +21,10 @@ memory@c0000000 {
};
};
&dts {
status = "okay";
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins_a>;

View File

@ -154,7 +154,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -130,7 +130,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};

View File

@ -151,7 +151,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -131,7 +131,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_sw>;
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
allwinner,rx-delay-ps = <700>;
allwinner,tx-delay-ps = <700>;
status = "okay";

View File

@ -183,7 +183,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_dldo4>;
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -53,11 +53,6 @@ aliases {
};
};
&emac {
/* LEDs changed to active high on the plus */
/delete-property/ allwinner,leds-active-low;
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;

View File

@ -67,7 +67,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -129,7 +129,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-supply = <&reg_dc1sw>;
status = "okay";
};

View File

@ -129,7 +129,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-supply = <&reg_cldo1>;
status = "okay";
};

View File

@ -124,7 +124,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-supply = <&reg_cldo1>;
status = "okay";
};

View File

@ -126,7 +126,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -406,6 +406,9 @@ i2c@4 {
};
};
&mdio1 {
clock-frequency = <5000000>;
};
&iomuxc {
pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 {

View File

@ -105,7 +105,7 @@ &ehci1 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dc1sw>;
status = "okay";

View File

@ -120,7 +120,7 @@ &ehci1 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_gmac_3v3>;
status = "okay";

View File

@ -13,7 +13,7 @@ / {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-mode = "rgmii-txid";
phy-handle = <&ext_rgmii_phy>;
status = "okay";
};

View File

@ -122,9 +122,6 @@ &csi {
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
csi_ep: endpoint {
remote-endpoint = <&ov5640_ep>;
bus-width = <8>;

View File

@ -36,7 +36,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
/delete-property/ allwinner,leds-active-low;
status = "okay";
};

View File

@ -123,7 +123,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -124,7 +124,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
status = "okay";
};

View File

@ -97,7 +97,7 @@ &ehci0 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&ext_rgmii_pins>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_aldo2>;
status = "okay";

View File

@ -100,7 +100,7 @@ &ehci3 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&ext_rgmii_pins>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_gmac_3v3>;
allwinner,rx-delay-ps = <200>;

View File

@ -159,7 +159,7 @@ &qspi {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00a";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@ -192,7 +192,7 @@ &qspi {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00a";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

View File

@ -1012,6 +1012,7 @@ rcpm: power-controller@1e34040 {
compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1e34040 0x0 0x1c>;
#fsl,rcpm-wakeup-cells = <7>;
little-endian;
};
ftm_alarm0: timer@2800000 {

View File

@ -805,6 +805,7 @@ rcpm: power-controller@1e34040 {
compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1e34040 0x0 0x18>;
#fsl,rcpm-wakeup-cells = <6>;
little-endian;
};
ftm_alarm0: timer@2800000 {

View File

@ -892,6 +892,7 @@ rcpm: power-controller@1e34040 {
compatible = "fsl,ls208xa-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1e34040 0x0 0x18>;
#fsl,rcpm-wakeup-cells = <6>;
little-endian;
};
ftm_alarm0: timer@2800000 {

View File

@ -72,6 +72,7 @@ &i2c1 {
pmic@4b {
compatible = "rohm,bd71847";
reg = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
@ -210,6 +211,7 @@ bluetooth {
host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
clocks = <&osc_32k>;
max-speed = <4000000>;
clock-names = "extclk";
};
};

View File

@ -121,6 +121,7 @@ &i2c1 {
pmic@4b {
compatible = "rohm,bd71847";
reg = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

View File

@ -135,13 +135,10 @@ &i2c1 {
pmic@4b {
compatible = "rohm,bd71847";
reg = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio2>;
/*
* The interrupt is not correct. It should be level low,
* however with internal pull up this causes IRQ storm.
*/
interrupts = <8 IRQ_TYPE_EDGE_RISING>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
rohm,reset-snvs-powered;
#clock-cells = <0>;
@ -398,7 +395,7 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x41
MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141
>;
};

View File

@ -129,7 +129,7 @@ opp-1200000000 {
opp-1600000000 {
opp-hz = /bits/ 64 <1600000000>;
opp-microvolt = <900000>;
opp-microvolt = <950000>;
opp-supported-hw = <0xc>, <0x7>;
clock-latency-ns = <150000>;
opp-suspend;

View File

@ -53,6 +53,7 @@ &i2c1 {
pmic@4b {
compatible = "rohm,bd71847";
reg = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

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@ -18,6 +18,7 @@ &i2c1 {
pmic: pmic@25 {
compatible = "nxp,pca9450b";
reg = <0x25>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;

View File

@ -116,13 +116,10 @@ &i2c1 {
pmic@4b {
compatible = "rohm,bd71847";
reg = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio2>;
/*
* The interrupt is not correct. It should be level low,
* however with internal pull up this causes IRQ storm.
*/
interrupts = <8 IRQ_TYPE_EDGE_RISING>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
rohm,reset-snvs-powered;
regulators {
@ -388,7 +385,7 @@ MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x101
MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141
>;
};

View File

@ -790,28 +790,6 @@ usbmisc1: usbmisc@32e40200 {
#index-cells = <1>;
reg = <0x32e40200 0x200>;
};
usbotg2: usb@32e50000 {
compatible = "fsl,imx8mn-usb", "fsl,imx7d-usb";
reg = <0x32e50000 0x200>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_USB1_CTRL_ROOT>;
clock-names = "usb1_ctrl_root_clk";
assigned-clocks = <&clk IMX8MN_CLK_USB_BUS>,
<&clk IMX8MN_CLK_USB_CORE_REF>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>,
<&clk IMX8MN_SYS_PLL1_100M>;
fsl,usbphy = <&usbphynop2>;
fsl,usbmisc = <&usbmisc2 0>;
status = "disabled";
};
usbmisc2: usbmisc@32e50200 {
compatible = "fsl,imx8mn-usbmisc", "fsl,imx7d-usbmisc";
#index-cells = <1>;
reg = <0x32e50200 0x200>;
};
};
dma_apbh: dma-controller@33000000 {
@ -876,12 +854,4 @@ usbphynop1: usbphynop1 {
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>;
clock-names = "main_clk";
};
usbphynop2: usbphynop2 {
compatible = "usb-nop-xceiv";
clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>;
clock-names = "main_clk";
};
};

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@ -19,6 +19,7 @@ fman0: fman@1a00000 {
clock-names = "fmanclk";
fsl,qman-channel-range = <0x800 0x10>;
ptimer-handle = <&ptp_timer0>;
dma-coherent;
muram@0 {
compatible = "fsl,fman-muram";

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@ -110,7 +110,7 @@ &qspi {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mt25qu02g";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

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@ -28,6 +28,12 @@ audio_clk_a: audio_clk_a {
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;

View File

@ -64,9 +64,13 @@ struct amdtee_session {
/**
* struct amdtee_context_data - AMD-TEE driver context data
* @sess_list: Keeps track of sessions opened in current TEE context
* @shm_list: Keeps track of buffers allocated and mapped in current TEE
* context
*/
struct amdtee_context_data {
struct list_head sess_list;
struct list_head shm_list;
struct mutex shm_mutex; /* synchronizes access to @shm_list */
};
struct amdtee_driver_data {
@ -89,10 +93,6 @@ struct amdtee_shm_data {
u32 buf_id;
};
struct amdtee_shm_context {
struct list_head shmdata_list;
};
#define LOWER_TWO_BYTE_MASK 0x0000FFFF
/**

View File

@ -20,7 +20,6 @@
static struct amdtee_driver_data *drv_data;
static DEFINE_MUTEX(session_list_mutex);
static struct amdtee_shm_context shmctx;
static void amdtee_get_version(struct tee_device *teedev,
struct tee_ioctl_version_data *vers)
@ -42,7 +41,8 @@ static int amdtee_open(struct tee_context *ctx)
return -ENOMEM;
INIT_LIST_HEAD(&ctxdata->sess_list);
INIT_LIST_HEAD(&shmctx.shmdata_list);
INIT_LIST_HEAD(&ctxdata->shm_list);
mutex_init(&ctxdata->shm_mutex);
ctx->data = ctxdata;
return 0;
@ -86,6 +86,7 @@ static void amdtee_release(struct tee_context *ctx)
list_del(&sess->list_node);
release_session(sess);
}
mutex_destroy(&ctxdata->shm_mutex);
kfree(ctxdata);
ctx->data = NULL;
@ -152,14 +153,17 @@ static struct amdtee_session *find_session(struct amdtee_context_data *ctxdata,
u32 get_buffer_id(struct tee_shm *shm)
{
u32 buf_id = 0;
struct amdtee_context_data *ctxdata = shm->ctx->data;
struct amdtee_shm_data *shmdata;
u32 buf_id = 0;
list_for_each_entry(shmdata, &shmctx.shmdata_list, shm_node)
mutex_lock(&ctxdata->shm_mutex);
list_for_each_entry(shmdata, &ctxdata->shm_list, shm_node)
if (shmdata->kaddr == shm->kaddr) {
buf_id = shmdata->buf_id;
break;
}
mutex_unlock(&ctxdata->shm_mutex);
return buf_id;
}
@ -333,8 +337,9 @@ int amdtee_close_session(struct tee_context *ctx, u32 session)
int amdtee_map_shmem(struct tee_shm *shm)
{
struct shmem_desc shmem;
struct amdtee_context_data *ctxdata;
struct amdtee_shm_data *shmnode;
struct shmem_desc shmem;
int rc, count;
u32 buf_id;
@ -362,7 +367,10 @@ int amdtee_map_shmem(struct tee_shm *shm)
shmnode->kaddr = shm->kaddr;
shmnode->buf_id = buf_id;
list_add(&shmnode->shm_node, &shmctx.shmdata_list);
ctxdata = shm->ctx->data;
mutex_lock(&ctxdata->shm_mutex);
list_add(&shmnode->shm_node, &ctxdata->shm_list);
mutex_unlock(&ctxdata->shm_mutex);
pr_debug("buf_id :[%x] kaddr[%p]\n", shmnode->buf_id, shmnode->kaddr);
@ -371,6 +379,7 @@ int amdtee_map_shmem(struct tee_shm *shm)
void amdtee_unmap_shmem(struct tee_shm *shm)
{
struct amdtee_context_data *ctxdata;
struct amdtee_shm_data *shmnode;
u32 buf_id;
@ -381,12 +390,15 @@ void amdtee_unmap_shmem(struct tee_shm *shm)
/* Unmap the shared memory from TEE */
handle_unmap_shmem(buf_id);
list_for_each_entry(shmnode, &shmctx.shmdata_list, shm_node)
ctxdata = shm->ctx->data;
mutex_lock(&ctxdata->shm_mutex);
list_for_each_entry(shmnode, &ctxdata->shm_list, shm_node)
if (buf_id == shmnode->buf_id) {
list_del(&shmnode->shm_node);
kfree(shmnode);
break;
}
mutex_unlock(&ctxdata->shm_mutex);
}
int amdtee_invoke_func(struct tee_context *ctx,