mirror of https://gitee.com/openkylin/linux.git
drm/nouveau/kms/nv50: modify core allocation so the code can be split
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
parent
d7c6e97a32
commit
9ca6f1ebba
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@ -425,39 +425,6 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
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return ret;
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}
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/******************************************************************************
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* Core
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*****************************************************************************/
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struct nv50_mast {
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struct nv50_dmac base;
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};
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static int
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nv50_core_create(struct nvif_device *device, struct nvif_object *disp,
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u64 syncbuf, struct nv50_mast *core)
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{
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struct nv50_disp_core_channel_dma_v0 args = {};
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static const s32 oclass[] = {
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GP102_DISP_CORE_CHANNEL_DMA,
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GP100_DISP_CORE_CHANNEL_DMA,
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GM200_DISP_CORE_CHANNEL_DMA,
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GM107_DISP_CORE_CHANNEL_DMA,
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GK110_DISP_CORE_CHANNEL_DMA,
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GK104_DISP_CORE_CHANNEL_DMA,
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GF110_DISP_CORE_CHANNEL_DMA,
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GT214_DISP_CORE_CHANNEL_DMA,
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GT206_DISP_CORE_CHANNEL_DMA,
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GT200_DISP_CORE_CHANNEL_DMA,
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G82_DISP_CORE_CHANNEL_DMA,
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NV50_DISP_CORE_CHANNEL_DMA,
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0
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};
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return nv50_dmac_create(device, disp, oclass, 0, &args, sizeof(args),
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syncbuf, &core->base);
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}
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/******************************************************************************
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* Base
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*****************************************************************************/
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@ -477,14 +444,10 @@ struct nv50_head {
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};
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#define nv50_head(c) ((struct nv50_head *)nouveau_crtc(c))
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#define nv50_ovly(c) (&nv50_head(c)->ovly)
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#define nv50_oimm(c) (&nv50_head(c)->oimm)
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#define nv50_chan(c) (&(c)->base.base)
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#define nv50_vers(c) nv50_chan(c)->user.oclass
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struct nv50_disp {
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struct nvif_disp *disp;
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struct nv50_mast mast;
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struct nv50_core *core;
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struct nouveau_bo *sync;
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@ -497,7 +460,41 @@ nv50_disp(struct drm_device *dev)
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return nouveau_display(dev)->priv;
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}
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#define nv50_mast(d) (&nv50_disp(d)->mast)
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/******************************************************************************
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* Core
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*****************************************************************************/
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struct nv50_core {
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const struct nv50_core_func *func;
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struct nv50_dmac chan;
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};
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struct nv50_core_func {
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};
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static int
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core507d_new_(const struct nv50_core_func *func, struct nouveau_drm *drm,
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s32 oclass, struct nv50_core **pcore)
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{
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struct nv50_disp_core_channel_dma_v0 args = {};
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struct nv50_disp *disp = nv50_disp(drm->dev);
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struct nv50_core *core;
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int ret;
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if (!(core = *pcore = kzalloc(sizeof(*core), GFP_KERNEL)))
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return -ENOMEM;
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core->func = func;
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ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
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&oclass, 0, &args, sizeof(args),
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disp->sync->bo.offset, &core->chan);
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if (ret) {
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NV_ERROR(drm, "core%04x allocation failed: %d\n", oclass, ret);
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return ret;
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}
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return 0;
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}
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/******************************************************************************
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* EVO channel helpers
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@ -1175,7 +1172,7 @@ static void
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nv50_curs_prepare(struct nv50_wndw *wndw, struct nv50_head_atom *asyh,
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struct nv50_wndw_atom *asyw)
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{
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u32 handle = nv50_disp(wndw->plane.dev)->mast.base.vram.handle;
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u32 handle = nv50_disp(wndw->plane.dev)->core->chan.vram.handle;
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u32 offset = asyw->image.offset;
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if (asyh->curs.handle != handle || asyh->curs.offset != offset) {
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asyh->curs.handle = handle;
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@ -1263,7 +1260,7 @@ curs507a_new_(const struct nv50_wimm_func *func, struct nouveau_drm *drm,
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nvif_object_map(&wndw->wimm.base.user, NULL, 0);
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wndw->immd = func;
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wndw->ctxdma.parent = &disp->mast.base.base.user;
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wndw->ctxdma.parent = &disp->core->chan.base.user;
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return 0;
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}
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@ -1616,7 +1613,7 @@ nv50_base_new(struct nouveau_drm *drm, int head, struct nv50_wndw **pwndw)
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static void
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nv50_head_procamp(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 *push;
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if ((push = evo_wait(core, 2))) {
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if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA)
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@ -1632,7 +1629,7 @@ nv50_head_procamp(struct nv50_head *head, struct nv50_head_atom *asyh)
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static void
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nv50_head_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 *push;
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if ((push = evo_wait(core, 2))) {
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if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA)
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@ -1652,7 +1649,7 @@ nv50_head_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
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static void
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nv50_head_ovly(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 bounds = 0;
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u32 *push;
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@ -1681,7 +1678,7 @@ nv50_head_ovly(struct nv50_head *head, struct nv50_head_atom *asyh)
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static void
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nv50_head_base(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 bounds = 0;
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u32 *push;
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@ -1711,7 +1708,7 @@ nv50_head_base(struct nv50_head *head, struct nv50_head_atom *asyh)
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static void
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nv50_head_curs_clr(struct nv50_head *head)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 *push;
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if ((push = evo_wait(core, 4))) {
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if (core->base.user.oclass < G82_DISP_CORE_CHANNEL_DMA) {
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@ -1736,7 +1733,7 @@ nv50_head_curs_clr(struct nv50_head *head)
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static void
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nv50_head_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 *push;
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if ((push = evo_wait(core, 5))) {
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if (core->base.user.oclass < G82_DISP_BASE_CHANNEL_DMA) {
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@ -1767,7 +1764,7 @@ nv50_head_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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static void
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nv50_head_core_clr(struct nv50_head *head)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 *push;
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if ((push = evo_wait(core, 2))) {
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if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA)
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@ -1782,7 +1779,7 @@ nv50_head_core_clr(struct nv50_head *head)
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static void
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nv50_head_core_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 *push;
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if ((push = evo_wait(core, 9))) {
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if (core->base.user.oclass < G82_DISP_CORE_CHANNEL_DMA) {
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@ -1836,7 +1833,7 @@ nv50_head_core_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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static void
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nv50_head_lut_clr(struct nv50_head *head)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 *push;
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if ((push = evo_wait(core, 4))) {
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if (core->base.user.oclass < G82_DISP_CORE_CHANNEL_DMA) {
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@ -1909,7 +1906,7 @@ nv50_head_lut_load(struct drm_property_blob *blob, int mode,
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static void
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nv50_head_lut_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 *push;
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if ((push = evo_wait(core, 7))) {
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if (core->base.user.oclass < G82_DISP_CORE_CHANNEL_DMA) {
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@ -1939,7 +1936,7 @@ nv50_head_lut_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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static void
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nv50_head_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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struct nv50_head_mode *m = &asyh->mode;
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u32 *push;
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if ((push = evo_wait(core, 14))) {
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@ -1980,7 +1977,7 @@ nv50_head_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
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static void
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nv50_head_view(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->mast.base;
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struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
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u32 *push;
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if ((push = evo_wait(core, 10))) {
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if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA) {
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@ -2191,7 +2188,7 @@ nv50_head_atomic_check_lut(struct nv50_head *head,
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asyh->lut.mode = 7;
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asyh->set.ilut = asyh->state.color_mgmt_changed;
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}
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asyh->lut.handle = disp->mast.base.vram.handle;
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asyh->lut.handle = disp->core->chan.vram.handle;
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}
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static void
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@ -2311,7 +2308,7 @@ nv50_head_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state)
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asyh->core.w = asyh->state.mode.hdisplay;
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asyh->core.h = asyh->state.mode.vdisplay;
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}
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asyh->core.handle = disp->mast.base.vram.handle;
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asyh->core.handle = disp->core->chan.vram.handle;
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asyh->core.offset = 0;
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asyh->core.format = 0xcf;
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asyh->core.kind = 0;
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@ -2483,6 +2480,61 @@ nv50_head_create(struct drm_device *dev, int index)
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return ret;
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}
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static const struct nv50_core_func
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core507d = {
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};
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static int
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core507d_new(struct nouveau_drm *drm, s32 oclass, struct nv50_core **pcore)
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{
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return core507d_new_(&core507d, drm, oclass, pcore);
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}
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static void
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nv50_core_del(struct nv50_core **pcore)
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{
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struct nv50_core *core = *pcore;
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if (core) {
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nv50_dmac_destroy(&core->chan);
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kfree(*pcore);
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*pcore = NULL;
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}
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}
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static int
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nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore)
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{
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struct {
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s32 oclass;
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int version;
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int (*new)(struct nouveau_drm *, s32, struct nv50_core **);
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} cores[] = {
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{ GP102_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ GP100_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ GM200_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ GM107_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ GK110_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ GK104_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ GF110_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ GT214_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ GT206_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ GT200_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ G82_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{ NV50_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{}
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};
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struct nv50_disp *disp = nv50_disp(drm->dev);
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int cid;
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cid = nvif_mclass(&disp->disp->object, cores);
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if (cid < 0) {
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NV_ERROR(drm, "No supported core channel class\n");
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return cid;
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}
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return cores[cid].new(drm, cores[cid].oclass, pcore);
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}
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/******************************************************************************
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* Output path helpers
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*****************************************************************************/
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@ -2591,21 +2643,21 @@ static void
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nv50_dac_disable(struct drm_encoder *encoder)
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{
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct nv50_mast *mast = nv50_mast(encoder->dev);
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struct nv50_dmac *core = &nv50_disp(encoder->dev)->core->chan;
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const int or = nv_encoder->or;
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u32 *push;
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if (nv_encoder->crtc) {
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push = evo_wait(mast, 4);
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push = evo_wait(core, 4);
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if (push) {
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if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) {
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if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA) {
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evo_mthd(push, 0x0400 + (or * 0x080), 1);
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evo_data(push, 0x00000000);
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} else {
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evo_mthd(push, 0x0180 + (or * 0x020), 1);
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evo_data(push, 0x00000000);
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}
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evo_kick(push, mast);
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evo_kick(push, core);
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}
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}
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@ -2616,7 +2668,7 @@ nv50_dac_disable(struct drm_encoder *encoder)
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static void
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nv50_dac_enable(struct drm_encoder *encoder)
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{
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struct nv50_mast *mast = nv50_mast(encoder->dev);
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struct nv50_dmac *core = &nv50_disp(encoder->dev)->core->chan;
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
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struct drm_display_mode *mode = &nv_crtc->base.state->adjusted_mode;
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@ -2624,9 +2676,9 @@ nv50_dac_enable(struct drm_encoder *encoder)
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nv50_outp_acquire(nv_encoder);
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push = evo_wait(mast, 8);
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push = evo_wait(core, 8);
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if (push) {
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if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) {
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if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA) {
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u32 syncs = 0x00000000;
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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@ -2656,7 +2708,7 @@ nv50_dac_enable(struct drm_encoder *encoder)
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evo_data(push, 1 << nv_crtc->index);
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}
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evo_kick(push, mast);
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evo_kick(push, core);
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}
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nv_encoder->crtc = encoder->crtc;
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@ -3526,7 +3578,8 @@ static void
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nv50_sor_update(struct nouveau_encoder *nv_encoder, u8 head,
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struct drm_display_mode *mode, u8 proto, u8 depth)
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{
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struct nv50_dmac *core = &nv50_mast(nv_encoder->base.base.dev)->base;
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struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
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struct nv50_dmac *core = &disp->core->chan;
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u32 *push;
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if (!mode) {
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@ -3809,18 +3862,18 @@ static void
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nv50_pior_disable(struct drm_encoder *encoder)
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{
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct nv50_mast *mast = nv50_mast(encoder->dev);
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struct nv50_dmac *core = &nv50_disp(encoder->dev)->core->chan;
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const int or = nv_encoder->or;
|
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u32 *push;
|
||||
|
||||
if (nv_encoder->crtc) {
|
||||
push = evo_wait(mast, 4);
|
||||
push = evo_wait(core, 4);
|
||||
if (push) {
|
||||
if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) {
|
||||
if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA) {
|
||||
evo_mthd(push, 0x0700 + (or * 0x040), 1);
|
||||
evo_data(push, 0x00000000);
|
||||
}
|
||||
evo_kick(push, mast);
|
||||
evo_kick(push, core);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -3831,7 +3884,7 @@ nv50_pior_disable(struct drm_encoder *encoder)
|
|||
static void
|
||||
nv50_pior_enable(struct drm_encoder *encoder)
|
||||
{
|
||||
struct nv50_mast *mast = nv50_mast(encoder->dev);
|
||||
struct nv50_dmac *core = &nv50_disp(encoder->dev)->core->chan;
|
||||
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
|
||||
struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
|
||||
struct nouveau_connector *nv_connector;
|
||||
|
|
@ -3860,9 +3913,9 @@ nv50_pior_enable(struct drm_encoder *encoder)
|
|||
break;
|
||||
}
|
||||
|
||||
push = evo_wait(mast, 8);
|
||||
push = evo_wait(core, 8);
|
||||
if (push) {
|
||||
if (nv50_vers(mast) < GF110_DISP_CORE_CHANNEL_DMA) {
|
||||
if (core->base.user.oclass < GF110_DISP_CORE_CHANNEL_DMA) {
|
||||
u32 ctrl = (depth << 16) | (proto << 8) | owner;
|
||||
if (mode->flags & DRM_MODE_FLAG_NHSYNC)
|
||||
ctrl |= 0x00001000;
|
||||
|
|
@ -3872,7 +3925,7 @@ nv50_pior_enable(struct drm_encoder *encoder)
|
|||
evo_data(push, ctrl);
|
||||
}
|
||||
|
||||
evo_kick(push, mast);
|
||||
evo_kick(push, core);
|
||||
}
|
||||
|
||||
nv_encoder->crtc = encoder->crtc;
|
||||
|
|
@ -3950,7 +4003,7 @@ static void
|
|||
nv50_disp_atomic_commit_core(struct nouveau_drm *drm, u32 interlock)
|
||||
{
|
||||
struct nv50_disp *disp = nv50_disp(drm->dev);
|
||||
struct nv50_dmac *core = &disp->mast.base;
|
||||
struct nv50_dmac *core = &disp->core->chan;
|
||||
struct nv50_mstm *mstm;
|
||||
struct drm_encoder *encoder;
|
||||
u32 *push;
|
||||
|
|
@ -4134,11 +4187,11 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
|
|||
/* Flush update. */
|
||||
if (interlock_core) {
|
||||
if (!interlock_chan && atom->state.legacy_cursor_update) {
|
||||
u32 *push = evo_wait(&disp->mast, 2);
|
||||
u32 *push = evo_wait(&disp->core->chan, 2);
|
||||
if (push) {
|
||||
evo_mthd(push, 0x0080, 1);
|
||||
evo_data(push, 0x00000000);
|
||||
evo_kick(push, &disp->mast);
|
||||
evo_kick(push, &disp->core->chan);
|
||||
}
|
||||
} else {
|
||||
nv50_disp_atomic_commit_core(drm, interlock_chan);
|
||||
|
|
@ -4442,17 +4495,18 @@ nv50_display_fini(struct drm_device *dev)
|
|||
int
|
||||
nv50_display_init(struct drm_device *dev)
|
||||
{
|
||||
struct nv50_dmac *core = &nv50_disp(dev)->core->chan;
|
||||
struct drm_encoder *encoder;
|
||||
struct drm_plane *plane;
|
||||
u32 *push;
|
||||
|
||||
push = evo_wait(nv50_mast(dev), 32);
|
||||
push = evo_wait(core, 32);
|
||||
if (!push)
|
||||
return -EBUSY;
|
||||
|
||||
evo_mthd(push, 0x0088, 1);
|
||||
evo_data(push, nv50_mast(dev)->base.sync.handle);
|
||||
evo_kick(push, nv50_mast(dev));
|
||||
evo_data(push, core->sync.handle);
|
||||
evo_kick(push, core);
|
||||
|
||||
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
|
||||
if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) {
|
||||
|
|
@ -4477,7 +4531,7 @@ nv50_display_destroy(struct drm_device *dev)
|
|||
{
|
||||
struct nv50_disp *disp = nv50_disp(dev);
|
||||
|
||||
nv50_dmac_destroy(&disp->mast.base);
|
||||
nv50_core_del(&disp->core);
|
||||
|
||||
nouveau_bo_unmap(disp->sync);
|
||||
if (disp->sync)
|
||||
|
|
@ -4537,8 +4591,7 @@ nv50_display_create(struct drm_device *dev)
|
|||
goto out;
|
||||
|
||||
/* allocate master evo channel */
|
||||
ret = nv50_core_create(device, &disp->disp->object,
|
||||
disp->sync->bo.offset, &disp->mast);
|
||||
ret = nv50_core_new(drm, &disp->core);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue