ARM: sun5i: dt: Fix A10s SoC bus base address

There was a typo in the base address used for the soc node in the A10s
device tree. Fix it with the proper base address.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Maxime Ripard 2013-08-03 16:07:36 +02:00
parent ccb258ab91
commit 9e199292d2
2 changed files with 2 additions and 2 deletions

View File

@ -18,7 +18,7 @@ / {
model = "Olimex A10s-Olinuxino Micro"; model = "Olimex A10s-Olinuxino Micro";
compatible = "olimex,a10s-olinuxino-micro", "allwinner,sun5i-a10s"; compatible = "olimex,a10s-olinuxino-micro", "allwinner,sun5i-a10s";
soc@01c20000 { soc@01c00000 {
emac: ethernet@01c0b000 { emac: ethernet@01c0b000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>; pinctrl-0 = <&emac_pins_a>;

View File

@ -157,7 +157,7 @@ apb1_gates: apb1_gates@01c2006c {
}; };
}; };
soc@01c20000 { soc@01c00000 {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;