Merge git://git.infradead.org/mtd-2.6

* git://git.infradead.org/mtd-2.6: (57 commits)
  [MTD] [NAND] subpage read feature as a way to increase performance. 
  CPUFREQ: S3C24XX NAND driver frequency scaling support.
  [MTD][NAND] au1550nd: remove unused variable
  [MTD] jedec_probe: Fix SST 16-bit chip detection
  [MTD][MTDPART] Fix a division by zero bug
  [MTD][MTDPART] Cleanup and document the erase region handling
  [MTD][MTDPART] Handle most checkpatch findings
  [MTD][MTDPART] Seperate main loop from per-partition code in add_mtd_partition
  [MTD] physmap: resume already suspended chips on failure to suspend
  [MTD] physmap: Fix suspend/resume/shutdown bugs.
  [MTD] [NOR] Fix -ETIMEO errors in CFI driver
  [MTD] [NAND] fsl_elbc_nand: fix section mismatch with CONFIG_MTD_OF_PARTS=y
  [JFFS2] Use .unlocked_ioctl
  [MTD] Fix const assignment in the MTD command line partitioning driver
  [MTD] [NOR] gen_probe: No debug message when debugging is disabled
  [MTD] [NAND] remove __PPC__ hardcoded address from DiskOnChip drivers
  [MTD] [MAPS] Remove the bast-flash driver.
  [MTD] [NAND] fsl_elbc_nand: ecclayout cleanups
  [MTD] [NAND] fsl_elbc_nand: implement support for flash-based BBT
  [MTD] [NAND] fsl_elbc_nand: fix OOB workability for large page NAND chips
  ...
This commit is contained in:
Linus Torvalds 2008-07-26 20:30:56 -07:00
commit 9ee08c2df4
175 changed files with 1521 additions and 1125 deletions

View File

@ -377,7 +377,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
* -------------------------------------------------------------------- */
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
static struct atmel_nand_data nand_data;
#define NAND_BASE AT91_CHIPSELECT_3
@ -395,7 +395,7 @@ static struct resource nand_resources[] = {
};
static struct platform_device at91cap9_nand_device = {
.name = "at91_nand",
.name = "atmel_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
@ -404,7 +404,7 @@ static struct platform_device at91cap9_nand_device = {
.num_resources = ARRAY_SIZE(nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa, mode;
@ -445,7 +445,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
platform_device_register(&at91cap9_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
void __init at91_add_device_nand(struct atmel_nand_data *data) {}
#endif

View File

@ -369,7 +369,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
* -------------------------------------------------------------------- */
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
static struct atmel_nand_data nand_data;
#define NAND_BASE AT91_CHIPSELECT_3
@ -382,7 +382,7 @@ static struct resource nand_resources[] = {
};
static struct platform_device at91rm9200_nand_device = {
.name = "at91_nand",
.name = "atmel_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
@ -391,7 +391,7 @@ static struct platform_device at91rm9200_nand_device = {
.num_resources = ARRAY_SIZE(nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned int csa;
@ -429,7 +429,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
platform_device_register(&at91rm9200_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
void __init at91_add_device_nand(struct atmel_nand_data *data) {}
#endif

View File

@ -284,7 +284,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
* -------------------------------------------------------------------- */
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
static struct atmel_nand_data nand_data;
#define NAND_BASE AT91_CHIPSELECT_3
@ -302,7 +302,7 @@ static struct resource nand_resources[] = {
};
static struct platform_device at91sam9260_nand_device = {
.name = "at91_nand",
.name = "atmel_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
@ -311,7 +311,7 @@ static struct platform_device at91sam9260_nand_device = {
.num_resources = ARRAY_SIZE(nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa, mode;
@ -373,7 +373,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
platform_device_register(&at91sam9260_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
void __init at91_add_device_nand(struct atmel_nand_data *data) {}
#endif

View File

@ -199,7 +199,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
* -------------------------------------------------------------------- */
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
static struct atmel_nand_data nand_data;
#define NAND_BASE AT91_CHIPSELECT_3
@ -211,8 +211,8 @@ static struct resource nand_resources[] = {
}
};
static struct platform_device at91_nand_device = {
.name = "at91_nand",
static struct platform_device atmel_nand_device = {
.name = "atmel_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
@ -221,7 +221,7 @@ static struct platform_device at91_nand_device = {
.num_resources = ARRAY_SIZE(nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa, mode;
@ -262,11 +262,11 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
nand_data = *data;
platform_device_register(&at91_nand_device);
platform_device_register(&atmel_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
void __init at91_add_device_nand(struct atmel_nand_data *data) {}
#endif

View File

@ -353,7 +353,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
* -------------------------------------------------------------------- */
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
static struct atmel_nand_data nand_data;
#define NAND_BASE AT91_CHIPSELECT_3
@ -371,7 +371,7 @@ static struct resource nand_resources[] = {
};
static struct platform_device at91sam9263_nand_device = {
.name = "at91_nand",
.name = "atmel_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
@ -380,7 +380,7 @@ static struct platform_device at91sam9263_nand_device = {
.num_resources = ARRAY_SIZE(nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa, mode;
@ -421,7 +421,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
platform_device_register(&at91sam9263_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
void __init at91_add_device_nand(struct atmel_nand_data *data) {}
#endif

View File

@ -195,7 +195,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
* -------------------------------------------------------------------- */
#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
static struct at91_nand_data nand_data;
static struct atmel_nand_data nand_data;
#define NAND_BASE AT91_CHIPSELECT_3
@ -212,8 +212,8 @@ static struct resource nand_resources[] = {
}
};
static struct platform_device at91_nand_device = {
.name = "at91_nand",
static struct platform_device atmel_nand_device = {
.name = "atmel_nand",
.id = -1,
.dev = {
.platform_data = &nand_data,
@ -222,7 +222,7 @@ static struct platform_device at91_nand_device = {
.num_resources = ARRAY_SIZE(nand_resources),
};
void __init at91_add_device_nand(struct at91_nand_data *data)
void __init at91_add_device_nand(struct atmel_nand_data *data)
{
unsigned long csa;
@ -259,11 +259,11 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */
nand_data = *data;
platform_device_register(&at91_nand_device);
platform_device_register(&atmel_nand_device);
}
#else
void __init at91_add_device_nand(struct at91_nand_data *data) {}
void __init at91_add_device_nand(struct atmel_nand_data *data) {}
#endif

View File

@ -142,7 +142,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return cam60_nand_partition;
}
static struct at91_nand_data __initdata cam60_nand_data = {
static struct atmel_nand_data __initdata cam60_nand_data = {
.ale = 21,
.cle = 22,
// .det_pin = ... not there

View File

@ -181,7 +181,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return cap9adk_nand_partitions;
}
static struct at91_nand_data __initdata cap9adk_nand_data = {
static struct atmel_nand_data __initdata cap9adk_nand_data = {
.ale = 21,
.cle = 22,
// .det_pin = ... not connected

View File

@ -147,7 +147,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return dk_nand_partition;
}
static struct at91_nand_data __initdata dk_nand_data = {
static struct atmel_nand_data __initdata dk_nand_data = {
.ale = 22,
.cle = 21,
.det_pin = AT91_PIN_PB1,

View File

@ -105,7 +105,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return kb9202_nand_partition;
}
static struct at91_nand_data __initdata kb9202_nand_data = {
static struct atmel_nand_data __initdata kb9202_nand_data = {
.ale = 22,
.cle = 21,
// .det_pin = ... not there

View File

@ -141,7 +141,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return ek_nand_partition;
}
static struct at91_nand_data __initdata ek_nand_data = {
static struct atmel_nand_data __initdata ek_nand_data = {
.ale = 21,
.cle = 22,
// .det_pin = ... not connected

View File

@ -178,7 +178,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return ek_nand_partition;
}
static struct at91_nand_data __initdata ek_nand_data = {
static struct atmel_nand_data __initdata ek_nand_data = {
.ale = 21,
.cle = 22,
// .det_pin = ... not connected

View File

@ -183,7 +183,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return ek_nand_partition;
}
static struct at91_nand_data __initdata ek_nand_data = {
static struct atmel_nand_data __initdata ek_nand_data = {
.ale = 22,
.cle = 21,
// .det_pin = ... not connected

View File

@ -187,7 +187,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return ek_nand_partition;
}
static struct at91_nand_data __initdata ek_nand_data = {
static struct atmel_nand_data __initdata ek_nand_data = {
.ale = 21,
.cle = 22,
// .det_pin = ... not connected

View File

@ -96,7 +96,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return ek_nand_partition;
}
static struct at91_nand_data __initdata ek_nand_data = {
static struct atmel_nand_data __initdata ek_nand_data = {
.ale = 21,
.cle = 22,
// .det_pin = ... not connected

View File

@ -180,7 +180,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio
return yl9200_nand_partition;
}
static struct at91_nand_data __initdata yl9200_nand_data = {
static struct atmel_nand_data __initdata yl9200_nand_data = {
.ale = 6,
.cle = 7,
// .det_pin = ... not connected

View File

@ -18,6 +18,10 @@ config BOARD_ATSTK1004
bool "ATSTK1004"
select CPU_AT32AP7002
config BOARD_ATSTK1006
bool "ATSTK1006"
select CPU_AT32AP7000
endchoice

View File

@ -2,3 +2,4 @@ obj-y += setup.o flash.o
obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o
obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o
obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o
obj-$(CONFIG_BOARD_ATSTK1006) += atstk1002.o

View File

@ -1,7 +1,7 @@
/*
* ATSTK1002 daughterboard-specific init code
* ATSTK1002/ATSTK1006 daughterboard-specific init code
*
* Copyright (C) 2005-2006 Atmel Corporation
* Copyright (C) 2005-2007 Atmel Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@ -35,6 +35,74 @@ unsigned long at32_board_osc_rates[3] = {
[2] = 12000000, /* 12 MHz on osc1 */
};
/*
* The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both
* have the AT32AP7000 chip on board; the difference is that the
* STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on
* the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has
* none.)
*
* The RAM difference is handled by the boot loader, so the only
* difference we end up handling here is the NAND flash.
*/
#ifdef CONFIG_BOARD_ATSTK1006
#include <linux/mtd/partitions.h>
#include <asm/arch/smc.h>
static struct smc_timing nand_timing __initdata = {
.ncs_read_setup = 0,
.nrd_setup = 10,
.ncs_write_setup = 0,
.nwe_setup = 10,
.ncs_read_pulse = 30,
.nrd_pulse = 15,
.ncs_write_pulse = 30,
.nwe_pulse = 15,
.read_cycle = 30,
.write_cycle = 30,
.ncs_read_recover = 0,
.nrd_recover = 15,
.ncs_write_recover = 0,
/* WE# high -> RE# low min 60 ns */
.nwe_recover = 50,
};
static struct smc_config nand_config __initdata = {
.bus_width = 1,
.nrd_controlled = 1,
.nwe_controlled = 1,
.nwait_mode = 0,
.byte_write = 0,
.tdf_cycles = 2,
.tdf_mode = 0,
};
static struct mtd_partition nand_partitions[] = {
{
.name = "main",
.offset = 0x00000000,
.size = MTDPART_SIZ_FULL,
},
};
static struct mtd_partition *nand_part_info(int size, int *num_partitions)
{
*num_partitions = ARRAY_SIZE(nand_partitions);
return nand_partitions;
}
struct atmel_nand_data atstk1006_nand_data __initdata = {
.cle = 21,
.ale = 22,
.rdy_pin = GPIO_PIN_PB(30),
.enable_pin = GPIO_PIN_PB(29),
.partition_info = nand_part_info,
};
#endif
struct eth_addr {
u8 addr[6];
};
@ -218,6 +286,12 @@ static int __init atstk1002_init(void)
at32_add_system_devices();
#ifdef CONFIG_BOARD_ATSTK1006
smc_set_timing(&nand_config, &nand_timing);
smc_set_configuration(3, &nand_config);
at32_add_device_nand(0, &atstk1006_nand_data);
#endif
#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
at32_add_device_usart(1);
#else

View File

@ -1870,6 +1870,58 @@ at32_add_device_cf(unsigned int id, unsigned int extint,
}
#endif
/* --------------------------------------------------------------------
* NAND Flash / SmartMedia
* -------------------------------------------------------------------- */
static struct resource smc_cs3_resource[] __initdata = {
{
.start = 0x0c000000,
.end = 0x0fffffff,
.flags = IORESOURCE_MEM,
}, {
.start = 0xfff03c00,
.end = 0xfff03fff,
.flags = IORESOURCE_MEM,
},
};
struct platform_device *__init
at32_add_device_nand(unsigned int id, struct atmel_nand_data *data)
{
struct platform_device *pdev;
if (id != 0 || !data)
return NULL;
pdev = platform_device_alloc("atmel_nand", id);
if (!pdev)
goto fail;
if (platform_device_add_resources(pdev, smc_cs3_resource,
ARRAY_SIZE(smc_cs3_resource)))
goto fail;
if (platform_device_add_data(pdev, data,
sizeof(struct atmel_nand_data)))
goto fail;
set_ebi_sfr_bits(HMATRIX_BIT(CS3A));
if (data->enable_pin)
at32_select_gpio(data->enable_pin,
AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
if (data->rdy_pin)
at32_select_gpio(data->rdy_pin, 0);
if (data->det_pin)
at32_select_gpio(data->det_pin, 0);
platform_device_add(pdev);
return pdev;
fail:
platform_device_put(pdev);
return NULL;
}
/* --------------------------------------------------------------------
* AC97C
* -------------------------------------------------------------------- */

View File

@ -278,4 +278,4 @@ static int __init hsmc_init(void)
{
return platform_driver_register(&hsmc_driver);
}
arch_initcall(hsmc_init);
core_initcall(hsmc_init);

View File

@ -1,5 +1,3 @@
# $Id: Kconfig,v 1.11 2005/11/07 11:14:19 gleixner Exp $
menuconfig MTD
tristate "Memory Technology Device (MTD) support"
depends on HAS_IOMEM

View File

@ -21,8 +21,6 @@
This is access code for flashes using ARM's flash partitioning
standards.
$Id: afs.c,v 1.15 2005/11/07 11:14:19 gleixner Exp $
======================================================================*/
#include <linux/module.h>

View File

@ -4,8 +4,6 @@
*
* (C) 2000 Red Hat. GPL'd
*
* $Id: cfi_cmdset_0001.c,v 1.186 2005/11/23 22:07:52 nico Exp $
*
*
* 10/10/2000 Nicolas Pitre <nico@cam.org>
* - completely revamped method functions so they are aware and
@ -50,6 +48,8 @@
#define I82802AC 0x00ac
#define MANUFACTURER_ST 0x0020
#define M50LPW080 0x002F
#define M50FLW080A 0x0080
#define M50FLW080B 0x0081
#define AT49BV640D 0x02de
static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
@ -204,7 +204,7 @@ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
{
struct map_info *map = mtd->priv;
struct cfi_private *cfi = map->fldrv_priv;
struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
struct cfi_pri_intelext *extp = cfi->cmdset_priv;
printk(KERN_WARNING "cfi_cmdset_0001: Suspend "
"erase on write disabled.\n");
@ -301,6 +301,8 @@ static struct cfi_fixup jedec_fixup_table[] = {
{ MANUFACTURER_INTEL, I82802AB, fixup_use_fwh_lock, NULL, },
{ MANUFACTURER_INTEL, I82802AC, fixup_use_fwh_lock, NULL, },
{ MANUFACTURER_ST, M50LPW080, fixup_use_fwh_lock, NULL, },
{ MANUFACTURER_ST, M50FLW080A, fixup_use_fwh_lock, NULL, },
{ MANUFACTURER_ST, M50FLW080B, fixup_use_fwh_lock, NULL, },
{ 0, 0, NULL, NULL }
};
static struct cfi_fixup fixup_table[] = {
@ -1147,7 +1149,7 @@ static int inval_cache_and_wait_for_operation(
struct cfi_private *cfi = map->fldrv_priv;
map_word status, status_OK = CMD(0x80);
int chip_state = chip->state;
unsigned int timeo, sleep_time;
unsigned int timeo, sleep_time, reset_timeo;
spin_unlock(chip->mutex);
if (inval_len)
@ -1158,6 +1160,7 @@ static int inval_cache_and_wait_for_operation(
timeo = chip_op_time * 8;
if (!timeo)
timeo = 500000;
reset_timeo = timeo;
sleep_time = chip_op_time / 2;
for (;;) {
@ -1199,6 +1202,12 @@ static int inval_cache_and_wait_for_operation(
remove_wait_queue(&chip->wq, &wait);
spin_lock(chip->mutex);
}
if (chip->erase_suspended || chip->write_suspended) {
/* Suspend has occured while sleep: reset timeout */
timeo = reset_timeo;
chip->erase_suspended = 0;
chip->write_suspended = 0;
}
}
/* Done and happy. */

View File

@ -16,9 +16,6 @@
* Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
*
* This code is GPL
*
* $Id: cfi_cmdset_0002.c,v 1.122 2005/11/07 11:14:22 gleixner Exp $
*
*/
#include <linux/module.h>

View File

@ -4,8 +4,6 @@
*
* (C) 2000 Red Hat. GPL'd
*
* $Id: cfi_cmdset_0020.c,v 1.22 2005/11/07 11:14:22 gleixner Exp $
*
* 10/10/2000 Nicolas Pitre <nico@cam.org>
* - completely revamped method functions so they are aware and
* independent of the flash geometry (buswidth, interleave, etc.)

View File

@ -1,7 +1,6 @@
/*
Common Flash Interface probe code.
(C) 2000 Red Hat. GPL'd.
$Id: cfi_probe.c,v 1.86 2005/11/29 14:48:31 gleixner Exp $
*/
#include <linux/module.h>

View File

@ -6,9 +6,6 @@
* Copyright (C) 2003 STMicroelectronics Limited
*
* This code is covered by the GPL.
*
* $Id: cfi_util.c,v 1.10 2005/11/07 11:14:23 gleixner Exp $
*
*/
#include <linux/module.h>

View File

@ -1,6 +1,4 @@
/*
* $Id: chipreg.c,v 1.17 2004/11/16 18:29:00 dwmw2 Exp $
*
* Registration for chip drivers
*
*/

View File

@ -2,7 +2,6 @@
* Routines common to all CFI-type probes.
* (C) 2001-2003 Red Hat, Inc.
* GPL'd
* $Id: gen_probe.c,v 1.24 2005/11/07 11:14:23 gleixner Exp $
*/
#include <linux/kernel.h>
@ -71,8 +70,8 @@ static struct cfi_private *genprobe_ident_chips(struct map_info *map, struct chi
interleave and device type, etc. */
if (!genprobe_new_chip(map, cp, &cfi)) {
/* The probe didn't like it */
printk(KERN_DEBUG "%s: Found no %s device at location zero\n",
cp->name, map->name);
pr_debug("%s: Found no %s device at location zero\n",
cp->name, map->name);
return NULL;
}

View File

@ -1,7 +1,6 @@
/*
Common Flash Interface probe code.
(C) 2000 Red Hat. GPL'd.
$Id: jedec_probe.c,v 1.66 2005/11/07 11:14:23 gleixner Exp $
See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5)
for the standard this probe goes back to.
@ -26,6 +25,7 @@
/* Manufacturers */
#define MANUFACTURER_AMD 0x0001
#define MANUFACTURER_ATMEL 0x001f
#define MANUFACTURER_EON 0x001c
#define MANUFACTURER_FUJITSU 0x0004
#define MANUFACTURER_HYUNDAI 0x00AD
#define MANUFACTURER_INTEL 0x0089
@ -37,6 +37,7 @@
#define MANUFACTURER_ST 0x0020
#define MANUFACTURER_TOSHIBA 0x0098
#define MANUFACTURER_WINBOND 0x00da
#define CONTINUATION_CODE 0x007f
/* AMD */
@ -58,6 +59,8 @@
#define AM29LV040B 0x004F
#define AM29F032B 0x0041
#define AM29F002T 0x00B0
#define AM29SL800DB 0x226B
#define AM29SL800DT 0x22EA
/* Atmel */
#define AT49BV512 0x0003
@ -67,6 +70,10 @@
#define AT49BV32X 0x00C8
#define AT49BV32XT 0x00C9
/* Eon */
#define EN29SL800BB 0x226B
#define EN29SL800BT 0x22EA
/* Fujitsu */
#define MBM29F040C 0x00A4
#define MBM29F800BA 0x2258
@ -141,6 +148,8 @@
#define M50FW080 0x002D
#define M50FW016 0x002E
#define M50LPW080 0x002F
#define M50FLW080A 0x0080
#define M50FLW080B 0x0081
/* SST */
#define SST29EE020 0x0010
@ -191,6 +200,7 @@ enum uaddr {
MTD_UADDR_0x0555_0x0AAA,
MTD_UADDR_0x5555_0x2AAA,
MTD_UADDR_0x0AAA_0x0555,
MTD_UADDR_0xAAAA_0x5555,
MTD_UADDR_DONT_CARE, /* Requires an arbitrary address */
MTD_UADDR_UNNECESSARY, /* Does not require any address */
};
@ -238,6 +248,11 @@ static const struct unlock_addr unlock_addrs[] = {
.addr2 = 0x0555
},
[MTD_UADDR_0xAAAA_0x5555] = {
.addr1 = 0xaaaa,
.addr2 = 0x5555
},
[MTD_UADDR_DONT_CARE] = {
.addr1 = 0x0000, /* Doesn't matter which address */
.addr2 = 0x0000 /* is used - must be last entry */
@ -521,6 +536,36 @@ static const struct amd_flash_info jedec_table[] = {
ERASEINFO(0x02000,2),
ERASEINFO(0x04000,1),
}
}, {
.mfr_id = MANUFACTURER_AMD,
.dev_id = AM29SL800DT,
.name = "AMD AM29SL800DT",
.devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
.uaddr = MTD_UADDR_0x0AAA_0x0555,
.dev_size = SIZE_1MiB,
.cmd_set = P_ID_AMD_STD,
.nr_regions = 4,
.regions = {
ERASEINFO(0x10000,15),
ERASEINFO(0x08000,1),
ERASEINFO(0x02000,2),
ERASEINFO(0x04000,1),
}
}, {
.mfr_id = MANUFACTURER_AMD,
.dev_id = AM29SL800DB,
.name = "AMD AM29SL800DB",
.devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
.uaddr = MTD_UADDR_0x0AAA_0x0555,
.dev_size = SIZE_1MiB,
.cmd_set = P_ID_AMD_STD,
.nr_regions = 4,
.regions = {
ERASEINFO(0x04000,1),
ERASEINFO(0x02000,2),
ERASEINFO(0x08000,1),
ERASEINFO(0x10000,15),
}
}, {
.mfr_id = MANUFACTURER_ATMEL,
.dev_id = AT49BV512,
@ -598,6 +643,36 @@ static const struct amd_flash_info jedec_table[] = {
ERASEINFO(0x10000,63),
ERASEINFO(0x02000,8)
}
}, {
.mfr_id = MANUFACTURER_EON,
.dev_id = EN29SL800BT,
.name = "Eon EN29SL800BT",
.devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
.uaddr = MTD_UADDR_0x0AAA_0x0555,
.dev_size = SIZE_1MiB,
.cmd_set = P_ID_AMD_STD,
.nr_regions = 4,
.regions = {
ERASEINFO(0x10000,15),
ERASEINFO(0x08000,1),
ERASEINFO(0x02000,2),
ERASEINFO(0x04000,1),
}
}, {
.mfr_id = MANUFACTURER_EON,
.dev_id = EN29SL800BB,
.name = "Eon EN29SL800BB",
.devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
.uaddr = MTD_UADDR_0x0AAA_0x0555,
.dev_size = SIZE_1MiB,
.cmd_set = P_ID_AMD_STD,
.nr_regions = 4,
.regions = {
ERASEINFO(0x04000,1),
ERASEINFO(0x02000,2),
ERASEINFO(0x08000,1),
ERASEINFO(0x10000,15),
}
}, {
.mfr_id = MANUFACTURER_FUJITSU,
.dev_id = MBM29F040C,
@ -1392,8 +1467,8 @@ static const struct amd_flash_info jedec_table[] = {
.mfr_id = MANUFACTURER_SST, /* should be CFI */
.dev_id = SST39LF160,
.name = "SST 39LF160",
.devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
.uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */
.devtypes = CFI_DEVICETYPE_X16,
.uaddr = MTD_UADDR_0xAAAA_0x5555,
.dev_size = SIZE_2MiB,
.cmd_set = P_ID_AMD_STD,
.nr_regions = 2,
@ -1405,8 +1480,8 @@ static const struct amd_flash_info jedec_table[] = {
.mfr_id = MANUFACTURER_SST, /* should be CFI */
.dev_id = SST39VF1601,
.name = "SST 39VF1601",
.devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
.uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */
.devtypes = CFI_DEVICETYPE_X16,
.uaddr = MTD_UADDR_0xAAAA_0x5555,
.dev_size = SIZE_2MiB,
.cmd_set = P_ID_AMD_STD,
.nr_regions = 2,
@ -1590,6 +1665,36 @@ static const struct amd_flash_info jedec_table[] = {
.nr_regions = 1,
.regions = {
ERASEINFO(0x10000,16),
},
}, {
.mfr_id = MANUFACTURER_ST,
.dev_id = M50FLW080A,
.name = "ST M50FLW080A",
.devtypes = CFI_DEVICETYPE_X8,
.uaddr = MTD_UADDR_UNNECESSARY,
.dev_size = SIZE_1MiB,
.cmd_set = P_ID_INTEL_EXT,
.nr_regions = 4,
.regions = {
ERASEINFO(0x1000,16),
ERASEINFO(0x10000,13),
ERASEINFO(0x1000,16),
ERASEINFO(0x1000,16),
}
}, {
.mfr_id = MANUFACTURER_ST,
.dev_id = M50FLW080B,
.name = "ST M50FLW080B",
.devtypes = CFI_DEVICETYPE_X8,
.uaddr = MTD_UADDR_UNNECESSARY,
.dev_size = SIZE_1MiB,
.cmd_set = P_ID_INTEL_EXT,
.nr_regions = 4,
.regions = {
ERASEINFO(0x1000,16),
ERASEINFO(0x1000,16),
ERASEINFO(0x10000,13),
ERASEINFO(0x1000,16),
}
}, {
.mfr_id = MANUFACTURER_TOSHIBA,
@ -1696,9 +1801,21 @@ static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base,
{
map_word result;
unsigned long mask;
u32 ofs = cfi_build_cmd_addr(0, cfi_interleave(cfi), cfi->device_type);
mask = (1 << (cfi->device_type * 8)) -1;
result = map_read(map, base + ofs);
int bank = 0;
/* According to JEDEC "Standard Manufacturer's Identification Code"
* (http://www.jedec.org/download/search/jep106W.pdf)
* several first banks can contain 0x7f instead of actual ID
*/
do {
uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8),
cfi_interleave(cfi),
cfi->device_type);
mask = (1 << (cfi->device_type * 8)) - 1;
result = map_read(map, base + ofs);
bank++;
} while ((result.x[0] & mask) == CONTINUATION_CODE);
return result.x[0] & mask;
}

View File

@ -1,7 +1,6 @@
/*
* Common code to handle absent "placeholder" devices
* Copyright 2001 Resilience Corporation <ebrower@resilience.com>
* $Id: map_absent.c,v 1.6 2005/11/07 11:14:23 gleixner Exp $
*
* This map driver is used to allocate "placeholder" MTD
* devices on systems that have socketed/removable media.

View File

@ -1,7 +1,6 @@
/*
* Common code to handle map devices which are simple RAM
* (C) 2000 Red Hat. GPL'd.
* $Id: map_ram.c,v 1.22 2005/01/05 18:05:12 dwmw2 Exp $
*/
#include <linux/module.h>

View File

@ -1,7 +1,6 @@
/*
* Common code to handle map devices which are simple ROM
* (C) 2000 Red Hat. GPL'd.
* $Id: map_rom.c,v 1.23 2005/01/05 18:05:12 dwmw2 Exp $
*/
#include <linux/module.h>

View File

@ -1,6 +1,4 @@
/*
* $Id: cmdlinepart.c,v 1.19 2005/11/07 11:14:19 gleixner Exp $
*
* Read flash partition table from command line
*
* Copyright 2002 SYSGO Real-Time Solutions GmbH
@ -308,7 +306,7 @@ static int parse_cmdline_partitions(struct mtd_info *master,
unsigned long offset;
int i;
struct cmdline_mtd_partition *part;
char *mtd_id = master->name;
const char *mtd_id = master->name;
/* parse command line */
if (!cmdline_parsed)

View File

@ -1,5 +1,4 @@
# drivers/mtd/maps/Kconfig
# $Id: Kconfig,v 1.18 2005/11/07 11:14:24 gleixner Exp $
menu "Self-contained MTD device drivers"
depends on MTD!=n

View File

@ -1,7 +1,6 @@
#
# linux/drivers/devices/Makefile
#
# $Id: Makefile.common,v 1.7 2004/12/22 17:51:15 joern Exp $
obj-$(CONFIG_MTD_DOC2000) += doc2000.o
obj-$(CONFIG_MTD_DOC2001) += doc2001.o

View File

@ -1,6 +1,4 @@
/*
* $Id: block2mtd.c,v 1.30 2005/11/29 14:48:32 gleixner Exp $
*
* block2mtd.c - create an mtd from a block device
*
* Copyright (C) 2001,2002 Simon Evans <spse@secret.org.uk>
@ -20,9 +18,6 @@
#include <linux/mutex.h>
#include <linux/mount.h>
#define VERSION "$Revision: 1.30 $"
#define ERROR(fmt, args...) printk(KERN_ERR "block2mtd: " fmt "\n" , ## args)
#define INFO(fmt, args...) printk(KERN_INFO "block2mtd: " fmt "\n" , ## args)
@ -453,7 +448,6 @@ MODULE_PARM_DESC(block2mtd, "Device to use. \"block2mtd=<dev>[,<erasesize>]\"");
static int __init block2mtd_init(void)
{
int ret = 0;
INFO("version " VERSION);
#ifndef MODULE
if (strlen(block2mtd_paramline))

View File

@ -3,8 +3,6 @@
* Linux driver for Disk-On-Chip 2000 and Millennium
* (c) 1999 Machine Vision Holdings, Inc.
* (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
*
* $Id: doc2000.c,v 1.67 2005/11/07 11:14:24 gleixner Exp $
*/
#include <linux/kernel.h>

View File

@ -3,8 +3,6 @@
* Linux driver for Disk-On-Chip Millennium
* (c) 1999 Machine Vision Holdings, Inc.
* (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
*
* $Id: doc2001.c,v 1.49 2005/11/07 11:14:24 gleixner Exp $
*/
#include <linux/kernel.h>

View File

@ -6,8 +6,6 @@
* (c) 1999 Machine Vision Holdings, Inc.
* (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
*
* $Id: doc2001plus.c,v 1.14 2005/11/07 11:14:24 gleixner Exp $
*
* Released under GPL
*/

View File

@ -7,8 +7,6 @@
* Author: Fabrice Bellard (fabrice.bellard@netgem.com)
* Copyright (C) 2000 Netgem S.A.
*
* $Id: docecc.c,v 1.7 2005/11/07 11:14:25 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or

View File

@ -4,9 +4,6 @@
/* (C) 1999 Machine Vision Holdings, Inc. */
/* (C) 1999-2003 David Woodhouse <dwmw2@infradead.org> */
/* $Id: docprobe.c,v 1.46 2005/11/07 11:14:25 gleixner Exp $ */
/* DOC_PASSIVE_PROBE:
In order to ensure that the BIOS checksum is correct at boot time, and
@ -79,8 +76,6 @@ static unsigned long __initdata doc_locations[] = {
0xe0000, 0xe2000, 0xe4000, 0xe6000,
0xe8000, 0xea000, 0xec000, 0xee000,
#endif /* CONFIG_MTD_DOCPROBE_HIGH */
#elif defined(__PPC__)
0xe4000000,
#else
#warning Unknown architecture for DiskOnChip. No default probe locations defined
#endif

View File

@ -2,8 +2,6 @@
/*
* MTD driver for the 28F160F3 Flash Memory (non-CFI) on LART.
*
* $Id: lart.c,v 1.9 2005/11/07 11:14:25 gleixner Exp $
*
* Author: Abraham vd Merwe <abraham@2d3d.co.za>
*
* Copyright (c) 2001, 2d3D, Inc.

View File

@ -33,6 +33,7 @@
/* Flash opcodes. */
#define OPCODE_WREN 0x06 /* Write enable */
#define OPCODE_RDSR 0x05 /* Read status register */
#define OPCODE_WRSR 0x01 /* Write status register 1 byte */
#define OPCODE_NORM_READ 0x03 /* Read data bytes (low frequency) */
#define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */
#define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */
@ -112,6 +113,17 @@ static int read_sr(struct m25p *flash)
return val;
}
/*
* Write status register 1 byte
* Returns negative if error occurred.
*/
static int write_sr(struct m25p *flash, u8 val)
{
flash->command[0] = OPCODE_WRSR;
flash->command[1] = val;
return spi_write(flash->spi, flash->command, 2);
}
/*
* Set write enable latch with Write Enable command.
@ -589,6 +601,16 @@ static int __devinit m25p_probe(struct spi_device *spi)
mutex_init(&flash->lock);
dev_set_drvdata(&spi->dev, flash);
/*
* Atmel serial flash tend to power up
* with the software protection bits set
*/
if (info->jedec_id >> 16 == 0x1f) {
write_enable(flash);
write_sr(flash, 0);
}
if (data && data->name)
flash->mtd.name = data->name;
else

View File

@ -5,8 +5,6 @@
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* $Id: ms02-nv.c,v 1.11 2005/11/14 13:41:47 macro Exp $
*/
#include <linux/init.h>

View File

@ -9,8 +9,6 @@
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* $Id: ms02-nv.h,v 1.3 2003/08/19 09:25:36 dwmw2 Exp $
*/
#include <linux/ioport.h>

View File

@ -82,7 +82,7 @@
struct dataflash {
u8 command[4];
uint8_t command[4];
char name[24];
unsigned partitioned:1;
@ -150,7 +150,7 @@ static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
struct spi_transfer x = { .tx_dma = 0, };
struct spi_message msg;
unsigned blocksize = priv->page_size << 3;
u8 *command;
uint8_t *command;
DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%x len 0x%x\n",
spi->dev.bus_id,
@ -182,8 +182,8 @@ static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
pageaddr = pageaddr << priv->page_offset;
command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
command[1] = (u8)(pageaddr >> 16);
command[2] = (u8)(pageaddr >> 8);
command[1] = (uint8_t)(pageaddr >> 16);
command[2] = (uint8_t)(pageaddr >> 8);
command[3] = 0;
DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n",
@ -234,7 +234,7 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
struct spi_transfer x[2] = { { .tx_dma = 0, }, };
struct spi_message msg;
unsigned int addr;
u8 *command;
uint8_t *command;
int status;
DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n",
@ -274,9 +274,9 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
* fewer "don't care" bytes. Both buffers stay unchanged.
*/
command[0] = OP_READ_CONTINUOUS;
command[1] = (u8)(addr >> 16);
command[2] = (u8)(addr >> 8);
command[3] = (u8)(addr >> 0);
command[1] = (uint8_t)(addr >> 16);
command[2] = (uint8_t)(addr >> 8);
command[3] = (uint8_t)(addr >> 0);
/* plus 4 "don't care" bytes */
status = spi_sync(priv->spi, &msg);
@ -311,7 +311,7 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
size_t remaining = len;
u_char *writebuf = (u_char *) buf;
int status = -EINVAL;
u8 *command;
uint8_t *command;
DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n",
spi->dev.bus_id, (unsigned)to, (unsigned)(to + len));
@ -487,7 +487,9 @@ add_dataflash(struct spi_device *spi, char *name,
device->write = dataflash_write;
device->priv = priv;
dev_info(&spi->dev, "%s (%d KBytes)\n", name, device->size/1024);
dev_info(&spi->dev, "%s (%d KBytes) pagesize %d bytes, "
"erasesize %d bytes\n", name, device->size/1024,
pagesize, pagesize * 8); /* 8 pages = 1 block */
dev_set_drvdata(&spi->dev, priv);
if (mtd_has_partitions()) {
@ -521,7 +523,7 @@ add_dataflash(struct spi_device *spi, char *name,
*
* Device Density ID code #Pages PageSize Offset
* AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
* AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1025 264 9
* AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
* AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
* AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
* AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
@ -529,9 +531,114 @@ add_dataflash(struct spi_device *spi, char *name,
* AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
* AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
*/
struct flash_info {
char *name;
/* JEDEC id zero means "no ID" (most older chips); otherwise it has
* a high byte of zero plus three data bytes: the manufacturer id,
* then a two byte device id.
*/
uint32_t jedec_id;
/* The size listed here is what works with OPCODE_SE, which isn't
* necessarily called a "sector" by the vendor.
*/
unsigned nr_pages;
uint16_t pagesize;
uint16_t pageoffset;
uint16_t flags;
#define SUP_POW2PS 0x02
#define IS_POW2PS 0x01
};
static struct flash_info __devinitdata dataflash_data [] = {
{ "at45db011d", 0x1f2200, 512, 264, 9, SUP_POW2PS},
{ "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
{ "at45db021d", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
{ "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
{ "at45db041d", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
{ "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
{ "at45db081d", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
{ "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
{ "at45db161d", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
{ "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
{ "at45db321c", 0x1f2700, 8192, 528, 10, },
{ "at45db321d", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
{ "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
{ "at45db641d", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
{ "at45db641d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
};
static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
{
int tmp;
uint8_t code = OP_READ_ID;
uint8_t id[3];
uint32_t jedec;
struct flash_info *info;
int status;
/* JEDEC also defines an optional "extended device information"
* string for after vendor-specific data, after the three bytes
* we use here. Supporting some chips might require using it.
*/
tmp = spi_write_then_read(spi, &code, 1, id, 3);
if (tmp < 0) {
DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
spi->dev.bus_id, tmp);
return NULL;
}
jedec = id[0];
jedec = jedec << 8;
jedec |= id[1];
jedec = jedec << 8;
jedec |= id[2];
for (tmp = 0, info = dataflash_data;
tmp < ARRAY_SIZE(dataflash_data);
tmp++, info++) {
if (info->jedec_id == jedec) {
if (info->flags & SUP_POW2PS) {
status = dataflash_status(spi);
if (status & 0x1)
/* return power of 2 pagesize */
return ++info;
else
return info;
}
}
}
return NULL;
}
static int __devinit dataflash_probe(struct spi_device *spi)
{
int status;
struct flash_info *info;
/*
* Try to detect dataflash by JEDEC ID.
* If it succeeds we know we have either a C or D part.
* D will support power of 2 pagesize option.
*/
info = jedec_probe(spi);
if (info != NULL)
return add_dataflash(spi, info->name, info->nr_pages,
info->pagesize, info->pageoffset);
status = dataflash_status(spi);
if (status <= 0 || status == 0xff) {
@ -551,16 +658,16 @@ static int __devinit dataflash_probe(struct spi_device *spi)
status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
break;
case 0x14: /* 0 1 0 1 x x */
status = add_dataflash(spi, "AT45DB021B", 1025, 264, 9);
status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
break;
case 0x1c: /* 0 1 1 1 x x */
status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
status = add_dataflash(spi, "AT45DB041B", 2048, 264, 9);
break;
case 0x24: /* 1 0 0 1 x x */
status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
break;
case 0x2c: /* 1 0 1 1 x x */
status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
status = add_dataflash(spi, "AT45DB161B", 4096, 528, 10);
break;
case 0x34: /* 1 1 0 1 x x */
status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);

View File

@ -1,6 +1,5 @@
/*
* mtdram - a test mtd device
* $Id: mtdram.c,v 1.37 2005/04/21 03:42:11 joern Exp $
* Author: Alexander Larsson <alex@cendio.se>
*
* Copyright (c) 1999 Alexander Larsson <alex@cendio.se>

View File

@ -1,6 +1,4 @@
/**
* $Id: phram.c,v 1.16 2005/11/07 11:14:25 gleixner Exp $
*
* Copyright (c) ???? Jochen Schäuble <psionic@psionic.de>
* Copyright (c) 2003-2004 Joern Engel <joern@wh.fh-wedel.de>
*

View File

@ -1,6 +1,4 @@
/*
* $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $
*
* PMC551 PCI Mezzanine Ram Device
*
* Author:

View File

@ -1,7 +1,5 @@
/*======================================================================
$Id: slram.c,v 1.36 2005/11/07 11:14:25 gleixner Exp $
This driver provides a method to access memory not used by the kernel
itself (i.e. if the kernel commandline mem=xxx is used). To actually
use slram at least mtdblock or mtdchar is required (for block or

View File

@ -1,5 +1,4 @@
/* This version ported to the Linux-MTD system by dwmw2@infradead.org
* $Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $
*
* Fixes: Arnaldo Carvalho de Melo <acme@conectiva.com.br>
* - fixes some leaks on failure in build_maps and ftl_notify_add, cleanups
@ -1078,8 +1077,6 @@ static struct mtd_blktrans_ops ftl_tr = {
static int init_ftl(void)
{
DEBUG(0, "$Id: ftl.c,v 1.59 2005/11/29 14:48:31 gleixner Exp $\n");
return register_mtd_blktrans(&ftl_tr);
}

View File

@ -7,8 +7,6 @@
* (c) 1999 Machine Vision Holdings, Inc.
* Author: David Woodhouse <dwmw2@infradead.org>
*
* $Id: inftlcore.c,v 1.19 2005/11/07 11:14:20 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@ -953,9 +951,6 @@ static struct mtd_blktrans_ops inftl_tr = {
static int __init init_inftl(void)
{
printk(KERN_INFO "INFTL: inftlcore.c $Revision: 1.19 $, "
"inftlmount.c %s\n", inftlmountrev);
return register_mtd_blktrans(&inftl_tr);
}

View File

@ -8,8 +8,6 @@
* Author: Fabrice Bellard (fabrice.bellard@netgem.com)
* Copyright (C) 2000 Netgem S.A.
*
* $Id: inftlmount.c,v 1.18 2005/11/07 11:14:20 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@ -39,8 +37,6 @@
#include <linux/mtd/inftl.h>
#include <linux/mtd/compatmac.h>
char inftlmountrev[]="$Revision: 1.18 $";
/*
* find_boot_record: Find the INFTL Media Header and its Spare copy which
* contains the various device information of the INFTL partition and

View File

@ -1,5 +1,4 @@
# drivers/mtd/maps/Kconfig
# $Id: Kconfig,v 1.61 2005/11/07 11:14:26 gleixner Exp $
menu "Mapping drivers for chip access"
depends on MTD!=n
@ -510,6 +509,17 @@ config MTD_PCMCIA_ANONYMOUS
If unsure, say N.
config MTD_BFIN_ASYNC
tristate "Blackfin BF533-STAMP Flash Chip Support"
depends on BFIN533_STAMP && MTD_CFI
select MTD_PARTITIONS
default y
help
Map driver which allows for simultaneous utilization of
ethernet and CFI parallel flash.
If compiled as a module, it will be called bfin-async-flash.
config MTD_UCLINUX
tristate "Generic uClinux RAM/ROM filesystem support"
depends on MTD_PARTITIONS && !MMU
@ -539,24 +549,6 @@ config MTD_DMV182
help
Map driver for Dy-4 SVME/DMV-182 board.
config MTD_BAST
tristate "Map driver for Simtec BAST (EB2410ITX) or Thorcom VR1000"
depends on ARCH_BAST || MACH_VR1000
select MTD_PARTITIONS
select MTD_MAP_BANK_WIDTH_16
select MTD_JEDECPROBE
help
Map driver for NOR flash on the Simtec BAST (EB2410ITX), or the
Thorcom VR1000
Note, this driver *cannot* over-ride the WP link on the
board, or currently detect the state of the link.
config MTD_BAST_MAXSIZE
int "Maximum size for BAST flash area (MiB)"
depends on MTD_BAST
default "4"
config MTD_SHARP_SL
tristate "ROM mapped on Sharp SL Series"
depends on ARCH_PXA

View File

@ -1,7 +1,6 @@
#
# linux/drivers/maps/Makefile
#
# $Id: Makefile.common,v 1.34 2005/11/07 11:14:26 gleixner Exp $
ifeq ($(CONFIG_MTD_COMPLEX_MAPPINGS),y)
obj-$(CONFIG_MTD) += map_funcs.o
@ -10,7 +9,6 @@ endif
# Chip mappings
obj-$(CONFIG_MTD_CDB89712) += cdb89712.o
obj-$(CONFIG_MTD_ARM_INTEGRATOR)+= integrator-flash.o
obj-$(CONFIG_MTD_BAST) += bast-flash.o
obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
obj-$(CONFIG_MTD_DC21285) += dc21285.o
obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o
@ -66,3 +64,4 @@ obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o
obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o

View File

@ -2,7 +2,6 @@
* amd76xrom.c
*
* Normal mappings of chips in physical memory
* $Id: amd76xrom.c,v 1.21 2005/11/07 11:14:26 gleixner Exp $
*/
#include <linux/module.h>

View File

@ -2,8 +2,6 @@
* NV-RAM memory access on autcpu12
* (C) 2002 Thomas Gleixner (gleixner@autronix.de)
*
* $Id: autcpu12-nvram.c,v 1.9 2005/11/07 11:14:26 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or

View File

@ -1,226 +0,0 @@
/* linux/drivers/mtd/maps/bast-flash.c
*
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Simtec Bast (EB2410ITX) NOR MTD Mapping driver
*
* Changelog:
* 20-Sep-2004 BJD Initial version
* 17-Jan-2005 BJD Add whole device if no partitions found
*
* $Id: bast-flash.c,v 1.5 2005/11/07 11:14:26 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/ioport.h>
#include <linux/device.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <asm/mach/flash.h>
#include <asm/arch/map.h>
#include <asm/arch/bast-map.h>
#include <asm/arch/bast-cpld.h>
#ifdef CONFIG_MTD_BAST_MAXSIZE
#define AREA_MAXSIZE (CONFIG_MTD_BAST_MAXSIZE * SZ_1M)
#else
#define AREA_MAXSIZE (32 * SZ_1M)
#endif
#define PFX "bast-flash: "
struct bast_flash_info {
struct mtd_info *mtd;
struct map_info map;
struct mtd_partition *partitions;
struct resource *area;
};
static const char *probes[] = { "RedBoot", "cmdlinepart", NULL };
static void bast_flash_setrw(int to)
{
unsigned int val;
unsigned long flags;
local_irq_save(flags);
val = __raw_readb(BAST_VA_CTRL3);
if (to)
val |= BAST_CPLD_CTRL3_ROMWEN;
else
val &= ~BAST_CPLD_CTRL3_ROMWEN;
pr_debug("new cpld ctrl3=%02x\n", val);
__raw_writeb(val, BAST_VA_CTRL3);
local_irq_restore(flags);
}
static int bast_flash_remove(struct platform_device *pdev)
{
struct bast_flash_info *info = platform_get_drvdata(pdev);
platform_set_drvdata(pdev, NULL);
if (info == NULL)
return 0;
if (info->map.virt != NULL)
iounmap(info->map.virt);
if (info->mtd) {
del_mtd_partitions(info->mtd);
map_destroy(info->mtd);
}
kfree(info->partitions);
if (info->area) {
release_resource(info->area);
kfree(info->area);
}
kfree(info);
return 0;
}
static int bast_flash_probe(struct platform_device *pdev)
{
struct bast_flash_info *info;
struct resource *res;
int err = 0;
info = kmalloc(sizeof(*info), GFP_KERNEL);
if (info == NULL) {
printk(KERN_ERR PFX "no memory for flash info\n");
err = -ENOMEM;
goto exit_error;
}
memzero(info, sizeof(*info));
platform_set_drvdata(pdev, info);
res = pdev->resource; /* assume that the flash has one resource */
info->map.phys = res->start;
info->map.size = res->end - res->start + 1;
info->map.name = pdev->dev.bus_id;
info->map.bankwidth = 2;
if (info->map.size > AREA_MAXSIZE)
info->map.size = AREA_MAXSIZE;
pr_debug("%s: area %08lx, size %ld\n", __func__,
info->map.phys, info->map.size);
info->area = request_mem_region(res->start, info->map.size,
pdev->name);
if (info->area == NULL) {
printk(KERN_ERR PFX "cannot reserve flash memory region\n");
err = -ENOENT;
goto exit_error;
}
info->map.virt = ioremap(res->start, info->map.size);
pr_debug("%s: virt at %08x\n", __func__, (int)info->map.virt);
if (info->map.virt == 0) {
printk(KERN_ERR PFX "failed to ioremap() region\n");
err = -EIO;
goto exit_error;
}
simple_map_init(&info->map);
/* enable the write to the flash area */
bast_flash_setrw(1);
/* probe for the device(s) */
info->mtd = do_map_probe("jedec_probe", &info->map);
if (info->mtd == NULL)
info->mtd = do_map_probe("cfi_probe", &info->map);
if (info->mtd == NULL) {
printk(KERN_ERR PFX "map_probe() failed\n");
err = -ENXIO;
goto exit_error;
}
/* mark ourselves as the owner */
info->mtd->owner = THIS_MODULE;
err = parse_mtd_partitions(info->mtd, probes, &info->partitions, 0);
if (err > 0) {
err = add_mtd_partitions(info->mtd, info->partitions, err);
if (err)
printk(KERN_ERR PFX "cannot add/parse partitions\n");
} else {
err = add_mtd_device(info->mtd);
}
if (err == 0)
return 0;
/* fall through to exit error */
exit_error:
bast_flash_remove(pdev);
return err;
}
static struct platform_driver bast_flash_driver = {
.probe = bast_flash_probe,
.remove = bast_flash_remove,
.driver = {
.name = "bast-nor",
.owner = THIS_MODULE,
},
};
static int __init bast_flash_init(void)
{
printk("BAST NOR-Flash Driver, (c) 2004 Simtec Electronics\n");
return platform_driver_register(&bast_flash_driver);
}
static void __exit bast_flash_exit(void)
{
platform_driver_unregister(&bast_flash_driver);
}
module_init(bast_flash_init);
module_exit(bast_flash_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
MODULE_DESCRIPTION("BAST MTD Map driver");
MODULE_ALIAS("platform:bast-nor");

View File

@ -0,0 +1,219 @@
/*
* drivers/mtd/maps/bfin-async-flash.c
*
* Handle the case where flash memory and ethernet mac/phy are
* mapped onto the same async bank. The BF533-STAMP does this
* for example. All board-specific configuration goes in your
* board resources file.
*
* Copyright 2000 Nicolas Pitre <nico@cam.org>
* Copyright 2005-2008 Analog Devices Inc.
*
* Enter bugs at http://blackfin.uclinux.org/
*
* Licensed under the GPL-2 or later.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <asm/blackfin.h>
#include <linux/gpio.h>
#include <linux/io.h>
#include <asm/unaligned.h>
#define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); })
#define DRIVER_NAME "bfin-async-flash"
struct async_state {
struct mtd_info *mtd;
struct map_info map;
int enet_flash_pin;
uint32_t flash_ambctl0, flash_ambctl1;
uint32_t save_ambctl0, save_ambctl1;
unsigned long irq_flags;
};
static void switch_to_flash(struct async_state *state)
{
local_irq_save(state->irq_flags);
gpio_set_value(state->enet_flash_pin, 0);
state->save_ambctl0 = bfin_read_EBIU_AMBCTL0();
state->save_ambctl1 = bfin_read_EBIU_AMBCTL1();
bfin_write_EBIU_AMBCTL0(state->flash_ambctl0);
bfin_write_EBIU_AMBCTL1(state->flash_ambctl1);
SSYNC();
}
static void switch_back(struct async_state *state)
{
bfin_write_EBIU_AMBCTL0(state->save_ambctl0);
bfin_write_EBIU_AMBCTL1(state->save_ambctl1);
SSYNC();
gpio_set_value(state->enet_flash_pin, 1);
local_irq_restore(state->irq_flags);
}
static map_word bfin_read(struct map_info *map, unsigned long ofs)
{
struct async_state *state = (struct async_state *)map->map_priv_1;
uint16_t word;
map_word test;
switch_to_flash(state);
word = readw(map->virt + ofs);
switch_back(state);
test.x[0] = word;
return test;
}
static void bfin_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
{
struct async_state *state = (struct async_state *)map->map_priv_1;
switch_to_flash(state);
memcpy(to, map->virt + from, len);
switch_back(state);
}
static void bfin_write(struct map_info *map, map_word d1, unsigned long ofs)
{
struct async_state *state = (struct async_state *)map->map_priv_1;
uint16_t d;
d = d1.x[0];
switch_to_flash(state);
writew(d, map->virt + ofs);
SSYNC();
switch_back(state);
}
static void bfin_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
{
struct async_state *state = (struct async_state *)map->map_priv_1;
switch_to_flash(state);
memcpy(map->virt + to, from, len);
SSYNC();
switch_back(state);
}
#ifdef CONFIG_MTD_PARTITIONS
static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
#endif
static int __devinit bfin_flash_probe(struct platform_device *pdev)
{
int ret;
struct physmap_flash_data *pdata = pdev->dev.platform_data;
struct resource *memory = platform_get_resource(pdev, IORESOURCE_MEM, 0);
struct resource *flash_ambctl = platform_get_resource(pdev, IORESOURCE_MEM, 1);
struct async_state *state;
state = kzalloc(sizeof(*state), GFP_KERNEL);
if (!state)
return -ENOMEM;
state->map.name = DRIVER_NAME;
state->map.read = bfin_read;
state->map.copy_from = bfin_copy_from;
state->map.write = bfin_write;
state->map.copy_to = bfin_copy_to;
state->map.bankwidth = pdata->width;
state->map.size = memory->end - memory->start + 1;
state->map.virt = (void __iomem *)memory->start;
state->map.phys = memory->start;
state->map.map_priv_1 = (unsigned long)state;
state->enet_flash_pin = platform_get_irq(pdev, 0);
state->flash_ambctl0 = flash_ambctl->start;
state->flash_ambctl1 = flash_ambctl->end;
if (gpio_request(state->enet_flash_pin, DRIVER_NAME)) {
pr_devinit(KERN_ERR DRIVER_NAME ": Failed to request gpio %d\n", state->enet_flash_pin);
return -EBUSY;
}
gpio_direction_output(state->enet_flash_pin, 1);
pr_devinit(KERN_NOTICE DRIVER_NAME ": probing %d-bit flash bus\n", state->map.bankwidth * 8);
state->mtd = do_map_probe(memory->name, &state->map);
if (!state->mtd)
return -ENXIO;
#ifdef CONFIG_MTD_PARTITIONS
ret = parse_mtd_partitions(state->mtd, part_probe_types, &pdata->parts, 0);
if (ret > 0) {
pr_devinit(KERN_NOTICE DRIVER_NAME ": Using commandline partition definition\n");
add_mtd_partitions(state->mtd, pdata->parts, ret);
} else if (pdata->nr_parts) {
pr_devinit(KERN_NOTICE DRIVER_NAME ": Using board partition definition\n");
add_mtd_partitions(state->mtd, pdata->parts, pdata->nr_parts);
} else
#endif
{
pr_devinit(KERN_NOTICE DRIVER_NAME ": no partition info available, registering whole flash at once\n");
add_mtd_device(state->mtd);
}
platform_set_drvdata(pdev, state);
return 0;
}
static int __devexit bfin_flash_remove(struct platform_device *pdev)
{
struct async_state *state = platform_get_drvdata(pdev);
gpio_free(state->enet_flash_pin);
#ifdef CONFIG_MTD_PARTITIONS
del_mtd_partitions(state->mtd);
#endif
map_destroy(state->mtd);
kfree(state);
return 0;
}
static struct platform_driver bfin_flash_driver = {
.probe = bfin_flash_probe,
.remove = __devexit_p(bfin_flash_remove),
.driver = {
.name = DRIVER_NAME,
},
};
static int __init bfin_flash_init(void)
{
return platform_driver_register(&bfin_flash_driver);
}
module_init(bfin_flash_init);
static void __exit bfin_flash_exit(void)
{
platform_driver_unregister(&bfin_flash_driver);
}
module_exit(bfin_flash_exit);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("MTD map driver for Blackfins with flash/ethernet on same async bank");

View File

@ -1,7 +1,6 @@
/*
* Flash on Cirrus CDB89712
*
* $Id: cdb89712.c,v 1.11 2005/11/07 11:14:26 gleixner Exp $
*/
#include <linux/module.h>

View File

@ -11,7 +11,6 @@
*
* (C) 2000 Nicolas Pitre <nico@cam.org>
*
* $Id: ceiva.c,v 1.11 2004/09/16 23:27:12 gleixner Exp $
*/
#include <linux/module.h>

View File

@ -1,8 +1,6 @@
/*
* Copyright © 2001 Flaga hf. Medical Devices, Kári Davíðsson <kd@flaga.is>
*
* $Id: cfi_flagadm.c,v 1.15 2005/11/07 11:14:26 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your

View File

@ -1,6 +1,4 @@
/*
* $Id: dbox2-flash.c,v 1.14 2005/11/07 11:14:26 gleixner Exp $
*
* D-Box 2 flash driver
*/

View File

@ -4,8 +4,6 @@
* (C) 2000 Nicolas Pitre <nico@cam.org>
*
* This code is GPL
*
* $Id: dc21285.c,v 1.24 2005/11/07 11:14:26 gleixner Exp $
*/
#include <linux/module.h>
#include <linux/types.h>

View File

@ -14,8 +14,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*
* $Id: dilnetpc.c,v 1.20 2005/11/07 11:14:26 gleixner Exp $
*
* The DIL/Net PC is a tiny embedded PC board made by SSV Embedded Systems
* featuring the AMD Elan SC410 processor. There are two variants of this
* board: DNP/1486 and ADNP/1486. The DNP version has 2 megs of flash

View File

@ -4,8 +4,6 @@
*
* Flash map driver for the Dy4 SVME182 board
*
* $Id: dmv182.c,v 1.6 2005/11/07 11:14:26 gleixner Exp $
*
* Copyright 2003-2004, TimeSys Corporation
*
* Based on the SVME181 flash map, by Tom Nelson, Dot4, Inc. for TimeSys Corp.

View File

@ -1,6 +1,4 @@
/*
* $Id: ebony.c,v 1.16 2005/11/07 11:14:26 gleixner Exp $
*
* Mapping for Ebony user flash
*
* Matt Porter <mporter@kernel.crashing.org>

View File

@ -1,6 +1,4 @@
/*
* $Id: edb7312.c,v 1.14 2005/11/07 11:14:27 gleixner Exp $
*
* Handle mapping of the NOR flash on Cogent EDB7312 boards
*
* Copyright 2002 SYSGO Real-Time Solutions GmbH

View File

@ -1,6 +1,5 @@
/* fortunet.c memory map
*
* $Id: fortunet.c,v 1.11 2005/11/07 11:14:27 gleixner Exp $
*/
#include <linux/module.h>

View File

@ -2,8 +2,6 @@
* Flash memory access on Hynix GMS30C7201/HMS30C7202 based
* evaluation boards
*
* $Id: h720x-flash.c,v 1.12 2005/11/07 11:14:27 gleixner Exp $
*
* (C) 2002 Jungjun Kim <jungjun.kim@hynix.com>
* 2003 Thomas Gleixner <tglx@linutronix.de>
*/

View File

@ -2,7 +2,6 @@
* ichxrom.c
*
* Normal mappings of chips in physical memory
* $Id: ichxrom.c,v 1.19 2005/11/07 11:14:27 gleixner Exp $
*/
#include <linux/module.h>

View File

@ -1,6 +1,4 @@
/*
* $Id: impa7.c,v 1.14 2005/11/07 11:14:27 gleixner Exp $
*
* Handle mapping of the NOR flash on implementa A7 boards
*
* Copyright 2002 SYSGO Real-Time Solutions GmbH

View File

@ -22,8 +22,6 @@
This is access code for flashes using ARM's flash partitioning
standards.
$Id: integrator-flash.c,v 1.20 2005/11/07 11:14:27 gleixner Exp $
======================================================================*/
#include <linux/module.h>

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@ -4,8 +4,6 @@
* (C) 2000 Nicolas Pitre <nico@cam.org>
* (C) 2002 Hewlett-Packard Company <jamey.hicks@hp.com>
* (C) 2003 Christian Pellegrin <chri@ascensit.com>, <chri@infis.univ.ts.it>: concatenation of multiple flashes
*
* $Id: ipaq-flash.c,v 1.5 2005/11/07 11:14:27 gleixner Exp $
*/
#include <linux/module.h>

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@ -1,6 +1,4 @@
/*
* $Id: ixp2000.c,v 1.9 2005/11/07 11:14:27 gleixner Exp $
*
* drivers/mtd/maps/ixp2000.c
*
* Mapping for the Intel XScale IXP2000 based systems

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@ -1,6 +1,4 @@
/*
* $Id: ixp4xx.c,v 1.13 2005/11/16 16:23:21 dvrabel Exp $
*
* drivers/mtd/maps/ixp4xx.c
*
* MTD Map file for IXP4XX based systems. Please do not make per-board

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@ -1,6 +1,4 @@
/*
* $Id: l440gx.c,v 1.18 2005/11/07 11:14:27 gleixner Exp $
*
* BIOS Flash chip on Intel 440GX board.
*
* Bugs this currently does not work under linuxBIOS.

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@ -1,6 +1,4 @@
/*
* $Id: map_funcs.c,v 1.10 2005/06/06 23:04:36 tpoynor Exp $
*
* Out-of-line map I/O functions for simple maps when CONFIG_COMPLEX_MAPPINGS
* is enabled.
*/

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@ -1,6 +1,4 @@
/*
* $Id: mbx860.c,v 1.9 2005/11/07 11:14:27 gleixner Exp $
*
* Handle mapping of the flash on MBX860 boards
*
* Author: Anton Todorov

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@ -3,8 +3,6 @@
* Copyright (C) 2001 Mark Langsdorf (mark.langsdorf@amd.com)
* based on sc520cdp.c by Sysgo Real-Time Solutions GmbH
*
* $Id: netsc520.c,v 1.14 2005/11/07 11:14:27 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or

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@ -5,8 +5,6 @@
*
* (C) Copyright 2000-2001, Greg Ungerer (gerg@snapgear.com)
* (C) Copyright 2001-2002, SnapGear (www.snapgear.com)
*
* $Id: nettel.c,v 1.12 2005/11/29 14:30:00 gleixner Exp $
*/
/****************************************************************************/

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@ -1,4 +1,3 @@
// $Id: octagon-5066.c,v 1.28 2005/11/07 11:14:27 gleixner Exp $
/* ######################################################################
Octagon 5066 MTD Driver.

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@ -4,8 +4,6 @@
* jzhang@ti.com (C) 2003 Texas Instruments.
*
* (C) 2002 MontVista Software, Inc.
*
* $Id: omap-toto-flash.c,v 1.5 2005/11/07 11:14:27 gleixner Exp $
*/
#include <linux/module.h>

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@ -7,8 +7,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* $Id: pci.c,v 1.14 2005/11/17 08:20:27 dwmw2 Exp $
*
* Generic PCI memory map driver. We support the following boards:
* - Intel IQ80310 ATU.
* - Intel EBSA285 (blank rom programming mode). Tested working 27/09/2001

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@ -1,6 +1,4 @@
/*
* $Id: pcmciamtd.c,v 1.55 2005/11/07 11:14:28 gleixner Exp $
*
* pcmciamtd.c - MTD driver for PCMCIA flash memory cards
*
* Author: Simon Evans <spse@secret.org.uk>
@ -48,7 +46,6 @@ static const int debug = 0;
#define DRIVER_DESC "PCMCIA Flash memory card driver"
#define DRIVER_VERSION "$Revision: 1.55 $"
/* Size of the PCMCIA address space: 26 bits = 64 MB */
#define MAX_PCMCIA_ADDR 0x4000000
@ -785,7 +782,7 @@ static struct pcmcia_driver pcmciamtd_driver = {
static int __init init_pcmciamtd(void)
{
info(DRIVER_DESC " " DRIVER_VERSION);
info(DRIVER_DESC);
if(bankwidth && bankwidth != 1 && bankwidth != 2) {
info("bad bankwidth (%d), using default", bankwidth);

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@ -1,6 +1,4 @@
/*
* $Id: physmap.c,v 1.39 2005/11/29 14:49:36 gleixner Exp $
*
* Normal mappings of chips in physical memory
*
* Copyright (C) 2003 MontaVista Software Inc.
@ -203,7 +201,19 @@ static int physmap_flash_suspend(struct platform_device *dev, pm_message_t state
int i;
for (i = 0; i < MAX_RESOURCES && info->mtd[i]; i++)
ret |= info->mtd[i]->suspend(info->mtd[i]);
if (info->mtd[i]->suspend) {
ret = info->mtd[i]->suspend(info->mtd[i]);
if (ret)
goto fail;
}
return 0;
fail:
for (--i; i >= 0; --i)
if (info->mtd[i]->suspend) {
BUG_ON(!info->mtd[i]->resume);
info->mtd[i]->resume(info->mtd[i]);
}
return ret;
}
@ -214,7 +224,8 @@ static int physmap_flash_resume(struct platform_device *dev)
int i;
for (i = 0; i < MAX_RESOURCES && info->mtd[i]; i++)
info->mtd[i]->resume(info->mtd[i]);
if (info->mtd[i]->resume)
info->mtd[i]->resume(info->mtd[i]);
return 0;
}
@ -225,8 +236,9 @@ static void physmap_flash_shutdown(struct platform_device *dev)
int i;
for (i = 0; i < MAX_RESOURCES && info->mtd[i]; i++)
if (info->mtd[i]->suspend(info->mtd[i]) == 0)
info->mtd[i]->resume(info->mtd[i]);
if (info->mtd[i]->suspend && info->mtd[i]->resume)
if (info->mtd[i]->suspend(info->mtd[i]) == 0)
info->mtd[i]->resume(info->mtd[i]);
}
#else
#define physmap_flash_suspend NULL

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@ -6,8 +6,6 @@
*
* Generic platfrom device based RAM map
*
* $Id: plat-ram.c,v 1.7 2005/11/07 11:14:28 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or

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@ -1,6 +1,4 @@
/*
* $Id: redwood.c,v 1.11 2005/11/07 11:14:28 gleixner Exp $
*
* drivers/mtd/maps/redwood.c
*
* FLASH map for the IBM Redwood 4/5/6 boards.

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@ -1,6 +1,4 @@
/*
* $Id: rpxlite.c,v 1.22 2004/11/04 13:24:15 gleixner Exp $
*
* Handle mapping of the flash on the RPX Lite and CLLF boards
*/

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@ -2,8 +2,6 @@
* Flash memory access on SA11x0 based devices
*
* (C) 2000 Nicolas Pitre <nico@cam.org>
*
* $Id: sa1100-flash.c,v 1.51 2005/11/07 11:14:28 gleixner Exp $
*/
#include <linux/module.h>
#include <linux/types.h>

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@ -4,9 +4,6 @@
* Carolyn Smith, Tektronix, Inc.
*
* This code is GPLed
*
* $Id: sbc8240.c,v 1.5 2005/11/07 11:14:28 gleixner Exp $
*
*/
/*

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@ -17,8 +17,6 @@
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
$Id: sbc_gxx.c,v 1.35 2005/11/07 11:14:28 gleixner Exp $
The SBC-MediaGX / SBC-GXx has up to 16 MiB of
Intel StrataFlash (28F320/28F640) in x8 mode.

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@ -16,8 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*
* $Id: sc520cdp.c,v 1.23 2005/11/17 08:20:27 dwmw2 Exp $
*
*
* The SC520CDP is an evaluation board for the Elan SC520 processor available
* from AMD. It has two banks of 32-bit Flash ROM, each 8 Megabytes in size,

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@ -1,6 +1,5 @@
/*
* MTD map driver for BIOS Flash on Intel SCB2 boards
* $Id: scb2_flash.c,v 1.12 2005/03/18 14:04:35 gleixner Exp $
* Copyright (C) 2002 Sun Microsystems, Inc.
* Tim Hockin <thockin@sun.com>
*

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@ -2,8 +2,6 @@
Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
$Id: scx200_docflash.c,v 1.12 2005/11/07 11:14:28 gleixner Exp $
National Semiconductor SCx200 flash mapped with DOCCS
*/

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@ -4,8 +4,6 @@
* Copyright (C) 2001 Lineo Japan, Inc.
* Copyright (C) 2002 SHARP
*
* $Id: sharpsl-flash.c,v 1.7 2005/11/07 11:14:28 gleixner Exp $
*
* based on rpxlite.c,v 1.15 2001/10/02 15:05:14 dwmw2 Exp
* Handle mapping of the flash on the RPX Lite and CLLF boards
*

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@ -1,6 +1,4 @@
/*
* $Id: solutionengine.c,v 1.15 2005/11/07 11:14:28 gleixner Exp $
*
* Flash and EPROM on Hitachi Solution Engine and similar boards.
*
* (C) 2001 Red Hat, Inc.

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@ -1,4 +1,4 @@
/* $Id: sun_uflash.c,v 1.13 2005/11/07 11:14:28 gleixner Exp $
/*
*
* sun_uflash - Driver implementation for user-programmable flash
* present on many Sun Microsystems SME boardsets.

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