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ARM: shmobile: r8a73a4: add a DMAC platform device and clock for it
Add a DMAC platform device and clock definitions for it on r8a73a4. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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243b6db058
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9f754b4a68
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@ -504,7 +504,7 @@ static struct clk div6_clks[DIV6_NR] = {
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/* MSTP */
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/* MSTP */
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enum {
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enum {
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MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
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MSTP218, MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
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MSTP329, MSTP323, MSTP318, MSTP317, MSTP316,
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MSTP329, MSTP323, MSTP318, MSTP317, MSTP316,
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MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300,
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MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300,
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MSTP411, MSTP410, MSTP409,
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MSTP411, MSTP410, MSTP409,
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@ -519,6 +519,7 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */
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[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */
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[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */
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[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */
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[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */
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[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */
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[MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC */
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[MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 0, 0), /* IIC2 */
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[MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 0, 0), /* IIC2 */
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[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
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[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
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[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
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[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
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@ -578,6 +579,7 @@ static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]),
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CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]),
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CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
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CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
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CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
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CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
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CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
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CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
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CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
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CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
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CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
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CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
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CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
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@ -1,6 +1,15 @@
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#ifndef __ASM_R8A73A4_H__
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#ifndef __ASM_R8A73A4_H__
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#define __ASM_R8A73A4_H__
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#define __ASM_R8A73A4_H__
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/* DMA slave IDs */
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enum {
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SHDMA_SLAVE_INVALID,
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SHDMA_SLAVE_MMCIF0_TX,
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SHDMA_SLAVE_MMCIF0_RX,
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SHDMA_SLAVE_MMCIF1_TX,
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SHDMA_SLAVE_MMCIF1_RX,
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};
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void r8a73a4_add_standard_devices(void);
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void r8a73a4_add_standard_devices(void);
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void r8a73a4_add_dt_devices(void);
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void r8a73a4_add_dt_devices(void);
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void r8a73a4_clock_init(void);
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void r8a73a4_clock_init(void);
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@ -22,8 +22,10 @@
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#include <linux/of_platform.h>
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#include <linux/of_platform.h>
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#include <linux/platform_data/irq-renesas-irqc.h>
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#include <linux/platform_data/irq-renesas-irqc.h>
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#include <linux/serial_sci.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_dma.h>
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#include <linux/sh_timer.h>
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#include <linux/sh_timer.h>
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#include <mach/common.h>
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#include <mach/common.h>
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#include <mach/dma-register.h>
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#include <mach/irqs.h>
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#include <mach/irqs.h>
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#include <mach/r8a73a4.h>
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#include <mach/r8a73a4.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/arch.h>
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@ -199,12 +201,101 @@ void __init r8a73a4_add_dt_devices(void)
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r8a7790_register_cmt(10);
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r8a7790_register_cmt(10);
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}
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}
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/* DMA */
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static const struct sh_dmae_slave_config dma_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_MMCIF0_TX,
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.addr = 0xee200034,
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.chcr = CHCR_TX(XMIT_SZ_32BIT),
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.mid_rid = 0xd1,
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}, {
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.slave_id = SHDMA_SLAVE_MMCIF0_RX,
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.addr = 0xee200034,
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.chcr = CHCR_RX(XMIT_SZ_32BIT),
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.mid_rid = 0xd2,
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}, {
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.slave_id = SHDMA_SLAVE_MMCIF1_TX,
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.addr = 0xee220034,
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.chcr = CHCR_TX(XMIT_SZ_32BIT),
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.mid_rid = 0xe1,
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}, {
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.slave_id = SHDMA_SLAVE_MMCIF1_RX,
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.addr = 0xee220034,
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.chcr = CHCR_RX(XMIT_SZ_32BIT),
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.mid_rid = 0xe2,
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},
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};
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#define DMAE_CHANNEL(a, b) \
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{ \
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.offset = (a) - 0x20, \
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.dmars = (a) - 0x20 + 0x40, \
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.chclr_bit = (b), \
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.chclr_offset = 0x80 - 0x20, \
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}
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static const struct sh_dmae_channel dma_channels[] = {
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DMAE_CHANNEL(0x8000, 0),
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DMAE_CHANNEL(0x8080, 1),
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DMAE_CHANNEL(0x8100, 2),
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DMAE_CHANNEL(0x8180, 3),
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DMAE_CHANNEL(0x8200, 4),
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DMAE_CHANNEL(0x8280, 5),
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DMAE_CHANNEL(0x8300, 6),
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DMAE_CHANNEL(0x8380, 7),
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DMAE_CHANNEL(0x8400, 8),
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DMAE_CHANNEL(0x8480, 9),
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DMAE_CHANNEL(0x8500, 10),
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DMAE_CHANNEL(0x8580, 11),
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DMAE_CHANNEL(0x8600, 12),
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DMAE_CHANNEL(0x8680, 13),
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DMAE_CHANNEL(0x8700, 14),
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DMAE_CHANNEL(0x8780, 15),
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DMAE_CHANNEL(0x8800, 16),
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DMAE_CHANNEL(0x8880, 17),
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DMAE_CHANNEL(0x8900, 18),
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DMAE_CHANNEL(0x8980, 19),
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};
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static const struct sh_dmae_pdata dma_pdata = {
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.slave = dma_slaves,
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.slave_num = ARRAY_SIZE(dma_slaves),
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.channel = dma_channels,
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.channel_num = ARRAY_SIZE(dma_channels),
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.ts_low_shift = TS_LOW_SHIFT,
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.ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
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.ts_high_shift = TS_HI_SHIFT,
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.ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
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.ts_shift = dma_ts_shift,
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.ts_shift_num = ARRAY_SIZE(dma_ts_shift),
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.dmaor_init = DMAOR_DME,
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.chclr_present = 1,
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.chclr_bitwise = 1,
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};
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static struct resource dma_resources[] = {
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DEFINE_RES_MEM(0xe6700020, 0x89e0),
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DEFINE_RES_IRQ_NAMED(gic_spi(220), "error_irq"),
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{
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/* IRQ for channels 0-19 */
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.start = gic_spi(200),
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.end = gic_spi(219),
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.flags = IORESOURCE_IRQ,
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},
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};
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#define r8a73a4_register_dmac() \
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platform_device_register_resndata(&platform_bus, "sh-dma-engine", 0, \
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dma_resources, ARRAY_SIZE(dma_resources), \
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&dma_pdata, sizeof(dma_pdata))
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void __init r8a73a4_add_standard_devices(void)
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void __init r8a73a4_add_standard_devices(void)
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{
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{
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r8a73a4_add_dt_devices();
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r8a73a4_add_dt_devices();
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r8a73a4_register_irqc(0);
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r8a73a4_register_irqc(0);
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r8a73a4_register_irqc(1);
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r8a73a4_register_irqc(1);
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r8a73a4_register_thermal();
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r8a73a4_register_thermal();
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r8a73a4_register_dmac();
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}
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}
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void __init r8a73a4_init_early(void)
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void __init r8a73a4_init_early(void)
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