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arm64: dts: allwinner: h6: Add thermal trip points/cooling map 

This enables passive cooling by down-regulating CPU voltage
and frequency.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
This commit is contained in:
Ondrej Jirman 2020-04-20 15:00:14 +02:00 committed by Maxime Ripard
parent 8a3a953518
commit 9f8a93b742
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GPG Key ID: E3EF0D6F671851C5
1 changed files with 28 additions and 0 deletions
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28
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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@ -27,6 +27,7 @@ cpu0: cpu@0 {
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
cpu1: cpu@1 {
@ -36,6 +37,7 @@ cpu1: cpu@1 {
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
cpu2: cpu@2 {
@ -45,6 +47,7 @@ cpu2: cpu@2 {
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
cpu3: cpu@3 {
@ -54,6 +57,7 @@ cpu3: cpu@3 {
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
clock-latency-ns = <244144>; /* 8 32k periods */
#cooling-cells = <2>;
};
};
@ -964,6 +968,30 @@ cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu-crit {
temperature = <100000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
gpu-thermal {