mirror of https://gitee.com/openkylin/linux.git
From Paul Walmsley <paul@pwsan.com>:
AM33xx hwmod data and miscellaneous clock and hwmod fixes. AM33xx should now boot on mainline after this is applied, according to Vaibhav. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJQUWFsAAoJEBvUPslcq6VzI70P/2ECL6bunE1s53JInm7u3HFB SM5RkOXsF8Sl+2zW0V2R8ZO9OQZC1co8e+6SmlPftv1pVXYP4wtNiFHy1MMQ5Nr7 O2ajKzAcGM1TAiJQ4A1yyfRZucOQQx7pPifACWkjagWy06JaYSUWGaea3z/g/n/U 2CGySqfyzwisiMnyZvIyxHD+cSDtERoweEEbFBKeLRlfecuBs91tIyHNbMqy7cc2 Bf+2G8m0AnrzMqhtzNAKCGJSzFEFDlr0umpLFxC+QLVFHKMJWJ7o2RwuAqf/Z9lw AS8q2sqzypOPz7eW7z9WLqCW1YlJWhBJmLCJ1alvkebRvWRM0idlVVS3wKjHaP6q NXF91mn21Xd9xzjXTtgigiDav0MpMuH6+FVWENanx1Rhn23GUIyRdKGMFQOeze2l lS/vitiTDsCbXQ/EJNlDNHI2skv6AgbBbSpCsg+YivjF16DfZWhlZrFKSvQbWKfW Mv5PnOnrpcIFNzcH8tGv9XUa61wM/HvRFbcICePAKOKy+vn2VkR/Q1XMmwHANhVf +AMDtRNCfuspmed1pIdy4vOAcWFdXhL2jZFOBeX6rENJ2+rwJuziEuwsc1xQ8BZ5 KV9RZcg9NwvhEBiLK+K4nViRwTeeSC1OZGIEpIsJ6YOTOfWClYSnTW7In5gY1jNL HetIvmP55Mm21G4L02D/ =UyqO -----END PGP SIGNATURE----- Merge tag 'omap-devel-am33xx-for-v3.7' into test_v3.6-rc6_cff3.7_odaf3.7 From Paul Walmsley <paul@pwsan.com>: AM33xx hwmod data and miscellaneous clock and hwmod fixes. AM33xx should now boot on mainline after this is applied, according to Vaibhav.
This commit is contained in:
commit
9fe0624e1b
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@ -194,6 +194,7 @@ obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o
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obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o
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obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o
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obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o
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obj-$(CONFIG_SOC_AM33XX) += omap_hwmod_33xx_data.o
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obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
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# EMU peripherals
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@ -211,7 +211,7 @@ void omap2_init_dpll_parent(struct clk *clk)
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if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
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v == OMAP3XXX_EN_DPLL_FRBYPASS)
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clk_reparent(clk, dd->clk_bypass);
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} else if (cpu_is_omap44xx()) {
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} else if (soc_is_am33xx() || cpu_is_omap44xx()) {
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if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
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v == OMAP4XXX_EN_DPLL_FRBYPASS ||
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v == OMAP4XXX_EN_DPLL_MNBYPASS)
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@ -257,7 +257,7 @@ u32 omap2_get_dpll_rate(struct clk *clk)
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if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
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v == OMAP3XXX_EN_DPLL_FRBYPASS)
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return dd->clk_bypass->rate;
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} else if (cpu_is_omap44xx()) {
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} else if (soc_is_am33xx() || cpu_is_omap44xx()) {
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if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
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v == OMAP4XXX_EN_DPLL_FRBYPASS ||
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v == OMAP4XXX_EN_DPLL_MNBYPASS)
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@ -1027,7 +1027,9 @@ static struct omap_clk am33xx_clks[] = {
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CLK(NULL, "cefuse_fck", &cefuse_fck, CK_AM33XX),
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CLK(NULL, "clkdiv32k_ick", &clkdiv32k_ick, CK_AM33XX),
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CLK(NULL, "dcan0_fck", &dcan0_fck, CK_AM33XX),
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CLK("481cc000.d_can", NULL, &dcan0_fck, CK_AM33XX),
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CLK(NULL, "dcan1_fck", &dcan1_fck, CK_AM33XX),
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CLK("481d0000.d_can", NULL, &dcan1_fck, CK_AM33XX),
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CLK(NULL, "debugss_ick", &debugss_ick, CK_AM33XX),
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CLK(NULL, "pruss_ocp_gclk", &pruss_ocp_gclk, CK_AM33XX),
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CLK("davinci-mcasp.0", NULL, &mcasp0_fck, CK_AM33XX),
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@ -311,7 +311,7 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel)
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* Set jitter correction. No jitter correction for OMAP4 and 3630
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* since freqsel field is no longer present
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*/
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if (!cpu_is_omap44xx() && !cpu_is_omap3630()) {
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if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
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v = __raw_readl(dd->control_reg);
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v &= ~dd->freqsel_mask;
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v |= freqsel << __ffs(dd->freqsel_mask);
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@ -471,7 +471,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
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return -EINVAL;
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/* No freqsel on OMAP4 and OMAP3630 */
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if (!cpu_is_omap44xx() && !cpu_is_omap3630()) {
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if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
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freqsel = _omap3_dpll_compute_freqsel(clk,
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dd->last_rounded_n);
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if (!freqsel)
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@ -524,6 +524,8 @@ void __init am33xx_init_early(void)
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am33xx_voltagedomains_init();
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am33xx_powerdomains_init();
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am33xx_clockdomains_init();
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am33xx_hwmod_init();
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omap_hwmod_init_postsetup();
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am33xx_clk_init();
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}
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#endif
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@ -149,8 +149,10 @@
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#include "powerdomain.h"
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#include "cm2xxx_3xxx.h"
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#include "cminst44xx.h"
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#include "cm33xx.h"
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#include "prm2xxx_3xxx.h"
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#include "prm44xx.h"
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#include "prm33xx.h"
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#include "prminst44xx.h"
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#include "mux.h"
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#include "pm.h"
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@ -867,6 +869,26 @@ static void _omap4_enable_module(struct omap_hwmod *oh)
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oh->prcm.omap4.clkctrl_offs);
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}
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/**
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* _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
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* @oh: struct omap_hwmod *
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*
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* Enables the PRCM module mode related to the hwmod @oh.
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* No return value.
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*/
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static void _am33xx_enable_module(struct omap_hwmod *oh)
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{
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if (!oh->clkdm || !oh->prcm.omap4.modulemode)
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return;
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pr_debug("omap_hwmod: %s: %s: %d\n",
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oh->name, __func__, oh->prcm.omap4.modulemode);
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am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
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oh->clkdm->clkdm_offs,
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oh->prcm.omap4.clkctrl_offs);
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}
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/**
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* _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
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* @oh: struct omap_hwmod *
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@ -893,6 +915,31 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
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oh->prcm.omap4.clkctrl_offs);
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}
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/**
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* _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
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* @oh: struct omap_hwmod *
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*
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* Wait for a module @oh to enter slave idle. Returns 0 if the module
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* does not have an IDLEST bit or if the module successfully enters
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* slave idle; otherwise, pass along the return value of the
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* appropriate *_cm*_wait_module_idle() function.
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*/
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static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
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{
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if (!oh)
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return -EINVAL;
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if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
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return 0;
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if (oh->flags & HWMOD_NO_IDLEST)
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return 0;
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return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
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oh->clkdm->clkdm_offs,
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oh->prcm.omap4.clkctrl_offs);
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}
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/**
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* _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
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* @oh: struct omap_hwmod *oh
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@ -1613,6 +1660,36 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
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return 0;
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}
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/**
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* _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
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* @oh: struct omap_hwmod *
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*
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* Disable the PRCM module mode related to the hwmod @oh.
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* Return EINVAL if the modulemode is not supported and 0 in case of success.
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*/
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static int _am33xx_disable_module(struct omap_hwmod *oh)
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{
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int v;
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if (!oh->clkdm || !oh->prcm.omap4.modulemode)
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return -EINVAL;
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pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
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am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
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oh->prcm.omap4.clkctrl_offs);
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if (_are_any_hardreset_lines_asserted(oh))
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return 0;
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v = _am33xx_wait_target_disable(oh);
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if (v)
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pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
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oh->name);
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return 0;
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}
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/**
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* _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
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* @oh: struct omap_hwmod *
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@ -2548,6 +2625,33 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
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oh->prcm.omap4.clkctrl_offs);
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}
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/**
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* _am33xx_wait_target_ready - wait for a module to leave slave idle
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* @oh: struct omap_hwmod *
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*
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* Wait for a module @oh to leave slave idle. Returns 0 if the module
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* does not have an IDLEST bit or if the module successfully leaves
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* slave idle; otherwise, pass along the return value of the
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* appropriate *_cm*_wait_module_ready() function.
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*/
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static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
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{
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if (!oh || !oh->clkdm)
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return -EINVAL;
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if (oh->flags & HWMOD_NO_IDLEST)
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return 0;
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if (!_find_mpu_rt_port(oh))
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return 0;
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/* XXX check module SIDLEMODE, hardreset status */
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return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
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oh->clkdm->clkdm_offs,
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oh->prcm.omap4.clkctrl_offs);
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}
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/**
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* _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
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* @oh: struct omap_hwmod * to assert hardreset
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oh->prcm.omap4.rstctrl_offs);
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}
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/**
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* _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
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* @oh: struct omap_hwmod * to assert hardreset
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* @ohri: hardreset line data
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*
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* Call am33xx_prminst_assert_hardreset() with parameters extracted
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* from the hwmod @oh and the hardreset line data @ohri. Only
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* intended for use as an soc_ops function pointer. Passes along the
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* return value from am33xx_prminst_assert_hardreset(). XXX This
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* function is scheduled for removal when the PRM code is moved into
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* drivers/.
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*/
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static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
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struct omap_hwmod_rst_info *ohri)
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{
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return am33xx_prm_assert_hardreset(ohri->rst_shift,
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oh->clkdm->pwrdm.ptr->prcm_offs,
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oh->prcm.omap4.rstctrl_offs);
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}
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/**
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* _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
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* @oh: struct omap_hwmod * to deassert hardreset
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* @ohri: hardreset line data
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*
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* Call am33xx_prminst_deassert_hardreset() with parameters extracted
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* from the hwmod @oh and the hardreset line data @ohri. Only
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* intended for use as an soc_ops function pointer. Passes along the
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* return value from am33xx_prminst_deassert_hardreset(). XXX This
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* function is scheduled for removal when the PRM code is moved into
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* drivers/.
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*/
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static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
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struct omap_hwmod_rst_info *ohri)
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{
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if (ohri->st_shift)
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pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
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oh->name, ohri->name);
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return am33xx_prm_deassert_hardreset(ohri->rst_shift,
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oh->clkdm->pwrdm.ptr->prcm_offs,
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oh->prcm.omap4.rstctrl_offs,
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oh->prcm.omap4.rstst_offs);
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}
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/**
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* _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
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* @oh: struct omap_hwmod * to test hardreset
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* @ohri: hardreset line data
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*
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* Call am33xx_prminst_is_hardreset_asserted() with parameters
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* extracted from the hwmod @oh and the hardreset line data @ohri.
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* Only intended for use as an soc_ops function pointer. Passes along
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* the return value from am33xx_prminst_is_hardreset_asserted(). XXX
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* This function is scheduled for removal when the PRM code is moved
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* into drivers/.
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*/
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static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
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struct omap_hwmod_rst_info *ohri)
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{
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return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
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oh->clkdm->pwrdm.ptr->prcm_offs,
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oh->prcm.omap4.rstctrl_offs);
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}
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/* Public functions */
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u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
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@ -3678,6 +3848,14 @@ void __init omap_hwmod_init(void)
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soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
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soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
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soc_ops.init_clkdm = _init_clkdm;
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} else if (soc_is_am33xx()) {
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soc_ops.enable_module = _am33xx_enable_module;
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soc_ops.disable_module = _am33xx_disable_module;
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soc_ops.wait_target_ready = _am33xx_wait_target_ready;
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soc_ops.assert_hardreset = _am33xx_assert_hardreset;
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soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
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soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
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soc_ops.init_clkdm = _init_clkdm;
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} else {
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WARN(1, "omap_hwmod: unknown SoC type\n");
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}
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File diff suppressed because it is too large
Load Diff
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@ -658,6 +658,7 @@ extern int omap2420_hwmod_init(void);
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extern int omap2430_hwmod_init(void);
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extern int omap3xxx_hwmod_init(void);
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extern int omap44xx_hwmod_init(void);
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extern int am33xx_hwmod_init(void);
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extern int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois);
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