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ARM: OMAP: DRA7: powerdomain data: Remove unused pwrsts_logic_ret 

As per the latest revision F of public TRM for DRA7/AM57xx SoCs
SPRUHZ6F[1] (April 2016), with the exception of MPU power domain (and
CPUx sub power domains), all other power domains can either operate
in "ON" mode OR in some cases, "OFF" mode. For these power states,
the logic retention state is basically ignored by PRCM and does not
require to be programmed.

[1] http://www.ti.com/lit/pdf/spruhz6

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Nishanth Menon 2016-05-24 08:35:39 -05:00 committed by Tony Lindgren
parent d16c0d722d
commit 9ffb668f26
1 changed files with 0 additions and 7 deletions
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7
arch/arm/mach-omap2/powerdomains7xx_data.c
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@ -36,7 +36,6 @@ static struct powerdomain iva_7xx_pwrdm = {
.prcm_offs = DRA7XX_PRM_IVA_INST, .prcm_offs = DRA7XX_PRM_IVA_INST,
.prcm_partition = DRA7XX_PRM_PARTITION, .prcm_partition = DRA7XX_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON, .pwrsts = PWRSTS_OFF_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 4, .banks = 4,
.pwrsts_mem_ret = { .pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* hwa_mem */ [0] = PWRSTS_OFF_RET, /* hwa_mem */
@ -76,7 +75,6 @@ static struct powerdomain ipu_7xx_pwrdm = {
.prcm_offs = DRA7XX_PRM_IPU_INST, .prcm_offs = DRA7XX_PRM_IPU_INST,
.prcm_partition = DRA7XX_PRM_PARTITION, .prcm_partition = DRA7XX_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON, .pwrsts = PWRSTS_OFF_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 2, .banks = 2,
.pwrsts_mem_ret = { .pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* aessmem */ [0] = PWRSTS_OFF_RET, /* aessmem */
@ -95,7 +93,6 @@ static struct powerdomain dss_7xx_pwrdm = {
.prcm_offs = DRA7XX_PRM_DSS_INST, .prcm_offs = DRA7XX_PRM_DSS_INST,
.prcm_partition = DRA7XX_PRM_PARTITION, .prcm_partition = DRA7XX_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON, .pwrsts = PWRSTS_OFF_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 1, .banks = 1,
.pwrsts_mem_ret = { .pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* dss_mem */ [0] = PWRSTS_OFF_RET, /* dss_mem */
@ -112,7 +109,6 @@ static struct powerdomain l4per_7xx_pwrdm = {
.prcm_offs = DRA7XX_PRM_L4PER_INST, .prcm_offs = DRA7XX_PRM_L4PER_INST,
.prcm_partition = DRA7XX_PRM_PARTITION, .prcm_partition = DRA7XX_PRM_PARTITION,
.pwrsts = PWRSTS_ON, .pwrsts = PWRSTS_ON,
.pwrsts_logic_ret = PWRSTS_RET,
.banks = 2, .banks = 2,
.pwrsts_mem_ret = { .pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* nonretained_bank */ [0] = PWRSTS_OFF_RET, /* nonretained_bank */
@ -161,7 +157,6 @@ static struct powerdomain core_7xx_pwrdm = {
.prcm_offs = DRA7XX_PRM_CORE_INST, .prcm_offs = DRA7XX_PRM_CORE_INST,
.prcm_partition = DRA7XX_PRM_PARTITION, .prcm_partition = DRA7XX_PRM_PARTITION,
.pwrsts = PWRSTS_ON, .pwrsts = PWRSTS_ON,
.pwrsts_logic_ret = PWRSTS_RET,
.banks = 5, .banks = 5,
.pwrsts_mem_ret = { .pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* core_nret_bank */ [0] = PWRSTS_OFF_RET, /* core_nret_bank */
@ -226,7 +221,6 @@ static struct powerdomain vpe_7xx_pwrdm = {
.prcm_offs = DRA7XX_PRM_VPE_INST, .prcm_offs = DRA7XX_PRM_VPE_INST,
.prcm_partition = DRA7XX_PRM_PARTITION, .prcm_partition = DRA7XX_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON, .pwrsts = PWRSTS_OFF_ON,
.pwrsts_logic_ret = PWRSTS_OFF,
.banks = 1, .banks = 1,
.pwrsts_mem_ret = { .pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* vpe_bank */ [0] = PWRSTS_OFF_RET, /* vpe_bank */
@ -261,7 +255,6 @@ static struct powerdomain l3init_7xx_pwrdm = {
.prcm_offs = DRA7XX_PRM_L3INIT_INST, .prcm_offs = DRA7XX_PRM_L3INIT_INST,
.prcm_partition = DRA7XX_PRM_PARTITION, .prcm_partition = DRA7XX_PRM_PARTITION,
.pwrsts = PWRSTS_ON, .pwrsts = PWRSTS_ON,
.pwrsts_logic_ret = PWRSTS_RET,
.banks = 3, .banks = 3,
.pwrsts_mem_ret = { .pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET, /* gmac_bank */ [0] = PWRSTS_OFF_RET, /* gmac_bank */