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clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers 

On a multiplatform kernel there is little benefit in splitting each
clock driver per platform because space savings are minimal.  Such split
also complicates the code, especially after adding compile testing.

Build all arm64 Intel SoCFPGA clocks together with one entry in
Makefile.  This also removed duplicated line in the Makefile (selecting
common part of clocks per platform).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2021-03-11 16:25:35 +01:00 committed by Dinh Nguyen
parent 3409fb0987
commit a01be32fcc
2 changed files with 6 additions and 7 deletions
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6
drivers/clk/socfpga/Kconfig
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@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
config CLK_INTEL_SOCFPGA64
bool
# Intel Agilex / N5X clock controller support
default (ARCH_AGILEX || ARCH_N5X)
depends on ARCH_AGILEX || ARCH_N5X
# Intel Stratix / Agilex / N5X clock controller support
default (ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10)
depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10

7
drivers/clk/socfpga/Makefile
View File

@ -1,7 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o
obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o
obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o
obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-agilex.o
obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \
clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \
clk-agilex.o