mirror of https://gitee.com/openkylin/linux.git
ath5k: clean up some comments
This fixes a few misspellings, word repetitions, and some grammar nits in ath5k comments. No code changes. Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Bob Copeland
John W. Linville
parent
b612798098
commit
a180a13081
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@ -552,9 +552,9 @@ ath5k_ani_mib_intr(struct ath5k_hw *ah)
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if (ah->ah_sc->ani_state.ani_mode != ATH5K_ANI_MODE_AUTO)
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return;
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/* if one of the errors triggered, we can get a superfluous second
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* interrupt, even though we have already reset the register. the
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* function detects that so we can return early */
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/* If one of the errors triggered, we can get a superfluous second
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* interrupt, even though we have already reset the register. The
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* function detects that so we can return early. */
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if (ath5k_ani_save_and_clear_phy_errors(ah, as) == 0)
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return;
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@ -139,12 +139,12 @@ int ath5k_hw_attach(struct ath5k_softc *sc)
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else
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ah->ah_version = AR5K_AR5212;
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/*Fill the ath5k_hw struct with the needed functions*/
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/* Fill the ath5k_hw struct with the needed functions */
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ret = ath5k_hw_init_desc_functions(ah);
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if (ret)
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goto err_free;
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/* Bring device out of sleep and reset it's units */
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/* Bring device out of sleep and reset its units */
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ret = ath5k_hw_nic_wakeup(ah, 0, true);
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if (ret)
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goto err_free;
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@ -158,7 +158,7 @@ int ath5k_hw_attach(struct ath5k_softc *sc)
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CHANNEL_5GHZ);
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ah->ah_phy = AR5K_PHY(0);
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/* Try to identify radio chip based on it's srev */
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/* Try to identify radio chip based on its srev */
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switch (ah->ah_radio_5ghz_revision & 0xf0) {
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case AR5K_SREV_RAD_5111:
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ah->ah_radio = AR5K_RF5111;
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@ -612,7 +612,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
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goto err_free;
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}
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/*If we passed the test malloc a ath5k_hw struct*/
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/* If we passed the test, malloc an ath5k_hw struct */
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sc->ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
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if (!sc->ah) {
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ret = -ENOMEM;
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@ -786,8 +786,8 @@ ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
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/*
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* Check if the MAC has multi-rate retry support.
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* We do this by trying to setup a fake extended
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* descriptor. MAC's that don't have support will
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* return false w/o doing anything. MAC's that do
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* descriptor. MACs that don't have support will
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* return false w/o doing anything. MACs that do
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* support it will return true w/o doing anything.
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*/
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ret = ath5k_hw_setup_mrr_tx_desc(ah, NULL, 0, 0, 0, 0, 0, 0);
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@ -827,7 +827,7 @@ ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
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/*
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* Allocate hardware transmit queues: one queue for
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* beacon frames and one data queue for each QoS
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* priority. Note that hw functions handle reseting
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* priority. Note that hw functions handle resetting
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* these queues at the needed time.
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*/
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ret = ath5k_beaconq_setup(ah);
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@ -909,7 +909,7 @@ ath5k_detach(struct pci_dev *pdev, struct ieee80211_hw *hw)
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/*
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* NB: the order of these is important:
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* o call the 802.11 layer before detaching ath5k_hw to
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* insure callbacks into the driver to delete global
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* ensure callbacks into the driver to delete global
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* key cache entries can be handled
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* o reclaim the tx queue data structures after calling
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* the 802.11 layer as we'll get called back to reclaim
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@ -1514,7 +1514,7 @@ ath5k_txq_setup(struct ath5k_softc *sc,
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/*
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* Enable interrupts only for EOL and DESC conditions.
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* We mark tx descriptors to receive a DESC interrupt
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* when a tx queue gets deep; otherwise waiting for the
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* when a tx queue gets deep; otherwise we wait for the
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* EOL to reap descriptors. Note that this is done to
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* reduce interrupt load and this only defers reaping
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* descriptors, never transmitting frames. Aside from
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@ -1859,7 +1859,7 @@ ath5k_update_beacon_rssi(struct ath5k_softc *sc, struct sk_buff *skb, int rssi)
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}
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/*
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* Compute padding position. skb must contains an IEEE 802.11 frame
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* Compute padding position. skb must contain an IEEE 802.11 frame
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*/
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static int ath5k_common_padpos(struct sk_buff *skb)
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{
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@ -1878,10 +1878,9 @@ static int ath5k_common_padpos(struct sk_buff *skb)
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}
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/*
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* This function expects a 802.11 frame and returns the number of
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* bytes added, or -1 if we don't have enought header room.
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* This function expects an 802.11 frame and returns the number of
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* bytes added, or -1 if we don't have enough header room.
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*/
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static int ath5k_add_padding(struct sk_buff *skb)
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{
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int padpos = ath5k_common_padpos(skb);
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@ -1901,10 +1900,18 @@ static int ath5k_add_padding(struct sk_buff *skb)
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}
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/*
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* This function expects a 802.11 frame and returns the number of
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* bytes removed
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* The MAC header is padded to have 32-bit boundary if the
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* packet payload is non-zero. The general calculation for
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* padsize would take into account odd header lengths:
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* padsize = 4 - (hdrlen & 3); however, since only
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* even-length headers are used, padding can only be 0 or 2
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* bytes and we can optimize this a bit. We must not try to
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* remove padding from short control frames that do not have a
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* payload.
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*
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* This function expects an 802.11 frame and returns the number of
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* bytes removed.
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*/
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static int ath5k_remove_padding(struct sk_buff *skb)
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{
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int padpos = ath5k_common_padpos(skb);
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@ -1925,14 +1932,6 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb,
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{
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struct ieee80211_rx_status *rxs;
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/* The MAC header is padded to have 32-bit boundary if the
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* packet payload is non-zero. The general calculation for
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* padsize would take into account odd header lengths:
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* padsize = (4 - hdrlen % 4) % 4; However, since only
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* even-length headers are used, padding can only be 0 or 2
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* bytes and we can optimize this a bit. In addition, we must
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* not try to remove padding from short control frames that do
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* not have payload. */
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ath5k_remove_padding(skb);
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rxs = IEEE80211_SKB_RXCB(skb);
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@ -2281,10 +2280,11 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
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* default antenna which is supposed to be an omni.
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*
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* Note2: On sectored scenarios it's possible to have
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* multiple antennas (1omni -the default- and 14 sectors)
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* so if we choose to actually support this mode we need
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* to allow user to set how many antennas we have and tweak
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* the code below to send beacons on all of them.
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* multiple antennas (1 omni -- the default -- and 14
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* sectors), so if we choose to actually support this
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* mode, we need to allow the user to set how many antennas
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* we have and tweak the code below to send beacons
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* on all of them.
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*/
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if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP)
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antenna = sc->bsent & 4 ? 2 : 1;
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@ -2333,7 +2333,7 @@ ath5k_beacon_send(struct ath5k_softc *sc)
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}
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/*
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* Check if the previous beacon has gone out. If
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* not don't don't try to post another, skip this
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* not, don't don't try to post another: skip this
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* period and wait for the next. Missed beacons
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* indicate a problem and should not occur. If we
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* miss too many consecutive beacons reset the device.
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@ -2905,8 +2905,8 @@ static int ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
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ATH5K_DBG(sc, ATH5K_DEBUG_XMIT, "tx in monitor (scan?)\n");
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/*
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* the hardware expects the header padded to 4 byte boundaries
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* if this is not the case we add the padding after the header
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* The hardware expects the header padded to 4 byte boundaries.
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* If this is not the case, we add the padding after the header.
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*/
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padsize = ath5k_add_padding(skb);
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if (padsize < 0) {
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@ -3274,7 +3274,7 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw,
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/* Set multicast bits */
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ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]);
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/* Set the cached hw filter flags, this will alter actually
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/* Set the cached hw filter flags, this will later actually
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* be set in HW */
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sc->filter_flags = rfilt;
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@ -377,11 +377,11 @@ int ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue, u32 phys_addr)
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*
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* This function increases/decreases the tx trigger level for the tx fifo
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* buffer (aka FIFO threshold) that is used to indicate when PCU flushes
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* the buffer and transmits it's data. Lowering this results sending small
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* the buffer and transmits its data. Lowering this results sending small
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* frames more quickly but can lead to tx underruns, raising it a lot can
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* result other problems (i think bmiss is related). Right now we start with
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* the lowest possible (64Bytes) and if we get tx underrun we increase it using
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* the increase flag. Returns -EIO if we have have reached maximum/minimum.
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* the increase flag. Returns -EIO if we have reached maximum/minimum.
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*
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* XXX: Link this with tx DMA size ?
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* XXX: Use it to save interrupts ?
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@ -661,7 +661,7 @@ ath5k_eeprom_init_11bg_2413(struct ath5k_hw *ah, unsigned int mode, int offset)
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* (eeprom versions < 4). For RF5111 we have 11 pre-defined PCDAC
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* steps that match with the power values we read from eeprom. On
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* older eeprom versions (< 3.2) these steps are equaly spaced at
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* 10% of the pcdac curve -until the curve reaches it's maximum-
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* 10% of the pcdac curve -until the curve reaches its maximum-
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* (11 steps from 0 to 100%) but on newer eeprom versions (>= 3.2)
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* these 11 steps are spaced in a different way. This function returns
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* the pcdac steps based on eeprom version and curve min/max so that we
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@ -1113,7 +1113,7 @@ ath5k_eeprom_read_pcal_info_5112(struct ath5k_hw *ah, int mode)
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*/
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/* For RF2413 power calibration data doesn't start on a fixed location and
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* if a mode is not supported, it's section is missing -not zeroed-.
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* if a mode is not supported, its section is missing -not zeroed-.
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* So we need to calculate the starting offset for each section by using
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* these two functions */
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@ -115,7 +115,7 @@ static unsigned int ath5k_hw_rfb_op(struct ath5k_hw *ah,
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\**********************/
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/*
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* This code is used to optimize rf gain on different environments
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* This code is used to optimize RF gain on different environments
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* (temperature mostly) based on feedback from a power detector.
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*
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* It's only used on RF5111 and RF5112, later RF chips seem to have
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@ -302,7 +302,7 @@ static bool ath5k_hw_rf_check_gainf_readback(struct ath5k_hw *ah)
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}
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/* Perform gain_F adjustment by choosing the right set
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* of parameters from rf gain optimization ladder */
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* of parameters from RF gain optimization ladder */
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static s8 ath5k_hw_rf_gainf_adjust(struct ath5k_hw *ah)
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{
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const struct ath5k_gain_opt *go;
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@ -367,7 +367,7 @@ static s8 ath5k_hw_rf_gainf_adjust(struct ath5k_hw *ah)
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return ret;
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}
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/* Main callback for thermal rf gain calibration engine
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/* Main callback for thermal RF gain calibration engine
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* Check for a new gain reading and schedule an adjustment
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* if needed.
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*
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@ -433,7 +433,7 @@ enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah)
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return ah->ah_gain.g_state;
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}
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/* Write initial rf gain table to set the RF sensitivity
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/* Write initial RF gain table to set the RF sensitivity
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* this one works on all RF chips and has nothing to do
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* with gain_F calibration */
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int ath5k_hw_rfgain_init(struct ath5k_hw *ah, unsigned int freq)
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@ -496,7 +496,7 @@ int ath5k_hw_rfgain_init(struct ath5k_hw *ah, unsigned int freq)
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/*
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* Setup RF registers by writing rf buffer on hw
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* Setup RF registers by writing RF buffer on hw
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*/
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int ath5k_hw_rfregs_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
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unsigned int mode)
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@ -571,7 +571,7 @@ int ath5k_hw_rfregs_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
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return -EINVAL;
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}
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/* If it's the first time we set rf buffer, allocate
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/* If it's the first time we set RF buffer, allocate
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* ah->ah_rf_banks based on ah->ah_rf_banks_size
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* we set above */
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if (ah->ah_rf_banks == NULL) {
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@ -3035,9 +3035,6 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
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/* Limit max power if we have a CTL available */
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ath5k_get_max_ctl_power(ah, channel);
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/* FIXME: Tx power limit for this regdomain
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* XXX: Mac80211/CRDA will do that anyway ? */
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/* FIXME: Antenna reduction stuff */
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/* FIXME: Limit power on turbo modes */
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@ -1911,7 +1911,7 @@
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#define AR5K_PHY_TURBO 0x9804 /* Register Address */
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#define AR5K_PHY_TURBO_MODE 0x00000001 /* Enable turbo mode */
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#define AR5K_PHY_TURBO_SHORT 0x00000002 /* Set short symbols to turbo mode */
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#define AR5K_PHY_TURBO_MIMO 0x00000004 /* Set turbo for mimo mimo */
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#define AR5K_PHY_TURBO_MIMO 0x00000004 /* Set turbo for mimo */
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/*
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* PHY agility command register
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@ -959,7 +959,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
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AR5K_QUEUE_DCU_SEQNUM(0));
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}
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/* TSF accelerates on AR5211 durring reset
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/* TSF accelerates on AR5211 during reset
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* As a workaround save it here and restore
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* it later so that it's back in time after
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* reset. This way it'll get re-synced on the
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@ -1080,7 +1080,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
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return ret;
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/* Spur info is available only from EEPROM versions
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* bigger than 5.3 but but the EEPOM routines will use
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* greater than 5.3, but the EEPROM routines will use
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* static values for older versions */
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if (ah->ah_mac_srev >= AR5K_SREV_AR5424)
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ath5k_hw_set_spur_mitigation_filter(ah,
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@ -1173,11 +1173,11 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
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/* Set RSSI/BRSSI thresholds
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*
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* Note: If we decide to set this value
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* dynamicaly, have in mind that when AR5K_RSSI_THR
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* register is read it might return 0x40 if we haven't
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* wrote anything to it plus BMISS RSSI threshold is zeroed.
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* dynamically, keep in mind that when AR5K_RSSI_THR
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* register is read, it might return 0x40 if we haven't
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* written anything to it. Also, BMISS RSSI threshold is zeroed.
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* So doing a save/restore procedure here isn't the right
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* choice. Instead store it on ath5k_hw */
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* choice. Instead, store it in ath5k_hw */
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ath5k_hw_reg_write(ah, (AR5K_TUNE_RSSI_THRES |
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AR5K_TUNE_BMISS_THRES <<
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AR5K_RSSI_THR_BMISS_S),
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@ -1235,7 +1235,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
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/*
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* Perform ADC test to see if baseband is ready
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* Set tx hold and check adc test register
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* Set TX hold and check ADC test register
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*/
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phy_tst1 = ath5k_hw_reg_read(ah, AR5K_PHY_TST1);
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ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1);
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@ -1254,15 +1254,15 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
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*
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* This method is used to calibrate some static offsets
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* used together with on-the fly I/Q calibration (the
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* one performed via ath5k_hw_phy_calibrate), that doesn't
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* one performed via ath5k_hw_phy_calibrate), which doesn't
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* interrupt rx path.
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*
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* While rx path is re-routed to the power detector we also
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* start a noise floor calibration, to measure the
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* start a noise floor calibration to measure the
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* card's noise floor (the noise we measure when we are not
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* transmiting or receiving anything).
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* transmitting or receiving anything).
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*
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* If we are in a noisy environment AGC calibration may time
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* If we are in a noisy environment, AGC calibration may time
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* out and/or noise floor calibration might timeout.
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*/
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AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
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@ -25,10 +25,10 @@
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*
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* We don't write on those registers directly but
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* we send a data packet on the chip, using a special register,
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* that holds all the settings we need. After we 've sent the
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* that holds all the settings we need. After we've sent the
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* data packet, we write on another special register to notify hw
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* to apply the settings. This is done so that control registers
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* can be dynamicaly programmed during operation and the settings
|
||||
* can be dynamically programmed during operation and the settings
|
||||
* are applied faster on the hw.
|
||||
*
|
||||
* We call each data packet an "RF Bank" and all the data we write
|
||||
|
|
|
|||
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Reference in New Issue