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ARM: dts: sti: update clkgen-fsyn entries in stih418-clock 

The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
Alain Volmat 2021-03-31 22:42:24 +02:00 committed by Patrice Chotard
parent 7f9ed95dda
commit a1b68d6b02
1 changed files with 3 additions and 23 deletions
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26
arch/arm/boot/dts/stih418-clock.dtsi
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@ -94,11 +94,6 @@ clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
reg = <0x9103000 0x1000>;
clocks = <&clk_sysin>;
clock-output-names = "clk-s-c0-fs0-ch0",
"clk-s-c0-fs0-ch1",
"clk-s-c0-fs0-ch2",
"clk-s-c0-fs0-ch3";
};
clk_s_c0: clockgen-c@9103000 {
@ -150,15 +145,10 @@ clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
#clock-cells = <1>;
compatible = "st,quadfs";
compatible = "st,quadfs-d0";
reg = <0x9104000 0x1000>;
clocks = <&clk_sysin>;
clock-output-names = "clk-s-d0-fs0-ch0",
"clk-s-d0-fs0-ch1",
"clk-s-d0-fs0-ch2",
"clk-s-d0-fs0-ch3";
};
clockgen-d0@9104000 {
@ -179,15 +169,10 @@ clk_s_d0_flexgen: clk-s-d0-flexgen {
clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
#clock-cells = <1>;
compatible = "st,quadfs";
compatible = "st,quadfs-d2";
reg = <0x9106000 0x1000>;
clocks = <&clk_sysin>;
clock-output-names = "clk-s-d2-fs0-ch0",
"clk-s-d2-fs0-ch1",
"clk-s-d2-fs0-ch2",
"clk-s-d2-fs0-ch3";
};
clockgen-d2@9106000 {
@ -210,15 +195,10 @@ clk_s_d2_flexgen: clk-s-d2-flexgen {
clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
#clock-cells = <1>;
compatible = "st,quadfs";
compatible = "st,quadfs-d3";
reg = <0x9107000 0x1000>;
clocks = <&clk_sysin>;
clock-output-names = "clk-s-d3-fs0-ch0",
"clk-s-d3-fs0-ch1",
"clk-s-d3-fs0-ch2",
"clk-s-d3-fs0-ch3";
};
clockgen-d3@9107000 {