mirror of https://gitee.com/openkylin/linux.git
Merge branch 'remotes/lorenzo/pci/brcmstb'
- Assert fundamental reset on initialization (Nicolas Saenz Julienne)
- Remove unnecessary clk_put(); devm_clk_get() handles this automatically
(Jim Quinlan)
- Fix outbound memory window register stride offset (Jim Quinlan)
- Add "aspm-no-l0s" property for brcmstb and disable ASPM L0s when
present (Jim Quinlan)
- Add property to notify Raspberry Pi firmware of xHCI reset (Nicolas
Saenz Julienne)
- Add Raspberry Pi VL805 xHCI init function to trigger VL805 firmware
load (Nicolas Saenz Julienne)
- Wait in brcmstb probe for Raspberry Pi VL805 firmware initialization
(Nicolas Saenz Julienne)
- Load Raspberry Pi VL805 firmware in USB early handoff quirk (Nicolas
Saenz Julienne)
* remotes/lorenzo/pci/brcmstb:
USB: pci-quirks: Add Raspberry Pi 4 quirk
PCI: brcmstb: Wait for Raspberry Pi's firmware when present
firmware: raspberrypi: Introduce vl805 init routine
soc: bcm2835: Add notify xHCI reset property
PCI: brcmstb: Disable L0s component of ASPM if requested
dt-bindings: PCI: brcmstb: New prop 'aspm-no-l0s'
PCI: brcmstb: Fix window register offset from 4 to 8
PCI: brcmstb: Don't clk_put() a managed clock
PCI: brcmstb: Assert fundamental reset on initialization
This commit is contained in:
Bjorn Helgaas
commit
a1dcc1aa6f
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@ -56,6 +56,8 @@ properties:
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description: Indicates usage of spread-spectrum clocking.
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type: boolean
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aspm-no-l0s: true
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required:
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- reg
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- dma-ranges
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@ -178,8 +178,9 @@ config ISCSI_IBFT
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Otherwise, say N.
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config RASPBERRYPI_FIRMWARE
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tristate "Raspberry Pi Firmware Driver"
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bool "Raspberry Pi Firmware Driver"
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depends on BCM2835_MBOX
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default USB_PCI
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help
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This option enables support for communicating with the firmware on the
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Raspberry Pi.
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@ -12,6 +12,8 @@
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <soc/bcm2835/raspberrypi-firmware.h>
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#define MBOX_MSG(chan, data28) (((data28) & ~0xf) | ((chan) & 0xf))
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@ -19,6 +21,8 @@
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#define MBOX_DATA28(msg) ((msg) & ~0xf)
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#define MBOX_CHAN_PROPERTY 8
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#define VL805_PCI_CONFIG_VERSION_OFFSET 0x50
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static struct platform_device *rpi_hwmon;
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static struct platform_device *rpi_clk;
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@ -286,6 +290,63 @@ struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node)
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}
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EXPORT_SYMBOL_GPL(rpi_firmware_get);
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/*
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* The Raspberry Pi 4 gets its USB functionality from VL805, a PCIe chip that
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* implements xHCI. After a PCI reset, VL805's firmware may either be loaded
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* directly from an EEPROM or, if not present, by the SoC's co-processor,
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* VideoCore. RPi4's VideoCore OS contains both the non public firmware load
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* logic and the VL805 firmware blob. This function triggers the aforementioned
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* process.
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*/
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int rpi_firmware_init_vl805(struct pci_dev *pdev)
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{
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struct device_node *fw_np;
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struct rpi_firmware *fw;
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u32 dev_addr, version;
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int ret;
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fw_np = of_find_compatible_node(NULL, NULL,
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"raspberrypi,bcm2835-firmware");
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if (!fw_np)
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return 0;
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fw = rpi_firmware_get(fw_np);
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of_node_put(fw_np);
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if (!fw)
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return -ENODEV;
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/*
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* Make sure we don't trigger a firmware load unnecessarily.
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*
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* If something went wrong with PCI, this whole exercise would be
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* futile as VideoCore expects from us a configured PCI bus. Just take
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* the faulty version (likely ~0) and let xHCI's registration fail
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* further down the line.
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*/
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pci_read_config_dword(pdev, VL805_PCI_CONFIG_VERSION_OFFSET, &version);
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if (version)
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goto exit;
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dev_addr = pdev->bus->number << 20 | PCI_SLOT(pdev->devfn) << 15 |
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PCI_FUNC(pdev->devfn) << 12;
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ret = rpi_firmware_property(fw, RPI_FIRMWARE_NOTIFY_XHCI_RESET,
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&dev_addr, sizeof(dev_addr));
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if (ret)
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return ret;
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/* Wait for vl805 to startup */
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usleep_range(200, 1000);
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pci_read_config_dword(pdev, VL805_PCI_CONFIG_VERSION_OFFSET,
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&version);
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exit:
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pci_info(pdev, "VL805 firmware version %08x\n", version);
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return 0;
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}
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EXPORT_SYMBOL_GPL(rpi_firmware_init_vl805);
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static const struct of_device_id rpi_firmware_of_match[] = {
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{ .compatible = "raspberrypi,bcm2835-firmware", },
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{},
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@ -28,6 +28,8 @@
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#include <linux/string.h>
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#include <linux/types.h>
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#include <soc/bcm2835/raspberrypi-firmware.h>
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#include "../pci.h"
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/* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */
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@ -41,6 +43,9 @@
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#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c
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#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff
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#define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY 0x04dc
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#define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK 0xc00
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#define PCIE_RC_DL_MDIO_ADDR 0x1100
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#define PCIE_RC_DL_MDIO_WR_DATA 0x1104
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#define PCIE_RC_DL_MDIO_RD_DATA 0x1108
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@ -54,11 +59,11 @@
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#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c
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#define PCIE_MEM_WIN0_LO(win) \
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PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4)
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PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 8)
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#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010
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#define PCIE_MEM_WIN0_HI(win) \
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PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4)
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PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 8)
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#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c
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#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f
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@ -693,10 +698,11 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
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int num_out_wins = 0;
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u16 nlw, cls, lnksta;
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int i, ret;
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u32 tmp;
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u32 tmp, aspm_support;
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/* Reset the bridge */
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brcm_pcie_bridge_sw_init_set(pcie, 1);
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brcm_pcie_perst_set(pcie, 1);
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usleep_range(100, 200);
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@ -803,6 +809,15 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
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num_out_wins++;
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}
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/* Don't advertise L0s capability if 'aspm-no-l0s' */
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aspm_support = PCIE_LINK_STATE_L1;
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if (!of_property_read_bool(pcie->np, "aspm-no-l0s"))
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aspm_support |= PCIE_LINK_STATE_L0S;
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tmp = readl(base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
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u32p_replace_bits(&tmp, aspm_support,
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PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK);
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writel(tmp, base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
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/*
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* For config space accesses on the RC, show the right class for
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* a PCIe-PCIe bridge (the default setting is to be EP mode).
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@ -899,7 +914,6 @@ static void __brcm_pcie_remove(struct brcm_pcie *pcie)
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brcm_msi_remove(pcie);
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brcm_pcie_turn_off(pcie);
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clk_disable_unprepare(pcie->clk);
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clk_put(pcie->clk);
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}
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static int brcm_pcie_remove(struct platform_device *pdev)
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@ -917,11 +931,26 @@ static int brcm_pcie_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node, *msi_np;
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struct pci_host_bridge *bridge;
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struct device_node *fw_np;
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struct brcm_pcie *pcie;
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struct pci_bus *child;
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struct resource *res;
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int ret;
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/*
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* We have to wait for Raspberry Pi's firmware interface to be up as a
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* PCI fixup, rpi_firmware_init_vl805(), depends on it. This driver's
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* probe can race with the firmware interface's (see
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* drivers/firmware/raspberrypi.c) and potentially break the PCI fixup.
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*/
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fw_np = of_find_compatible_node(NULL, NULL,
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"raspberrypi,bcm2835-firmware");
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if (fw_np && !rpi_firmware_get(fw_np)) {
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of_node_put(fw_np);
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return -EPROBE_DEFER;
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}
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of_node_put(fw_np);
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bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie));
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if (!bridge)
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return -ENOMEM;
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@ -16,6 +16,9 @@
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#include <linux/export.h>
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#include <linux/acpi.h>
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#include <linux/dmi.h>
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#include <soc/bcm2835/raspberrypi-firmware.h>
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#include "pci-quirks.h"
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#include "xhci-ext-caps.h"
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@ -1243,11 +1246,24 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev)
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static void quirk_usb_early_handoff(struct pci_dev *pdev)
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{
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int ret;
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/* Skip Netlogic mips SoC's internal PCI USB controller.
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* This device does not need/support EHCI/OHCI handoff
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*/
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if (pdev->vendor == 0x184e) /* vendor Netlogic */
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return;
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if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
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ret = rpi_firmware_init_vl805(pdev);
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if (ret) {
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/* Firmware might be outdated, or something failed */
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dev_warn(&pdev->dev,
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"Failed to load VL805's firmware: %d. Will continue to attempt to work, but bad things might happen. You should fix this...\n",
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ret);
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}
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}
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if (pdev->class != PCI_CLASS_SERIAL_USB_UHCI &&
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pdev->class != PCI_CLASS_SERIAL_USB_OHCI &&
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pdev->class != PCI_CLASS_SERIAL_USB_EHCI &&
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@ -10,6 +10,7 @@
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#include <linux/of_device.h>
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struct rpi_firmware;
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struct pci_dev;
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enum rpi_firmware_property_status {
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RPI_FIRMWARE_STATUS_REQUEST = 0,
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@ -90,7 +91,7 @@ enum rpi_firmware_property_tag {
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RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045,
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RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049,
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RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050,
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RPI_FIRMWARE_NOTIFY_XHCI_RESET = 0x00030058,
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/* Dispmanx TAGS */
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RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE = 0x00040001,
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@ -141,6 +142,7 @@ int rpi_firmware_property(struct rpi_firmware *fw,
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int rpi_firmware_property_list(struct rpi_firmware *fw,
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void *data, size_t tag_size);
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struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node);
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int rpi_firmware_init_vl805(struct pci_dev *pdev);
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#else
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static inline int rpi_firmware_property(struct rpi_firmware *fw, u32 tag,
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void *data, size_t len)
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@ -158,6 +160,11 @@ static inline struct rpi_firmware *rpi_firmware_get(struct device_node *firmware
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{
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return NULL;
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}
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static inline int rpi_firmware_init_vl805(struct pci_dev *pdev)
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{
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return 0;
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}
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#endif
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#endif /* __SOC_RASPBERRY_FIRMWARE_H__ */
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